From nobody Sun Jun 14 08:17:01 2026 Received: from BL0PR03CU003.outbound.protection.outlook.com (mail-eastusazon11012013.outbound.protection.outlook.com [52.101.53.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C40239098A; Wed, 8 Apr 2026 21:25:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.53.13 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775683520; cv=fail; b=Tu22/ELh/ey0qg0Xmapdq1X4J1RkfSDfOKqX6FBjVPIW+E9C4wmGF/R8ChM+B1b9NvfJFoZIvxpQaYagw/guAmzFkFmn/qVJo7zlYsdlYEBZfn8HcODBLQ9cRCMNH9Wsah/bh9YUd/3aqJQIPwhAy0Q0pXc86I5tsLuUDro6DKM= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775683520; c=relaxed/simple; bh=oMR/JD5OEDyU+UoOlpjrZrp/7bC3QCSapIFLDTI3u/k=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=r2BloPukgWlFYTPveMvu6wnfrf9WXkDemYATivuVo+whqi9SvvKPo1vcCoRwDkuzlwEwe52EBQj4Xmg37GVoZRfHg0rg+lQAZjmOFZmh6h5G9hwXK/2UF799Tm+i+CCMvRQTqvzRqHze0tMXXkLf2OKCbMysB6xPaSPH2wWaQ40= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=XuPInegn; arc=fail smtp.client-ip=52.101.53.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="XuPInegn" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=yjPs8tjm+UW5nuY1/kx3RX97W4/QPmRAslUmqHnhYLOkZ25DZ7MI2k6xQ+J93gUr50X8ui5g0HER9OlLnGQ1WZfgc+pASKK2y4timMbQl5guqu7oNI3f4P9CSwpVuQ0Axg0HLMlhLo/Gxn9Clbr7hP3Z+TELN0Po5vAXl+4+OCeaNkt45AYAuFXbpZR3363qpBgrQ0TglPyOL8W1Z+0V6FDhokJQ6etxRPNGeO9JvJMiI+Hqqhucd1s2Hg5lmG6RelczutdkswejVHmxe3Cy3ulpmmvAoQs/+HgTFV6Cs+N6AuNadvOhmABXTehQ0GPwXzNpKBDJY7Y4/6t5I/1Rvg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=2+C4ahxGNOb8QKFg9YseYISN8WrsxaOAkUMyyG9MmeI=; b=MMI9hpF4eBfZ5KrlVjxuc2h9DsG6B8ZFDcGDYUvI63jTsZRKKS9rYQWrQrXy5bK49ccsiK2dlKvSOlHFiYpHYFQzm0DLUYGJFoIuNkEkmZ3rukUzIkXwXwvc/kTUefDvMSW8LVnCFVk/bsMDInhxmU1iBHGAPnPwWQZipl2PhfcJHyWmSy4HtCBWNtNV7PUTY+XRZwrQdT1Jn8cFO+Z3PG7TokGZTeGipJkU8Z1bAt2O6u6capnoqWgdosOR5OryXk1aoeHXZ+Af0Im1LXF0fhofrHvPVhLcyj93J+TmSfsBW1fdpVDWxsNwN8R6zVsNUSPHZlZSOc+5xEeqqBT3Hw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=gmail.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=2+C4ahxGNOb8QKFg9YseYISN8WrsxaOAkUMyyG9MmeI=; b=XuPInegncVISnQS91m+cMjd3dSQrZYVYM9laliRK+b9V85FCm0FxjxTZkDR1TisiOUwkuwhrHaFP1J3XxPhi4VDzgpoV5WPDIIXh8NoHSWaFfZDWiCq3HAHlsbJ5k71QjYbqcmkIs9aRttZWY6yqf4L69kWJbRmdTwXpRDk/W/QvECniq4Fi/wkGUutU0M2mCAVu7jmC6jduWplbfmWtAANCgsYXRgHTnw5kXYdauiEcdlviG+2voSSALAKbQEbXczugcXDzSuYoBeB5jlXS8sk+CbZdd4dyDV+40XTrXxQTzmtx70xqO+/u1AWROiEhnV+J3YsyWj7IXjOm1BX/gA== Received: from SJ0PR13CA0090.namprd13.prod.outlook.com (2603:10b6:a03:2c4::35) by CH3PR12MB9220.namprd12.prod.outlook.com (2603:10b6:610:198::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9769.18; Wed, 8 Apr 2026 21:25:12 +0000 Received: from SJ1PEPF00001CDD.namprd05.prod.outlook.com (2603:10b6:a03:2c4:cafe::e6) by SJ0PR13CA0090.outlook.office365.com (2603:10b6:a03:2c4::35) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9769.37 via Frontend Transport; Wed, 8 Apr 2026 21:25:11 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by SJ1PEPF00001CDD.mail.protection.outlook.com (10.167.242.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9769.17 via Frontend Transport; Wed, 8 Apr 2026 21:25:11 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Wed, 8 Apr 2026 14:24:53 -0700 Received: from build-suneelg-jammy-20260204.internal (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Wed, 8 Apr 2026 14:24:52 -0700 From: Suneel Garapati To: , , , , , , , , , , , , , CC: Suneel Garapati Subject: [PATCH v2 1/3] dt-bindings: timestamp: Add Tegra264 support Date: Wed, 8 Apr 2026 21:24:11 +0000 Message-ID: <20260408212413.217692-2-suneelg@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260408212413.217692-1-suneelg@nvidia.com> References: <20260408212413.217692-1-suneelg@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00001CDD:EE_|CH3PR12MB9220:EE_ X-MS-Office365-Filtering-Correlation-Id: 08439b65-8052-4029-12a0-08de95b5513c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|82310400026|1800799024|376014|18002099003|22082099003|56012099003|921020; X-Microsoft-Antispam-Message-Info: /fLiIWCciIPjZSH5a1WO4iXoHm8NA6Iy8Pp/uufZHKNbi3kD2duG8UITOKSH/2XrSxFVqyLo3WnUQWaoI5rbBr+9deGx/xPGCY2obSc4sZO1oIqvo80kMQsZuSycMLkmPwlrLmbHXkJZepwZFEoUNA8YIf1BXWWaGvmtOiGrAeuHBDpDpHQIE8lIa9/EdxyjrXRuJF5cm2Sl9JDXeNeU3nGZPM2sCvWR4iHMCNcvJKtesRG3XmLCtRC9i7hEvRZjLsHPI3oO7hXwhdR79/pu5SZ505TsMhvvi2k49J8lDocgWrYTf5cYXfqpfT8FG0qd5EhMsud1j+GwyTfU1riuV57X32g+GwLG1PSKZdYt0xhT3aXRwlKHcD9nkPJ5JpblVT23lmYArIeDMQZqXpwirfyt1I1t/e3XB8Zxnx0Q7bs9TwFd69GAeJ//Wrnyf2qeO8VSE4Abuga+zj/pMlo8WV97WdWONb5E1y35cj7dUp49tl3rDSxa9UuUe+BF72zaiyJKFIO8AsnrvpHHaHQb84hc2CEEUR1QSSoV9RD42s1rrNpGn/X8PiZsgEeC4i7Zl0ym9pPKxDPTUkPte69u4RBt/LX5qFJIE0Vc0vA9CBb3vCLNq3m/5xEpknTz+S4AnyyZ8o78Fz/5pOkkr6pQ7NzJ2FcAIO7Ogq76r0JDIRG5k/AHB4jK4Ekb7z/JeoN6m0mD/75n1//XV1qpt960GIAPXaeXN+Kpb+GKO2vVT1EEbgoGg6M5JwXmQl2XTswPLlfnK1Oi7XiMFfPcFauJAVhajFwzychGOI42wlviLBMbZQ2FzPYK+ZIAvT6U5WJ/ X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700016)(82310400026)(1800799024)(376014)(18002099003)(22082099003)(56012099003)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: IQfyzXFN7eFtKdb4Z91pynuvFfwy9dS239sJxmq/yDrJVz8bpbDq9dRceIkXZ2FgXwoIbqRTvy/gRJHzlxkfBEeW93uyB89ToJVwTBBj1bYOYN15muhzb0k9fv0v/ydZT112o78qlQx9AbTDLMpG85Tf7Miyy/OCdmV6LQUs2V6nJ65L/izNlU2yIYHwweNFSQ9v1ciATUpBck5UN+Y24EA6U1OpeK8NNJtzT5IRsmYPSl8mm2/HIWytebbHy/DEtY2qvTkQRLFvdVg3O7K+Cf/0vvn4MnUi5UPL03aCAdZy+aafLkRAP4YaxQiNsQnMS7Zca4NjZGJe189D0cwip+Kh8hcfiVVMVDkM/hJGG4Y9gPhnBHzrg8dLPI+EIyZaktXKMTbsK5vp1Nv24/g3qT2rrh1Ve3qg5BjiGq9JgYhS7J6rvpp+ZWpOJA0SnNcf X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Apr 2026 21:25:11.6385 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 08439b65-8052-4029-12a0-08de95b5513c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CDD.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB9220 Content-Type: text/plain; charset="utf-8" Add timestamp provider support for the Tegra264 in devicetree bindings. Tegra264 has two generic timestamping engines (GTE) which are the always-on GTE (AON) and legacy interrupt controller (LIC) GTE. 'nvidia,slices' property is deprecated and hence not allowed for Tegra264. Signed-off-by: Suneel Garapati Reviewed-by: Krzysztof Kozlowski --- v1: - nvidia,slices property is deprecated and hence false for Tegra264 --- .../bindings/timestamp/nvidia,tegra194-hte.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-ht= e.yaml b/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.ya= ml index 456797967adc..a96d6cd23895 100644 --- a/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml +++ b/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml @@ -25,6 +25,8 @@ properties: - nvidia,tegra194-gte-lic - nvidia,tegra234-gte-aon - nvidia,tegra234-gte-lic + - nvidia,tegra264-gte-aon + - nvidia,tegra264-gte-lic =20 reg: maxItems: 1 @@ -112,10 +114,22 @@ allOf: contains: enum: - nvidia,tegra234-gte-aon + - nvidia,tegra264-gte-aon then: required: - nvidia,gpio-controller =20 + - if: + properties: + compatible: + contains: + enum: + - nvidia,tegra264-gte-aon + - nvidia,tegra264-gte-lic + then: + properties: + nvidia,slices: false + additionalProperties: false =20 examples: --=20 2.34.1 From nobody Sun Jun 14 08:17:01 2026 Received: from BN1PR04CU002.outbound.protection.outlook.com (mail-eastus2azon11010042.outbound.protection.outlook.com [52.101.56.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ED7DC30F7F3; Wed, 8 Apr 2026 21:25:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.56.42 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775683527; cv=fail; b=sy8pBuYnL8NaQPxeW6kEnG+KdnMXCumLAVZZRLNGR8lFJDYixLdU1ZBDOIa+FviOh1pnd9A7uGoARC/dqTUXzT5VHvz6Awd5HrBMX02qSBSaowyx289En2JHZ5mWMl77FTlefDTgMlVl7fsNMWYQKTTcCzxfKnSIMAF1ah3oxOs= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775683527; c=relaxed/simple; bh=g846JjvWG4WhfJ3hN2NgLOI0yIAMgfMRAKuroKIb7dA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ap+ZIKUZmHzWVUqphtET0qaUVvwK1hhRXY4JssF0JMb2TXffGlDiIR0o4pCUtWYit0zcBEde1CRuYUuhUNe+2iiTx9wJ/cOAJhp3nRn4UoJsKdSkPt2gYtkBiRRfSJNFHCaA30N9wQPBku/LT7QXbzq8tC5TR+y8ns1cubjEBRc= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=Mgy7HOrs; arc=fail smtp.client-ip=52.101.56.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="Mgy7HOrs" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=kwXRUsMiRtr4vxoNe4NVxGRkD/auXYINNGLjg/DphniSEhu+o+fGjzvfqY3v8IA+bL4uQA/M4jfA78O2vJJl9svhxVc+n1zEjHxcTpIjJRGeI+BoaOcKPFirdsvG9l2BMmN81UbY+k7nq+odv0NTLseSPvwn6ucBpnWz5MpBwg6sl25yI2NrCXHd7eD0mHVxMfcuYGMakGpTD5zAtItXCeKlnQW0xaWrqWmwD4q5o1WzyhG/VdbE0PzWLF2FxDutnar0gRKggWCxDhm+menVQURTThL1/3T1mKVe9JiGyUKyXSOBGQ/oq8o+kSLVCYriYgIso4raFv5fOZ88AGlmAw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=az7i3yFJClaQFHZd5y+MNbffAWModNfUk7UGn5JhgCo=; b=EnvREW4U/3RXsgDCuZ/6yemHOTUv2vuI0+Kcvz6HpjsgIiQf5vdnoxxlKVXaOAFmNizRIfWINIculXfABHKFEDrK4MCFmCGY7XRwvhHHF6yxHUg8v/RBZ8wI4AniMG/s1BoDN9DXKrHgiiLDoLGqWDfrN0/kDHeExPsgBNZkUc49hMdHIzMEochJGX9PgBhsbQ00Wn8m6nCckZPy25svroZOqdWE561MsQzdSkPdnW4Lqbf5AtKqR2GLSeRJcw4HjH8CfWjLrhZsMPGkXo3Zdo3pkr9KYaga9UlPg1eVO+x0+i1vtKORwVX3a2jCi1fMzooDXKMxQjX+E7fkOEOUvQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=gmail.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=az7i3yFJClaQFHZd5y+MNbffAWModNfUk7UGn5JhgCo=; b=Mgy7HOrsWH1+wsk9mTpvc9Z1F3X4g7JjMvjp5z+kDtOtjzM2dxXPFN/twEm0+SpirX23W2QqjtxHhNcekMOfsNwdl6VZ2QwlVNfg+nlKNW8PaxsyAhsuilHVB8VqYdfYr1dPvl3LYhicnZ2Ak9RPvDizOTwCRyGo5u70hJn58DlA+y/kDUsa28UztF0lCqMaXpqaumgz4V2106pzuqsrv9WLQYyCttVhhf9sF49kQ0eEJt/BpexVWPkOgAhsWhJ2CH/Rg6HZlWhacNipWX61YOGbPsIR5J4WSf7QwLiG5ecpRgOAtaRLiOadTcO1ufdl5Tv8E/u0u8B/NqL2lo0xBw== Received: from SJ0PR13CA0083.namprd13.prod.outlook.com (2603:10b6:a03:2c4::28) by SJ2PR12MB9087.namprd12.prod.outlook.com (2603:10b6:a03:562::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9769.17; Wed, 8 Apr 2026 21:25:20 +0000 Received: from SJ1PEPF00001CDC.namprd05.prod.outlook.com (2603:10b6:a03:2c4:cafe::67) by SJ0PR13CA0083.outlook.office365.com (2603:10b6:a03:2c4::28) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9769.37 via Frontend Transport; Wed, 8 Apr 2026 21:25:20 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by SJ1PEPF00001CDC.mail.protection.outlook.com (10.167.242.4) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9769.17 via Frontend Transport; Wed, 8 Apr 2026 21:25:20 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Wed, 8 Apr 2026 14:25:00 -0700 Received: from build-suneelg-jammy-20260204.internal (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Wed, 8 Apr 2026 14:24:58 -0700 From: Suneel Garapati To: , , , , , , , , , , , , , CC: Suneel Garapati Subject: [PATCH v2 2/3] hte: tegra194: Add Tegra264 GTE support Date: Wed, 8 Apr 2026 21:24:12 +0000 Message-ID: <20260408212413.217692-3-suneelg@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260408212413.217692-1-suneelg@nvidia.com> References: <20260408212413.217692-1-suneelg@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00001CDC:EE_|SJ2PR12MB9087:EE_ X-MS-Office365-Filtering-Correlation-Id: e79c1905-c627-4cfc-ff5c-08de95b55636 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700016|376014|22082099003|56012099003|18002099003|921020; X-Microsoft-Antispam-Message-Info: M7XDJTbO9JWmYQ0LtgErug0S6TotfJpd7xPLf5osIGVZSqR7TeirsfZB1INqD0noHZfEZeegixzrJ0BITaXjMlDYwAvDNTBmAGSU2/sktoU+M8Pza2ejqhYzvk7NbUbB8QJUW4L9sZXtTm/JF9mzpDcbVP6Ci+QSWj7TmCNhfY/zHBGp+rFKmF21/02Pk7tQZRpJDt0s+LkVNkxeq5qX2Hf4y3GUt9YOuJJzDi7X/OTFmA85lyz47aHKuHTi4jNhVXrEVQgjoRu54HTEmOEL231uL/DJ63kpsPYud8fxZtWS+zYQUUyMZFuNfNLExLRc28mgigusENiYHA7TgqsPIsV0pfPBLe2vn/cvefUKmjoM4aUqNC9sByL2eLUKcJlYpqhmIHmzyivqo0olAYckJOWqT9pUmR21uQUvcjJand7zy6W2n76nU3N/3SlstXYiAb8EyJq+dtMlkNTjDvZmo3x66yBzE94lxtp4z428zqz7Hb7HNJoP3piW5O393T3vrK9Btccy73vSTdu2SVoa/eGSWw5vapwAJVM0432y1XVyOX+YmFvALjtzeh+n5Sg/FnG3PWRn83eFFF+9mxb7UeFpKassiD17X7yVIDOmf2iOXp/mqXa9x3ApcfeCLA+Ie3jnzGCg+ogZCeuM2Yp+YEsDXGnhKwNa5KTMo4seCoMKIMW4sMhkRWBdlWqLProZO7sDazTdo6F6E0zBpgnVjcLk6JqL2g8GgZVejqLbeZ36LD3i3yzrpB0dAHP9BuYVPCjE10b8ebc+sSGcw0M3dDVhhlkNtHdfqQqc2hkZPxwTOzPHzqivT9PQvLaFWT9H X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(36860700016)(376014)(22082099003)(56012099003)(18002099003)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Uv10TAYKvHXw1LsnuRQ6p2GTYX/w2erwzaMtCqYv+IcSCytfJLSYekWucHHV22qH80hAEFHfKEi/WmDaSevdTEckeY5Bf4meJhL02bMqHE12v5kF9O5r2QdVKOFdzIaXF6pUcyPCqA+zCDAwN6oGXX/jfMNSkc4vNF8UVSmjvsxaKgKNlA9qIkbLx3e0Yc8ynlSzEdbIVBvKYk6INiz5thhA82Q8kCPJoW/qTJCn1iAOF3te/onhXKfwCkJhm7Qb6H846gPUsrHBnEJne4mtlHLvrT8/pMCxsahfzRR6ose6T6rZnCPKYn/CfOPoqdy6EnVUH+EBTX6+Cs5bps1jC43cmwRf6OxbsOTxCbv+HDzvhFMjbqrOYD81Z6P96vCduzLl76jFodgYwAOaf8vR1lUGYk0Sbijlj0KescKSnG5duZQqEdCGrX1vU0JOK7eP X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Apr 2026 21:25:20.0010 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e79c1905-c627-4cfc-ff5c-08de95b55636 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CDC.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB9087 Content-Type: text/plain; charset="utf-8" Add AON-GTE mapping and LIC GTE instance support for the Tegra264. Move TSC clock parameters from macros to members of SoC data as values differ for Tegra264 chip. Signed-off-by: Suneel Garapati Reviewed-by: Dipen Patel --- drivers/hte/hte-tegra194.c | 133 +++++++++++++++++++++++++++++++++++-- 1 file changed, 128 insertions(+), 5 deletions(-) diff --git a/drivers/hte/hte-tegra194.c b/drivers/hte/hte-tegra194.c index 690eb9be30fb..4a7702b32b24 100644 --- a/drivers/hte/hte-tegra194.c +++ b/drivers/hte/hte-tegra194.c @@ -20,10 +20,11 @@ =20 #define HTE_SUSPEND 0 =20 -/* HTE source clock TSC is 31.25MHz */ +/* HTE source clock TSC is 1GHz for T264 and 31.25MHz for others */ #define HTE_TS_CLK_RATE_HZ 31250000ULL +#define HTE_TS_CLK_RATE_1G 1000000000ULL #define HTE_CLK_RATE_NS 32 -#define HTE_TS_NS_SHIFT __builtin_ctz(HTE_CLK_RATE_NS) +#define HTE_CLK_RATE_NS_1G 1 =20 #define NV_AON_SLICE_INVALID -1 #define NV_LINES_IN_SLICE 32 @@ -120,6 +121,8 @@ struct tegra_hte_data { u32 slices; u32 map_sz; u32 sec_map_sz; + u64 tsc_clkrate_hz; + u32 tsc_clkrate_ns; const struct tegra_hte_line_mapped *map; const struct tegra_hte_line_mapped *sec_map; }; @@ -317,6 +320,94 @@ static const struct tegra_hte_line_mapped tegra234_aon= _gpio_sec_map[] =3D { [40] =3D {2, NV_AON_HTE_SLICE2_IRQ_GPIO_23}, }; =20 +static const struct tegra_hte_line_mapped tegra264_aon_gpio_map[] =3D { + /* gpio, slice, bit_index */ + /* AA port */ + [0] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_29}, + [1] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_28}, + [2] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_27}, + [3] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_26}, + [4] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_25}, + [5] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_24}, + [6] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_23}, + [7] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_22}, + /* BB port */ + [8] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_21}, + [9] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_20}, + /* CC port */ + [10] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_19}, + [11] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_18}, + [12] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_17}, + [13] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_16}, + [14] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_15}, + [15] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_14}, + [16] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_13}, + [17] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_12}, + /* DD port */ + [18] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_11}, + [19] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_10}, + [20] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_9}, + [21] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_8}, + [22] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_7}, + [23] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_6}, + [24] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_5}, + [25] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_4}, + /* EE port */ + [26] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_3}, + [27] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_2}, + [28] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_1}, + [29] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_0}, +}; + +static const struct tegra_hte_line_mapped tegra264_aon_gpio_sec_map[] =3D { + /* gpio, slice, bit_index */ + /* AA port */ + [0] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_29}, + [1] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_28}, + [2] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_27}, + [3] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_26}, + [4] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_25}, + [5] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_24}, + [6] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_23}, + [7] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_22}, + /* BB port */ + [8] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_21}, + [9] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_20}, + [10] =3D {NV_AON_SLICE_INVALID, 0}, + [11] =3D {NV_AON_SLICE_INVALID, 0}, + [12] =3D {NV_AON_SLICE_INVALID, 0}, + [13] =3D {NV_AON_SLICE_INVALID, 0}, + [14] =3D {NV_AON_SLICE_INVALID, 0}, + [15] =3D {NV_AON_SLICE_INVALID, 0}, + /* CC port */ + [16] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_19}, + [17] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_18}, + [18] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_17}, + [19] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_16}, + [20] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_15}, + [21] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_14}, + [22] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_13}, + [23] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_12}, + /* DD port */ + [24] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_11}, + [25] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_10}, + [26] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_9}, + [27] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_8}, + [28] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_7}, + [29] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_6}, + [30] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_5}, + [31] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_4}, + /* EE port */ + [32] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_3}, + [33] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_2}, + [34] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_1}, + [35] =3D {3, NV_AON_HTE_SLICE2_IRQ_GPIO_0}, + [36] =3D {NV_AON_SLICE_INVALID, 0}, + [37] =3D {NV_AON_SLICE_INVALID, 0}, + [38] =3D {NV_AON_SLICE_INVALID, 0}, + [39] =3D {NV_AON_SLICE_INVALID, 0}, +}; + static const struct tegra_hte_data t194_aon_hte =3D { .map_sz =3D ARRAY_SIZE(tegra194_aon_gpio_map), .map =3D tegra194_aon_gpio_map, @@ -324,6 +415,8 @@ static const struct tegra_hte_data t194_aon_hte =3D { .sec_map =3D tegra194_aon_gpio_sec_map, .type =3D HTE_TEGRA_TYPE_GPIO, .slices =3D 3, + .tsc_clkrate_hz =3D HTE_TS_CLK_RATE_HZ, + .tsc_clkrate_ns =3D HTE_CLK_RATE_NS, }; =20 static const struct tegra_hte_data t234_aon_hte =3D { @@ -333,6 +426,19 @@ static const struct tegra_hte_data t234_aon_hte =3D { .sec_map =3D tegra234_aon_gpio_sec_map, .type =3D HTE_TEGRA_TYPE_GPIO, .slices =3D 3, + .tsc_clkrate_hz =3D HTE_TS_CLK_RATE_HZ, + .tsc_clkrate_ns =3D HTE_CLK_RATE_NS, +}; + +static const struct tegra_hte_data t264_aon_hte =3D { + .map_sz =3D ARRAY_SIZE(tegra264_aon_gpio_map), + .map =3D tegra264_aon_gpio_map, + .sec_map_sz =3D ARRAY_SIZE(tegra264_aon_gpio_sec_map), + .sec_map =3D tegra264_aon_gpio_sec_map, + .type =3D HTE_TEGRA_TYPE_GPIO, + .slices =3D 4, + .tsc_clkrate_hz =3D HTE_TS_CLK_RATE_1G, + .tsc_clkrate_ns =3D HTE_CLK_RATE_NS_1G, }; =20 static const struct tegra_hte_data t194_lic_hte =3D { @@ -340,6 +446,8 @@ static const struct tegra_hte_data t194_lic_hte =3D { .map =3D NULL, .type =3D HTE_TEGRA_TYPE_LIC, .slices =3D 11, + .tsc_clkrate_hz =3D HTE_TS_CLK_RATE_HZ, + .tsc_clkrate_ns =3D HTE_CLK_RATE_NS, }; =20 static const struct tegra_hte_data t234_lic_hte =3D { @@ -347,6 +455,17 @@ static const struct tegra_hte_data t234_lic_hte =3D { .map =3D NULL, .type =3D HTE_TEGRA_TYPE_LIC, .slices =3D 17, + .tsc_clkrate_hz =3D HTE_TS_CLK_RATE_HZ, + .tsc_clkrate_ns =3D HTE_CLK_RATE_NS, +}; + +static const struct tegra_hte_data t264_lic_hte =3D { + .map_sz =3D 0, + .map =3D NULL, + .type =3D HTE_TEGRA_TYPE_LIC, + .slices =3D 10, + .tsc_clkrate_hz =3D HTE_TS_CLK_RATE_1G, + .tsc_clkrate_ns =3D HTE_CLK_RATE_NS_1G, }; =20 static inline u32 tegra_hte_readl(struct tegra_hte_soc *hte, u32 reg) @@ -574,12 +693,12 @@ static int tegra_hte_release(struct hte_chip *chip, s= truct hte_ts_desc *desc, static int tegra_hte_clk_src_info(struct hte_chip *chip, struct hte_clk_info *ci) { - (void)chip; + struct tegra_hte_soc *hte_dev =3D chip->data; =20 if (!ci) return -EINVAL; =20 - ci->hz =3D HTE_TS_CLK_RATE_HZ; + ci->hz =3D hte_dev->prov_data->tsc_clkrate_hz; ci->type =3D CLOCK_MONOTONIC; =20 return 0; @@ -602,8 +721,10 @@ static void tegra_hte_read_fifo(struct tegra_hte_soc *= gs) { u32 tsh, tsl, src, pv, cv, acv, slice, bit_index, line_id; u64 tsc; + u8 tsc_ns_shift; struct hte_ts_data el; =20 + tsc_ns_shift =3D __builtin_ctz(gs->prov_data->tsc_clkrate_ns); while ((tegra_hte_readl(gs, HTE_TESTATUS) >> HTE_TESTATUS_OCCUPANCY_SHIFT) & HTE_TESTATUS_OCCUPANCY_MASK) { @@ -621,7 +742,7 @@ static void tegra_hte_read_fifo(struct tegra_hte_soc *g= s) while (acv) { bit_index =3D __builtin_ctz(acv); line_id =3D bit_index + (slice << 5); - el.tsc =3D tsc << HTE_TS_NS_SHIFT; + el.tsc =3D tsc << tsc_ns_shift; el.raw_level =3D tegra_hte_get_level(gs, line_id); hte_push_ts_ns(gs->chip, line_id, &el); acv &=3D ~BIT(bit_index); @@ -656,6 +777,8 @@ static const struct of_device_id tegra_hte_of_match[] = =3D { { .compatible =3D "nvidia,tegra194-gte-aon", .data =3D &t194_aon_hte}, { .compatible =3D "nvidia,tegra234-gte-lic", .data =3D &t234_lic_hte}, { .compatible =3D "nvidia,tegra234-gte-aon", .data =3D &t234_aon_hte}, + { .compatible =3D "nvidia,tegra264-gte-lic", .data =3D &t264_lic_hte}, + { .compatible =3D "nvidia,tegra264-gte-aon", .data =3D &t264_aon_hte}, { } }; MODULE_DEVICE_TABLE(of, tegra_hte_of_match); --=20 2.34.1 From nobody Sun Jun 14 08:17:01 2026 Received: from DM5PR21CU001.outbound.protection.outlook.com (mail-centralusazon11011034.outbound.protection.outlook.com [52.101.62.34]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2EDB52E2DF2; Wed, 8 Apr 2026 21:25:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.62.34 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775683528; cv=fail; b=MC11qvzMsL79sWlqkGalTXnyK48rLqBH1qeCkES6LGadbSKVIC9uI01ccB9onwngjnTQ1LBuPWAxIJ8ennznBk1oELq8ozmUAa8o+E+XgGm4TutbEj1PU0memD78WG+jn6zLW4ysBXtkWGxeckhO46R/N+sQ/TVeqye5Sjul1Po= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775683528; c=relaxed/simple; bh=EwjbnVK1XdfqEN4VGgcEtMUjsHgytjgCYgwsnl1Q9ok=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=BxcOTtOGQ4NBT3e2lMJh4cvIMvKazUtBiN1sos1d83E5LW2py5F7GmLEl7ZBzWJ7ugKZ01fGq5JKIJcRs7tAMhg8wm/0TlIgmI2f2EwLqc0LhQ1m7oDftLN+mq2BRgDJwj54SNO10XKDiUSi0imBmGef7whnfSk56JpY4hQfYFY= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=GYpL/K2s; arc=fail smtp.client-ip=52.101.62.34 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="GYpL/K2s" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=KaVYkUy6cHKLFz9qEw5PrETSMB2VcVD2wwdyQrzeq24WhHEUShfiJ0zK0VvNEDFGysC4cr+QElydyXoijuKwXdT9wwE3CBMDbCDjYGJ2l5WtfApGlWzsOVsHfCq4mrhVYoy1u2KXq1TzelNDgztncbtJJq6mUsMXs9Kf4ywmQYJvIROo+zHVQTEYCfZdm7gzr/CKpFkp2yoAAXfWG9tQlbnjwYWLueKcGJ+/UJRwV1IpTPzwmNKmJvkQFhsTOslVTrn48ByeQOhTs4BlmwPHsMbLhOVfVPQl3RgxPDi4jyO7i+sWaqQBhzj+U3pOIA5XChP/xlePbrlH9JiofbER+w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Grs0t0w7oRj4r4Qymz2jKjFtRMdJPjYct3vUWJvpqLs=; b=tVD8Or2cHUV/L/cFe3skHkPpN0josc5SRmE8S6rTgSUS6N5KRtwEOLnoZ946A4JACd/1IX01kHedHKhMaz3+uP9BNNAek9vZIeNKNN3avcO9hfFAiPs6ruSksYyoJ9eviNCo+9PGFPntyCQCXZiK4kaYxvf7Obdz6yN+CVtiQQbNpv0AfO6qNi2+A1IWlGsgHw4PBbPoVIgamWWKDoYfADja4Fj/KDSl3d7YZ8P9ZvJjjmt0Zdb4qpZo55PFDsOJhdeBY6D0cNL+sjpCcLugZiwci0ipB4tB29Bq7MAEfCRPVjo7x+GQG4zFkOLb7Ch0IKbTVVH0f1eVTVP+7QJSmA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=gmail.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Grs0t0w7oRj4r4Qymz2jKjFtRMdJPjYct3vUWJvpqLs=; b=GYpL/K2sJHa1EimnyMenYsSQKVUBbMvv6bl6y8WD3/feSCn1asrJJgT+cESZVM74yi2IXFh3+KBaJTDpBtAhlPlhH3GwhFZs40iAYsgrvLxmwqrtOeQn3meScCzjj2LM2lKIVQTxKKWInncYpfIpAi6Z2qOu/loOASAdujhG5v8LbsLiHoAUOJlzfPWo2+8BgdhbSgon7IpJTuIa7wqsM1r2Fb/36PccuSL96fdT9J/Mwte/Nxs9fDZYxmAe41WNjw1ENIjdHWcGvd+F3l1tbIFUt8DaPw98Z9Rj7Sr6kAyWhWkbqwLUrAEokxdphxrd3MM+Ku0RecdRS1VRpoezTA== Received: from BN9PR03CA0254.namprd03.prod.outlook.com (2603:10b6:408:ff::19) by MN2PR12MB4254.namprd12.prod.outlook.com (2603:10b6:208:1d0::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9769.15; Wed, 8 Apr 2026 21:25:22 +0000 Received: from BN3PEPF0000B373.namprd21.prod.outlook.com (2603:10b6:408:ff:cafe::ed) by BN9PR03CA0254.outlook.office365.com (2603:10b6:408:ff::19) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9769.37 via Frontend Transport; Wed, 8 Apr 2026 21:25:22 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by BN3PEPF0000B373.mail.protection.outlook.com (10.167.243.170) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9818.0 via Frontend Transport; Wed, 8 Apr 2026 21:25:22 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Wed, 8 Apr 2026 14:25:03 -0700 Received: from build-suneelg-jammy-20260204.internal (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Wed, 8 Apr 2026 14:25:01 -0700 From: Suneel Garapati To: , , , , , , , , , , , , , CC: Suneel Garapati Subject: [PATCH v2 3/3] arm64: tegra: Add GTE nodes for Tegra264 Date: Wed, 8 Apr 2026 21:24:13 +0000 Message-ID: <20260408212413.217692-4-suneelg@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260408212413.217692-1-suneelg@nvidia.com> References: <20260408212413.217692-1-suneelg@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B373:EE_|MN2PR12MB4254:EE_ X-MS-Office365-Filtering-Correlation-Id: 2442fa5e-9739-4a2a-eb9b-08de95b5577f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|36860700016|921020|18002099003|22082099003|56012099003; X-Microsoft-Antispam-Message-Info: uCyN31XNbj2MOgRHWYiaAUn0/D3GFBXcl8//FlRjHkfkc7ncyyjFaO2Xke3ycddSQdWlWY0odbyp4RHlQhlua6AuGI4T2GwCtPHNqsdsNFJBWJgVk0q8nTdC7fx2sCLBYqtxnRYSYrT6DnzcKFpbW2LUzC2eap9VUJqYoeiR/Fmib/IwBdzieYVBsmDttX7AKMua6oAVeZ0MZ2Cxb3QrRsRk5ou1kSFCjT9MrilefBAlecvkGAdwSIV8VdQnGgvOcHs447MYt28QXGptjZVu4p4VkS6gEf57txyHNRT8NYmsxdgbwlF2sw0DzyqRJV+S1iFKqupyrYgd9gYL70KgbDsZMdzbvuuA7OosHsVuuNDvEOOFqdxBsk1KN0+QPt7A0jiO4IsAPm3Jm8Y1K7Ax+Tx4gIJ7u1I6yDoAS+/+LiVONnR11H5A8IR75nxGzqCBJ8Sc+lsXoufPgwmWKQlSNFETpkxe20FX4eiNxfiz99SfrgF/3r6cVPUTGT5hxlB4s4Vm3vMQRmTwpd9RkwKgdH6XT830+5Ey3crGh1ylzn+msNk2BTrNQHIx8njHsATZ2g3vHuJeKxddjFWcLp0iT+IzetMaF8UmYj9JYwAzUD/xEq2CNlAW5TK43WW6wrWiSD/3Mi/VSlFBORBZyzck/pHGuU/zjiNpOJB/69azLa15N07yzkYafWQU0zV3DK0IEgjxQOCOA9pqt4cUyFavd1vXbYHWk0bzNVVtKJ69P6RJaQKiKuNHyaZXJAhj4QTjF1zoFm8fTTkzElDccBchEx/95Mu8Mb8N6q/2iMmcw6FiaUnloBLYEgjinXuYqgWU X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(376014)(36860700016)(921020)(18002099003)(22082099003)(56012099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: +qJ7A4eXoXlMGy0Npux2iUCT5tM+BqBiIjVyDeZJyt9oZv6k0tQ7baA8Lk0LujY0F6OlfRVz3vOKtqDz2swB0Ro3yAHq2vxVO/uFOThVTVpZVphZSObKrV7NyIEN8oPs3w64dLjSKdggE91MeiomyabYh4BrQZagAN4709sXa/mgyU5FQRw0h4aAomNOFA90zdeaf1HtOxkXRQ7it6EszGrWvcJxUeOF3esJq2IboCNQTWdADZelRy54npUz8cDLJpLTwMC9sOrI/6AVO1laorM5umG0TMlFM58K7PQrLdB57Wa2WKsJhkaqgPGHaLdSugSpgBufWIZ6cMjmQAsK8su4to0dQJxCNyEyatdzk00hEpgtOa8QwL97xV7EiUwbdG8WYxo9Lj1rtNNkNc9fPr0yXt2JxMyR29Gk91h7nGpconixZrgDmnTRdG6c1eMt X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Apr 2026 21:25:22.0829 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2442fa5e-9739-4a2a-eb9b-08de95b5577f X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B373.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4254 Content-Type: text/plain; charset="utf-8" Add AON GPIO and system LIC GTE instances for Tegra264. Signed-off-by: Suneel Garapati Acked-by: Dipen Patel --- arch/arm64/boot/dts/nvidia/tegra264.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra264.dtsi b/arch/arm64/boot/dts= /nvidia/tegra264.dtsi index 06d8357bdf52..c6630733d5e3 100644 --- a/arch/arm64/boot/dts/nvidia/tegra264.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra264.dtsi @@ -3207,6 +3207,15 @@ agic_page5: interrupt-controller@99b0000 { }; }; =20 + hte_lic: hardware-timestamp@8380000 { + compatible =3D "nvidia,tegra264-gte-lic"; + reg =3D <0x0 0x08380000 0x0 0x10000>; + interrupts =3D ; + nvidia,int-threshold =3D <1>; + #timestamp-cells =3D <1>; + status =3D "disabled"; + }; + gpcdma: dma-controller@8400000 { compatible =3D "nvidia,tegra264-gpcdma", "nvidia,tegra186-gpcdma"; reg =3D <0x0 0x08400000 0x0 0x210000>; @@ -3267,6 +3276,16 @@ hsp_top: hsp@8800000 { #mbox-cells =3D <2>; }; =20 + hte_aon: hardware-timestamp@c2b0000 { + compatible =3D "nvidia,tegra264-gte-aon"; + reg =3D <0x0 0x0c2b0000 0x0 0x10000>; + interrupts =3D ; + nvidia,int-threshold =3D <1>; + #timestamp-cells =3D <1>; + nvidia,gpio-controller =3D <&gpio_aon>; + status =3D "disabled"; + }; + rtc: rtc@c2c0000 { compatible =3D "nvidia,tegra264-rtc", "nvidia,tegra20-rtc"; reg =3D <0x0 0x0c2c0000 0x0 0x10000>; --=20 2.34.1