From nobody Sat Jun 13 19:10:24 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 717C53B583E; Wed, 8 Apr 2026 10:32:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775644339; cv=none; b=ZWb8CHpSqsgV9R8u2/btpoSj99zwt36Z7dATPGGmEg7TUHoxI9sml/2uUZyd5MLH3vd2/xbUejLVSqnsHA0w0Dg8OOWysIJCvbfr6QSCNcNjEHvCBfiGDkUfBjJEHPHRsoiaqsimTKZDW5dBtathjKgo2048p/jwbLJnxUtliFg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775644339; c=relaxed/simple; bh=cBchJ+EKmsukYB8TS4yvuEzAnxauSUKiuKhljDi4NjU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc; b=MMsWoxWSWhcwbjjDKFH0zR64xYGJyfdmE3IUCrseUh1YgFKlJQs2IwzSvwXz2theXNZS44phJ0ksmjqeOozj60oLum74HDYrzGJraLInEB9F7hQ5y32UVon8twvtKQsK2mIx1JcIokdlWuXgvzI5AYOXJrhEKbBkVMwlTgZ/QKA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=tEdm7NMK; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="tEdm7NMK" Received: by smtp.kernel.org (Postfix) with ESMTPS id 3097CC19424; Wed, 8 Apr 2026 10:32:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1775644339; bh=cBchJ+EKmsukYB8TS4yvuEzAnxauSUKiuKhljDi4NjU=; h=From:Date:Subject:To:Cc:Reply-To:From; b=tEdm7NMKE25TVeY7SK/KyG6i0JJfbNbc1WjsTrT6xop6S+HX2gvmm/aMQw9EyuIN3 Cmxja7LOAFDbWS8jEl/pv+dnBJIR4cNejZOQfLXNrJo5WboUJGv15iFB+ZlAckLCvZ XO2jzgO5vj6qnMZCKsA5AwLr5DXdJU4393ft20kWkYUkMzo5r+YAnYbhEIBO8TIHaj FCMve8qnHkJkNS8wqh9PgOeqLRif8bhcVdn7y7E5z0xxKD4Hk7UDwAWzA3U7si24ya qXy7lNN+rq9X33fKYGlKrejUL8IgQgBkRHd1+Sd5dk249GnKNhby3IBK6javs+9Eg0 cFFqrrxhlsVOA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B960FD5F79; Wed, 8 Apr 2026 10:32:19 +0000 (UTC) From: Radu Sabau via B4 Relay Date: Wed, 08 Apr 2026 13:32:13 +0300 Subject: [PATCH v3] iio: adc: ad4695: Fix call ordering in offload buffer postenable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260408-ad4696-fix-v3-1-37fe6e8d1d25@analog.com> X-B4-Tracking: v=1; b=H4sIAKwu1mkC/22MSwrCMBQAryJvbSQvPxNX3kNcpO2zDWgjiQSl9 O6m3UjB5QzMTJApBcpw2k2QqIQc4lhB7nfQDn7siYWuMgguDJeSM98p4wy7hTdDa5zW3rYaEWr wTFT1OrtcKw8hv2L6rO+Ci/27KciQkVVIziiNjTj70d9jf2jjA5ZPEb9Wcdy0orZCWd44L/lRu U07z/MXOl9JJuEAAAA= X-Change-ID: 20260330-ad4696-fix-186955a8c511 To: Lars-Peter Clausen , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , David Lechner , Jonathan Cameron , Andy Shevchenko Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, Jonathan Cameron , Radu Sabau X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1775644333; l=4155; i=radu.sabau@analog.com; s=20260220; h=from:subject:message-id; bh=meaEx+5eOnCshzOryh8iUzRER3yLb0rU+9apvG7SJTo=; b=roQ+/kwyq4jo5nJ/F/IT42iRBsxtEIe7m7HOZFYKRjAjzkqCyVp/crF9AjaeFGn4gZ4Eal49a 2x7z7Ic9aINDosW5CHCQSH5qTbw/6vpfEUovRDyWVUItZJVZOPPAfQw X-Developer-Key: i=radu.sabau@analog.com; a=ed25519; pk=lDPQHgn9jTdt0vo58Na9lLxLaE2mb330if71Cn+EvFU= X-Endpoint-Received: by B4 Relay for radu.sabau@analog.com/20260220 with auth_id=642 X-Original-From: Radu Sabau Reply-To: radu.sabau@analog.com From: Radu Sabau ad4695_enter_advanced_sequencer_mode() was called after spi_offload_trigger_enable(). That is wrong because ad4695_enter_advanced_sequencer_mode() issues regular SPI transfers to put the ADC into advanced sequencer mode, and not all SPI offload capable controllers support regular SPI transfers while offloading is enabled. Fix this by calling ad4695_enter_advanced_sequencer_mode() before spi_offload_trigger_enable(), so the ADC is fully configured before the first CNV pulse can occur. This is consistent with the same constraint that already applies to the BUSY_GP_EN write above it. Update the error unwind labels accordingly: add err_exit_conversion_mode so that a failure of spi_offload_trigger_enable() correctly exits conversion mode before clearing BUSY_GP_EN. Fixes: f09f140e3ea8 ("iio: adc: ad4695: Add support for SPI offload") Reviewed-by: Nuno S=C3=A1 Reviewed-by: David Lechner Signed-off-by: Radu Sabau --- ad4695_enter_advanced_sequencer_mode() issues regular SPI transfers to configure the ADC. These must complete before spi_offload_trigger_enable() enables the PWM/CNV trigger, because once CNV pulses are live the offload engine owns the SPI bus. This fixes the call ordering and updates the error unwind path accordingly. --- Changes in v3: - Reword commit message: "the offload engine owns the SPI bus; any concurrent regular SPI transfer produces undefined behaviour" =E2=86=92 "not all SPI offload capable controllers support regular SPI transfers while offloading is enabled". - Rename err_trigger_disable =E2=86=92 err_offload_trigger_disable to reduce diff churn. - Link to v2: https://lore.kernel.org/r/20260401-ad4696-fix-v2-1-2480b9a307= 49@analog.com Changes in v2: - Reword commit message to explain the correct bus-ownership invariant directly, without reference to the HDL bug that exposed it. - Remove unnecessary comment since the error path changed. - Link to v1: https://lore.kernel.org/r/20260330-ad4696-fix-v1-1-e841e96451= b2@analog.com --- drivers/iio/adc/ad4695.c | 23 ++++++++--------------- 1 file changed, 8 insertions(+), 15 deletions(-) diff --git a/drivers/iio/adc/ad4695.c b/drivers/iio/adc/ad4695.c index cda419638d9a..53642de7330d 100644 --- a/drivers/iio/adc/ad4695.c +++ b/drivers/iio/adc/ad4695.c @@ -876,14 +876,14 @@ static int ad4695_offload_buffer_postenable(struct ii= o_dev *indio_dev) if (ret) goto err_unoptimize_message; =20 - ret =3D spi_offload_trigger_enable(st->offload, st->offload_trigger, - &config); + ret =3D ad4695_enter_advanced_sequencer_mode(st, num_slots); if (ret) goto err_disable_busy_output; =20 - ret =3D ad4695_enter_advanced_sequencer_mode(st, num_slots); + ret =3D spi_offload_trigger_enable(st->offload, st->offload_trigger, + &config); if (ret) - goto err_offload_trigger_disable; + goto err_exit_conversion_mode; =20 mutex_lock(&st->cnv_pwm_lock); pwm_get_state(st->cnv_pwm, &state); @@ -895,23 +895,16 @@ static int ad4695_offload_buffer_postenable(struct ii= o_dev *indio_dev) ret =3D pwm_apply_might_sleep(st->cnv_pwm, &state); mutex_unlock(&st->cnv_pwm_lock); if (ret) - goto err_offload_exit_conversion_mode; + goto err_offload_trigger_disable; =20 return 0; =20 -err_offload_exit_conversion_mode: - /* - * We have to unwind in a different order to avoid triggering offload. - * ad4695_exit_conversion_mode() triggers a conversion, so it has to be - * done after spi_offload_trigger_disable(). - */ - spi_offload_trigger_disable(st->offload, st->offload_trigger); - ad4695_exit_conversion_mode(st); - goto err_disable_busy_output; - err_offload_trigger_disable: spi_offload_trigger_disable(st->offload, st->offload_trigger); =20 +err_exit_conversion_mode: + ad4695_exit_conversion_mode(st); + err_disable_busy_output: regmap_clear_bits(st->regmap, AD4695_REG_GP_MODE, AD4695_REG_GP_MODE_BUSY_GP_EN); --- base-commit: 11439c4635edd669ae435eec308f4ab8a0804808 change-id: 20260330-ad4696-fix-186955a8c511 Best regards, --=20 Radu Sabau