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Tue, 07 Apr 2026 06:03:25 -0700 (PDT) Received: from hu-krichai-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b2749794e8sm181564885ad.53.2026.04.07.06.03.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Apr 2026 06:03:24 -0700 (PDT) From: Krishna Chaitanya Chundru Date: Tue, 07 Apr 2026 18:33:08 +0530 Subject: [PATCH v4 1/5] PCI: host-common: Add helper to determine host bridge D3cold eligibility Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260407-d3cold-v4-1-bb171f75b465@oss.qualcomm.com> References: <20260407-d3cold-v4-0-bb171f75b465@oss.qualcomm.com> In-Reply-To: <20260407-d3cold-v4-0-bb171f75b465@oss.qualcomm.com> To: Jingoo Han , Manivannan Sadhasivam , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Will Deacon Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, jonathanh@nvidia.com, bjorn.andersson@oss.qualcomm.com, Krishna Chaitanya Chundru X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1775566994; l=5037; i=krishna.chundru@oss.qualcomm.com; s=20230907; h=from:subject:message-id; bh=77/I314LVY80VJYVakANAJH+wffpPLweMyKMYg0Una4=; b=r1GJebOmyKQ4qtkufVQselEhGDrMwX8o8kZA/JGziIc9JLDm5oPUn77lbC9tpF24nWy2xQMbi 0/q3x7aBMOHBF27p39O+NVYefOdrvXo2B2Lt545T5xRzzwSkpKUXMoR X-Developer-Key: i=krishna.chundru@oss.qualcomm.com; a=ed25519; pk=10CL2pdAKFyzyOHbfSWHCD0X0my7CXxj8gJScmn1FAg= X-Authority-Analysis: v=2.4 cv=OKEXGyaB c=1 sm=1 tr=0 ts=69d5009e cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=w2i6tlqj-xX_7Oe5WM0A:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-GUID: UZ6xvl7f0zPsCDnofV84vGyZL0V6cDmc X-Proofpoint-ORIG-GUID: UZ6xvl7f0zPsCDnofV84vGyZL0V6cDmc X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDA3MDEyMSBTYWx0ZWRfXwryaM8j2asL1 0TJrS+6135AXAF7EQPt+D30Xj633Ig1m/EUeoPwT/OPuKzkarhIb4Yu+gxlyaottZd2BQr/PZzo IIY8p/UNvs91HXk/NVHwqvLozRBLjIeOuTgAbisuj5IfZ7fnja1yhp1mPaDiM+VE7ZxtzOsLCmb 2KOtiqe4h2Wtg39cw1Omn3goLAnztBySVHUCGxO7iSjtE9zZNYUn/bLQmCfCATUCEbRzvKiS05Q BnR7iSAHX6RWIUZSuSRd5R4dja78/X5VHLsXXiwjvDTvhreItPPLMQBR0jOJMYj4OxkKRUv7Ar4 2BmIrqW0priacWENCSjsKv7HJT4MzOJiNb+mEPURNPwbehcq7EKsv78Y1pBdfaDiIIzvivWqzRr UPgOopUaLQR04AOSq3/1f8ead2LjfSr+bCIYhSHAuJCaULX/Yoi4kAukquAuff4zWWBU8wLug4y HovJdRrrxuTNGNGynuw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-07_02,2026-04-07_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 priorityscore=1501 spamscore=0 impostorscore=0 lowpriorityscore=0 clxscore=1015 adultscore=0 malwarescore=0 suspectscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604010000 definitions=main-2604070121 Add a common helper, pci_host_common_d3cold_possible(), to determine whether PCIe devices under host bridge can safely transition to D3cold. This helper is intended to be used by PCI host controller drivers to decide whether they may safely put the host bridge into D3cold based on the power state and wakeup capabilities of downstream endpoints. The helper walks all devices on the all bridge buses and only allows the devices to enter D3cold if all PCIe endpoints are already in PCI_D3hot. This ensures that we do not power off the host bridge while any active endpoint still requires the link to remain powered. For devices that may wake the system, the helper additionally requires that the device supports PME wake from D3cold (via WAKE#). Devices that do not have wakeup enabled are not restricted by this check and do not block the devices under host bridge from entering D3cold. Devices without a bound driver and with PCI not enabled via sysfs are treated as inactive and therefore do not prevent the devices under host bridge from entering D3cold. This allows controllers to power down more aggressively when there are no actively managed endpoints. Some devices (e.g. M.2 without auxiliary power) lose PME detection when main power is removed. Even if such devices advertise PME-from-D3cold capability, entering D3cold may break wakeup. So, return PME-from-D3cold capability via an output parameter so PCIe controller drivers can apply platform-specific handling to preserve wakeup functionality. Signed-off-by: Krishna Chaitanya Chundru --- drivers/pci/controller/pci-host-common.c | 63 ++++++++++++++++++++++++++++= ++++ drivers/pci/controller/pci-host-common.h | 2 + 2 files changed, 65 insertions(+) diff --git a/drivers/pci/controller/pci-host-common.c b/drivers/pci/control= ler/pci-host-common.c index d6258c1cffe5ec480fd2a7e50b3af39ef6ac4c8c..34e4c4c1d8c0fdead3e714525a4= 97b722a41392e 100644 --- a/drivers/pci/controller/pci-host-common.c +++ b/drivers/pci/controller/pci-host-common.c @@ -17,6 +17,9 @@ =20 #include "pci-host-common.h" =20 +#define PCI_HOST_D3COLD_ALLOWED BIT(0) +#define PCI_HOST_PME_D3COLD_CAPABLE BIT(1) + static void gen_pci_unmap_cfg(void *ptr) { pci_ecam_free((struct pci_config_window *)ptr); @@ -106,5 +109,65 @@ void pci_host_common_remove(struct platform_device *pd= ev) } EXPORT_SYMBOL_GPL(pci_host_common_remove); =20 +static int __pci_host_common_d3cold_possible(struct pci_dev *pdev, void *u= serdata) +{ + u32 *flags =3D userdata; + + if (pci_pcie_type(pdev) !=3D PCI_EXP_TYPE_ENDPOINT) + return 0; + + if (!pdev->dev.driver && !pci_is_enabled(pdev)) + return 0; + + if (pdev->current_state !=3D PCI_D3hot) + goto exit; + + if (device_may_wakeup(&pdev->dev)) { + if (!pci_pme_capable(pdev, PCI_D3cold)) + goto exit; + else + *flags |=3D PCI_HOST_PME_D3COLD_CAPABLE; + } + + return 0; + +exit: + *flags &=3D ~PCI_HOST_D3COLD_ALLOWED; + + return -EOPNOTSUPP; +} + +/** + * pci_host_common_d3cold_possible - Determine whether the host bridge can= transition the + * devices into D3Cold. + * + * @bridge: PCI host bridge to check + * @pme_capable: Pointer to update if there is any device which is capable= of generating + * PME from D3cold. + * + * Walk downstream PCIe endpoint devices and determine whether the host br= idge + * is permitted to transition the devices into D3cold. + * + * Devices under host bridge can enter D3cold only if all active PCIe endp= oints are in + * PCI_D3hot and any wakeup-enabled endpoint is capable of generating PME = from D3cold. + * Inactive endpoints are ignored. + * + * The @pme_capable output allows PCIe controller drivers to apply + * platform-specific handling to preserve wakeup functionality. + * + * Return: %true if the host bridge may enter D3cold, otherwise %false. + */ +bool pci_host_common_d3cold_possible(struct pci_host_bridge *bridge, bool = *pme_capable) +{ + u32 flags =3D PCI_HOST_D3COLD_ALLOWED; + + pci_walk_bus(bridge->bus, __pci_host_common_d3cold_possible, &flags); + + *pme_capable =3D !!(flags & PCI_HOST_PME_D3COLD_CAPABLE); + + return !!(flags & PCI_HOST_D3COLD_ALLOWED); +} +EXPORT_SYMBOL_GPL(pci_host_common_d3cold_possible); + MODULE_DESCRIPTION("Common library for PCI host controller drivers"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/pci/controller/pci-host-common.h b/drivers/pci/control= ler/pci-host-common.h index b5075d4bd7eb31fbf1dc946ef1a6afd5afb5b3c6..7eb5599b9ce4feb5c8ba2aa1f2e= 532b0cf3e1c03 100644 --- a/drivers/pci/controller/pci-host-common.h +++ b/drivers/pci/controller/pci-host-common.h @@ -20,4 +20,6 @@ void pci_host_common_remove(struct platform_device *pdev); =20 struct pci_config_window *pci_host_common_ecam_create(struct device *dev, struct pci_host_bridge *bridge, const struct pci_ecam_ops *ops); + +bool pci_host_common_d3cold_possible(struct pci_host_bridge *bridge, bool = *pme_capable); #endif --=20 2.34.1