From nobody Tue Apr 7 06:23:03 2026 Received: from mail-pl1-f201.google.com (mail-pl1-f201.google.com [209.85.214.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3220D3314C2 for ; Mon, 6 Apr 2026 23:40:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775518808; cv=none; b=qQ6OEkGZcCYkPDJcOO4+/jJpcevrtQOs+40BxpHoNbIk1zRIeTxwCcDLsCxuV5ksrnSd50U6TnYl+aPA/8UGw1RwcRnS2kbdA1VFIFqZKnv6GOpn8W4OKoHkUNBv5R7T6LB3CZauE4U3zLd3gJ9X6LaAUkJSS7BJ0BUziaeZSDE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775518808; c=relaxed/simple; bh=CWIkWtwpJeb4vHJFfC4PCEjDUMuaeBaM7uMpBBqmiGY=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=GtZFWADomT4g1cGWpJYWRMigydWN1iYiBGDtVkHHvrj18MXtdUF+qCgzW2vC2cMTPGmjv4TbLAr/3wQyCf3okJExn/Ui8gRS6KzxI/lDy+2gYFKrD8VP7wVbZFOFY26MNIlQf/POu3k58il/1w6D3WFTDESXEHsOznL3ISXeg4A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--hramamurthy.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=SKPywtaB; arc=none smtp.client-ip=209.85.214.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--hramamurthy.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="SKPywtaB" Received: by mail-pl1-f201.google.com with SMTP id d9443c01a7336-2b2523e0299so113620925ad.3 for ; Mon, 06 Apr 2026 16:40:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1775518806; x=1776123606; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=0BUO3CLc2gtSy2zH66hbdhPx8499IHw5WXw0lt20Nxg=; b=SKPywtaBp6QzXd60WcRm1nU40jxnxmNMlkpbwqS75hupo+Pnv/4PVrL+yOm0S4POb3 9jgMu1iDjlltZJO7RR4P67zpLCY/tFJUwxasPuZqH06OF65LpgybTe7uPTBMb2Bg4P8J yaMxaFWndOtZJiJNie928trflEySwNFwDYOhLGXzT0+H39qnhdmJQ9BcZUn51jRsFB/Z ZVNBsWzc94YIEgLainccW+KlIU8PFH3SVXlIO+QpIDBb76RFAiF5Evp8tKFI7BUlSjg/ JDsdDk+V9/0OvgEi6Lj1j925nmLdvyPMYOqsTVsunvU+02pkwxgldGEdD2G2ayuZukM+ P+eQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1775518806; x=1776123606; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=0BUO3CLc2gtSy2zH66hbdhPx8499IHw5WXw0lt20Nxg=; b=ZoQ/Bacyg3rdkc5t8qpbdzZ6sBBrnlmipePp0FZ0ccN/0aH6LHYijUDvTDs7s2ls17 L6difHwe/EeIjHC0LO3WIKpzCib0ndscr8MNwWtlRHKv4SGRM+JOxCf4mCJofCQwU0/4 T3Yw4q0XpYKeGh0s1OWtMD86IV0hxeann6T3nbJBLTpHKRT933LNPcuGxK35FhPX8mrM dHyofzou6ZJm/KYcjUorksz7MXPCIc89/AY2RJ1JVL+lamVTBFdjUADvAl81DqiGLXZu 335scuD47Qfhg4kYM5Ou4K26HOwWWicFCUztJGMQ3smxdvlNLuYeuyE2QaTNHCCZWTc7 86pA== X-Forwarded-Encrypted: i=1; AJvYcCX+Od2MTrt2AwsIzEJNuoKCrNdME4zwC2TQbh4YkJ//QxQEVialrn+k4xTg5VxvDFRnP5WIOe0KKOiTRlQ=@vger.kernel.org X-Gm-Message-State: AOJu0Ywmyn6X+5ZkjAff+KZKQ0hlDiLtrIseG/lVW3XKLjVo/mSC+NFt 3NQ2K866y+XBA6Mq5L3LG3ftnlzs4paz3qw5V29olbxkMjIQyLK3d14SF2p+WYNaqNBelqu8BJq ncv2LrBV813VILX2vNqog9L6dlw== X-Received: from pgbdp9.prod.google.com ([2002:a05:6a02:f09:b0:c73:bb62:5551]) (user=hramamurthy job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a20:b114:b0:39f:3559:7501 with SMTP id adf61e73a8af0-39f35597682mr9949018637.41.1775518806372; Mon, 06 Apr 2026 16:40:06 -0700 (PDT) Date: Mon, 6 Apr 2026 23:40:00 +0000 In-Reply-To: <20260406234002.3610542-1-hramamurthy@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260406234002.3610542-1-hramamurthy@google.com> X-Mailer: git-send-email 2.53.0.1213.gd9a14994de-goog Message-ID: <20260406234002.3610542-2-hramamurthy@google.com> Subject: [PATCH net-next v4 1/3] gve: skip error logging for retryable AdminQ commands From: Harshitha Ramamurthy To: netdev@vger.kernel.org Cc: joshwash@google.com, hramamurthy@google.com, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, richardcochran@gmail.com, willemb@google.com, nktgrg@google.com, jfraker@google.com, ziweixiao@google.com, maolson@google.com, thostet@google.com, jordanrhee@google.com, jefrogers@google.com, alok.a.tiwari@oracle.com, yyd@google.com, jacob.e.keller@intel.com, linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jordan Rhee AdminQ commands may return -EAGAIN under certain transient conditions. These commands are intended to be retried by the driver, so logging a formal error to the system log is misleading and creates unnecessary noise. Modify the logging logic to skip the error message when the result is -EAGAIN, and move logging to dev_err_ratelimited() to avoid spamming the log. Reviewed-by: Joshua Washington Signed-off-by: Jordan Rhee Signed-off-by: Harshitha Ramamurthy --- Changes in v4: - call out change to dev_err_ratelimited() in the commit message (Jacob Kel= ler) - remove extra print when adminQ status is GVE_ADMINQ_COMMAND_UNSET (Jacob = Keller) --- drivers/net/ethernet/google/gve/gve_adminq.c | 27 +++++++++++++++----- 1 file changed, 20 insertions(+), 7 deletions(-) diff --git a/drivers/net/ethernet/google/gve/gve_adminq.c b/drivers/net/eth= ernet/google/gve/gve_adminq.c index 08587bf40ed4..a65b14835aa0 100644 --- a/drivers/net/ethernet/google/gve/gve_adminq.c +++ b/drivers/net/ethernet/google/gve/gve_adminq.c @@ -416,16 +416,10 @@ static bool gve_adminq_wait_for_cmd(struct gve_priv *= priv, u32 prod_cnt) =20 static int gve_adminq_parse_err(struct gve_priv *priv, u32 status) { - if (status !=3D GVE_ADMINQ_COMMAND_PASSED && - status !=3D GVE_ADMINQ_COMMAND_UNSET) { - dev_err(&priv->pdev->dev, "AQ command failed with status %d\n", status); - priv->adminq_cmd_fail++; - } switch (status) { case GVE_ADMINQ_COMMAND_PASSED: return 0; case GVE_ADMINQ_COMMAND_UNSET: - dev_err(&priv->pdev->dev, "parse_aq_err: err and status both unset, this= should not be possible.\n"); return -EINVAL; case GVE_ADMINQ_COMMAND_ERROR_ABORTED: case GVE_ADMINQ_COMMAND_ERROR_CANCELLED: @@ -455,6 +449,16 @@ static int gve_adminq_parse_err(struct gve_priv *priv,= u32 status) } } =20 +static bool gve_adminq_is_retryable(enum gve_adminq_opcodes opcode) +{ + switch (opcode) { + case GVE_ADMINQ_REPORT_NIC_TIMESTAMP: + return true; + default: + return false; + } +} + /* Flushes all AQ commands currently queued and waits for them to complete. * If there are failures, it will return the first error. */ @@ -482,9 +486,18 @@ static int gve_adminq_kick_and_wait(struct gve_priv *p= riv) cmd =3D &priv->adminq[i & priv->adminq_mask]; status =3D be32_to_cpu(READ_ONCE(cmd->status)); err =3D gve_adminq_parse_err(priv, status); - if (err) + if (err) { + enum gve_adminq_opcodes opcode =3D + be32_to_cpu(READ_ONCE(cmd->opcode)); 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charset="utf-8" From: Ankit Garg Add a mutex to protect the shared DMA buffer that receives NIC timestamp reports. The NIC timestamp will be read from two different threads: the periodic worker and upcoming `gettimex64`. Move clock registration to the last step of initialization to ensure that all data needed by the clock module is initialized before the clock is exposed to usermode. Reviewed-by: Joshua Washington Signed-off-by: Ankit Garg Signed-off-by: Jordan Rhee Signed-off-by: Harshitha Ramamurthy --- Changes in v3: - Reorder init/teardown to register PTP clock last, and simplify code - Move ptp-related members from gve_priv to gve_ptp - Only assign priv->ptp after ptp module is successfully initialized --- drivers/net/ethernet/google/gve/gve.h | 12 +- drivers/net/ethernet/google/gve/gve_ethtool.c | 3 +- drivers/net/ethernet/google/gve/gve_ptp.c | 134 ++++++++---------- 3 files changed, 63 insertions(+), 86 deletions(-) diff --git a/drivers/net/ethernet/google/gve/gve.h b/drivers/net/ethernet/g= oogle/gve/gve.h index 1d66d3834f7e..7b69d0cfc0d5 100644 --- a/drivers/net/ethernet/google/gve/gve.h +++ b/drivers/net/ethernet/google/gve/gve.h @@ -792,6 +792,9 @@ struct gve_ptp { struct ptp_clock_info info; struct ptp_clock *clock; struct gve_priv *priv; + struct mutex nic_ts_read_lock; /* Protects nic_ts_report */ + struct gve_nic_ts_report *nic_ts_report; + dma_addr_t nic_ts_report_bus; }; =20 struct gve_priv { @@ -923,8 +926,6 @@ struct gve_priv { bool nic_timestamp_supported; struct gve_ptp *ptp; struct kernel_hwtstamp_config ts_config; - struct gve_nic_ts_report *nic_ts_report; - dma_addr_t nic_ts_report_bus; u64 last_sync_nic_counter; /* Clock counter from last NIC TS report */ }; =20 @@ -1201,7 +1202,7 @@ static inline bool gve_supports_xdp_xmit(struct gve_p= riv *priv) =20 static inline bool gve_is_clock_enabled(struct gve_priv *priv) { - return priv->nic_ts_report; + return priv->ptp; } =20 /* gqi napi handler defined in gve_main.c */ @@ -1321,14 +1322,9 @@ int gve_flow_rules_reset(struct gve_priv *priv); int gve_init_rss_config(struct gve_priv *priv, u16 num_queues); /* PTP and timestamping */ #if IS_ENABLED(CONFIG_PTP_1588_CLOCK) -int gve_clock_nic_ts_read(struct gve_priv *priv); int gve_init_clock(struct gve_priv *priv); void gve_teardown_clock(struct gve_priv *priv); #else /* CONFIG_PTP_1588_CLOCK */ -static inline int gve_clock_nic_ts_read(struct gve_priv *priv) -{ - return -EOPNOTSUPP; -} =20 static inline int gve_init_clock(struct gve_priv *priv) { diff --git a/drivers/net/ethernet/google/gve/gve_ethtool.c b/drivers/net/et= hernet/google/gve/gve_ethtool.c index dc2213b5ce24..4fd7e8a442c5 100644 --- a/drivers/net/ethernet/google/gve/gve_ethtool.c +++ b/drivers/net/ethernet/google/gve/gve_ethtool.c @@ -972,8 +972,7 @@ static int gve_get_ts_info(struct net_device *netdev, info->rx_filters |=3D BIT(HWTSTAMP_FILTER_NONE) | BIT(HWTSTAMP_FILTER_ALL); =20 - if (priv->ptp) - info->phc_index =3D ptp_clock_index(priv->ptp->clock); + info->phc_index =3D ptp_clock_index(priv->ptp->clock); } =20 return 0; diff --git a/drivers/net/ethernet/google/gve/gve_ptp.c b/drivers/net/ethern= et/google/gve/gve_ptp.c index 06b1cf4a5efc..ad15f1209a83 100644 --- a/drivers/net/ethernet/google/gve/gve_ptp.c +++ b/drivers/net/ethernet/google/gve/gve_ptp.c @@ -11,19 +11,20 @@ #define GVE_NIC_TS_SYNC_INTERVAL_MS 250 =20 /* Read the nic timestamp from hardware via the admin queue. */ -int gve_clock_nic_ts_read(struct gve_priv *priv) +static int gve_clock_nic_ts_read(struct gve_ptp *ptp, u64 *nic_raw) { - u64 nic_raw; int err; =20 - err =3D gve_adminq_report_nic_ts(priv, priv->nic_ts_report_bus); + mutex_lock(&ptp->nic_ts_read_lock); + err =3D gve_adminq_report_nic_ts(ptp->priv, ptp->nic_ts_report_bus); if (err) - return err; + goto out; =20 - nic_raw =3D be64_to_cpu(priv->nic_ts_report->nic_timestamp); - WRITE_ONCE(priv->last_sync_nic_counter, nic_raw); + *nic_raw =3D be64_to_cpu(ptp->nic_ts_report->nic_timestamp); =20 - return 0; +out: + mutex_unlock(&ptp->nic_ts_read_lock); + return err; } =20 static int gve_ptp_gettimex64(struct ptp_clock_info *info, @@ -41,17 +42,21 @@ static int gve_ptp_settime64(struct ptp_clock_info *inf= o, =20 static long gve_ptp_do_aux_work(struct ptp_clock_info *info) { - const struct gve_ptp *ptp =3D container_of(info, struct gve_ptp, info); + struct gve_ptp *ptp =3D container_of(info, struct gve_ptp, info); struct gve_priv *priv =3D ptp->priv; + u64 nic_raw; int err; =20 if (gve_get_reset_in_progress(priv) || !gve_get_admin_queue_ok(priv)) goto out; =20 - err =3D gve_clock_nic_ts_read(priv); - if (err && net_ratelimit()) - dev_err(&priv->pdev->dev, - "%s read err %d\n", __func__, err); + err =3D gve_clock_nic_ts_read(ptp, &nic_raw); + if (err) { + dev_err_ratelimited(&priv->pdev->dev, "%s read err %d\n", + __func__, err); + goto out; + } + WRITE_ONCE(priv->last_sync_nic_counter, nic_raw); =20 out: return msecs_to_jiffies(GVE_NIC_TS_SYNC_INTERVAL_MS); @@ -65,94 +70,71 @@ static const struct ptp_clock_info gve_ptp_caps =3D { .do_aux_work =3D gve_ptp_do_aux_work, }; =20 -static int gve_ptp_init(struct gve_priv *priv) +int gve_init_clock(struct gve_priv *priv) { struct gve_ptp *ptp; + u64 nic_raw; int err; =20 - priv->ptp =3D kzalloc_obj(*priv->ptp); - if (!priv->ptp) + ptp =3D kzalloc_obj(*priv->ptp); + if (!ptp) return -ENOMEM; =20 - ptp =3D priv->ptp; ptp->info =3D gve_ptp_caps; - ptp->clock =3D ptp_clock_register(&ptp->info, &priv->pdev->dev); - - if (IS_ERR(ptp->clock)) { - dev_err(&priv->pdev->dev, "PTP clock registration failed\n"); - err =3D PTR_ERR(ptp->clock); - goto free_ptp; - } - ptp->priv =3D priv; - return 0; - -free_ptp: - kfree(ptp); - priv->ptp =3D NULL; - return err; -} - -static void gve_ptp_release(struct gve_priv *priv) -{ - struct gve_ptp *ptp =3D priv->ptp; - - if (!ptp) - return; - - if (ptp->clock) - ptp_clock_unregister(ptp->clock); - - kfree(ptp); - priv->ptp =3D NULL; -} - -int gve_init_clock(struct gve_priv *priv) -{ - int err; - - err =3D gve_ptp_init(priv); - if (err) - return err; - - priv->nic_ts_report =3D + mutex_init(&ptp->nic_ts_read_lock); + ptp->nic_ts_report =3D dma_alloc_coherent(&priv->pdev->dev, sizeof(struct gve_nic_ts_report), - &priv->nic_ts_report_bus, - GFP_KERNEL); - if (!priv->nic_ts_report) { + &ptp->nic_ts_report_bus, GFP_KERNEL); + if (!ptp->nic_ts_report) { dev_err(&priv->pdev->dev, "%s dma alloc error\n", __func__); err =3D -ENOMEM; - goto release_ptp; + goto free_ptp; } - err =3D gve_clock_nic_ts_read(priv); + + err =3D gve_clock_nic_ts_read(ptp, &nic_raw); if (err) { dev_err(&priv->pdev->dev, "failed to read NIC clock %d\n", err); - goto release_nic_ts_report; + goto free_dma_mem; } - ptp_schedule_worker(priv->ptp->clock, + WRITE_ONCE(priv->last_sync_nic_counter, nic_raw); + + ptp->clock =3D ptp_clock_register(&ptp->info, &priv->pdev->dev); + if (IS_ERR(ptp->clock)) { + dev_err(&priv->pdev->dev, "PTP clock registration failed\n"); + err =3D PTR_ERR(ptp->clock); + goto free_dma_mem; + } + + priv->ptp =3D ptp; + ptp_schedule_worker(ptp->clock, msecs_to_jiffies(GVE_NIC_TS_SYNC_INTERVAL_MS)); =20 return 0; =20 -release_nic_ts_report: - dma_free_coherent(&priv->pdev->dev, - sizeof(struct gve_nic_ts_report), - priv->nic_ts_report, priv->nic_ts_report_bus); - priv->nic_ts_report =3D NULL; -release_ptp: - gve_ptp_release(priv); +free_dma_mem: + dma_free_coherent(&priv->pdev->dev, sizeof(struct gve_nic_ts_report), + ptp->nic_ts_report, ptp->nic_ts_report_bus); + ptp->nic_ts_report =3D NULL; +free_ptp: + mutex_destroy(&ptp->nic_ts_read_lock); + kfree(ptp); return err; } =20 void gve_teardown_clock(struct gve_priv *priv) { - gve_ptp_release(priv); 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Mon, 06 Apr 2026 16:40:09 -0700 (PDT) Date: Mon, 6 Apr 2026 23:40:02 +0000 In-Reply-To: <20260406234002.3610542-1-hramamurthy@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260406234002.3610542-1-hramamurthy@google.com> X-Mailer: git-send-email 2.53.0.1213.gd9a14994de-goog Message-ID: <20260406234002.3610542-4-hramamurthy@google.com> Subject: [PATCH net-next v4 3/3] gve: implement PTP gettimex64 From: Harshitha Ramamurthy To: netdev@vger.kernel.org Cc: joshwash@google.com, hramamurthy@google.com, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, richardcochran@gmail.com, willemb@google.com, nktgrg@google.com, jfraker@google.com, ziweixiao@google.com, maolson@google.com, thostet@google.com, jordanrhee@google.com, jefrogers@google.com, alok.a.tiwari@oracle.com, yyd@google.com, jacob.e.keller@intel.com, linux-kernel@vger.kernel.org, Naman Gulati Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jordan Rhee Enable chrony and phc2sys to synchronize system clock to NIC clock. The system cycle counters are sampled by the device to minimize the uncertainty window. If the system times are sampled in the host, the delta between pre and post readings is 100us or more due to AQ command latency. The system times returned by the device have a delta of ~1us, which enables significantly more accurate clock synchronization. Reviewed-by: Willem de Bruijn Reviewed-by: Kevin Yang Reviewed-by: Naman Gulati Signed-off-by: Jordan Rhee Signed-off-by: Harshitha Ramamurthy --- Changes in v3: - Take system time snapshot inside the mutex - Return -EOPNOTSUPP if cross-timestamp is requested on an arch other than x86 or arm64 Changes in v2: - fix compilation warning on ARM by casting cycles_t to u64 --- drivers/net/ethernet/google/gve/gve_adminq.h | 4 +- drivers/net/ethernet/google/gve/gve_ptp.c | 197 ++++++++++++++++++- 2 files changed, 192 insertions(+), 9 deletions(-) diff --git a/drivers/net/ethernet/google/gve/gve_adminq.h b/drivers/net/eth= ernet/google/gve/gve_adminq.h index 22a74b6aa17e..e6dcf6da9091 100644 --- a/drivers/net/ethernet/google/gve/gve_adminq.h +++ b/drivers/net/ethernet/google/gve/gve_adminq.h @@ -411,8 +411,8 @@ static_assert(sizeof(struct gve_adminq_report_nic_ts) = =3D=3D 16); =20 struct gve_nic_ts_report { __be64 nic_timestamp; /* NIC clock in nanoseconds */ - __be64 reserved1; - __be64 reserved2; + __be64 pre_cycles; /* System cycle counter before NIC clock read */ + __be64 post_cycles; /* System cycle counter after NIC clock read */ __be64 reserved3; __be64 reserved4; }; diff --git a/drivers/net/ethernet/google/gve/gve_ptp.c b/drivers/net/ethern= et/google/gve/gve_ptp.c index ad15f1209a83..530f8d00e51a 100644 --- a/drivers/net/ethernet/google/gve/gve_ptp.c +++ b/drivers/net/ethernet/google/gve/gve_ptp.c @@ -10,28 +10,211 @@ /* Interval to schedule a nic timestamp calibration, 250ms. */ #define GVE_NIC_TS_SYNC_INTERVAL_MS 250 =20 +/* + * Stores cycle counter samples in get_cycles() units from a + * sandwiched NIC clock read + */ +struct gve_sysclock_sample { + /* system time snapshot taken just before issuing AdminQ command */ + struct system_time_snapshot snapshot; + /* Cycle counter from NIC before clock read */ + u64 nic_pre_cycles; + /* Cycle counter from NIC after clock read */ + u64 nic_post_cycles; + /* Cycle counter from host before issuing AQ command */ + cycles_t host_pre_cycles; + /* Cycle counter from host after AQ command returns */ + cycles_t host_post_cycles; +}; + +/* + * Read NIC clock by issuing the AQ command. The command is subject to + * rate limiting and may need to be retried. Requires nic_ts_read_lock + * to be held. + */ +static int gve_ptp_read_timestamp(struct gve_ptp *ptp, cycles_t *pre_cycle= s, + cycles_t *post_cycles, + struct system_time_snapshot *snap) +{ + unsigned long delay_us =3D 1000; + int retry_count =3D 0; + int err; + + lockdep_assert_held(&ptp->nic_ts_read_lock); + + do { + if (snap) + ktime_get_snapshot(snap); + + *pre_cycles =3D get_cycles(); + err =3D gve_adminq_report_nic_ts(ptp->priv, + ptp->nic_ts_report_bus); + + /* Prevent get_cycles() from being speculatively executed + * before the AdminQ command + */ + rmb(); + *post_cycles =3D get_cycles(); + if (likely(err !=3D -EAGAIN)) + return err; + + fsleep(delay_us); + + /* Exponential backoff */ + delay_us *=3D 2; + retry_count++; + } while (retry_count < 5); + + return -ETIMEDOUT; +} + /* Read the nic timestamp from hardware via the admin queue. */ -static int gve_clock_nic_ts_read(struct gve_ptp *ptp, u64 *nic_raw) +static int gve_clock_nic_ts_read(struct gve_ptp *ptp, u64 *nic_raw, + struct gve_sysclock_sample *sysclock) { + cycles_t host_pre_cycles, host_post_cycles; + struct gve_nic_ts_report *ts_report; int err; =20 mutex_lock(&ptp->nic_ts_read_lock); - err =3D gve_adminq_report_nic_ts(ptp->priv, ptp->nic_ts_report_bus); - if (err) + err =3D gve_ptp_read_timestamp(ptp, &host_pre_cycles, &host_post_cycles, + sysclock ? &sysclock->snapshot : NULL); + if (err) { + dev_err_ratelimited(&ptp->priv->pdev->dev, + "AdminQ timestamp read failed: %d\n", err); goto out; + } =20 - *nic_raw =3D be64_to_cpu(ptp->nic_ts_report->nic_timestamp); + ts_report =3D ptp->nic_ts_report; + *nic_raw =3D be64_to_cpu(ts_report->nic_timestamp); + + if (sysclock) { + sysclock->nic_pre_cycles =3D be64_to_cpu(ts_report->pre_cycles); + sysclock->nic_post_cycles =3D be64_to_cpu(ts_report->post_cycles); + sysclock->host_pre_cycles =3D host_pre_cycles; + sysclock->host_post_cycles =3D host_post_cycles; + } =20 out: mutex_unlock(&ptp->nic_ts_read_lock); return err; } =20 +struct gve_cycles_to_clock_callback_ctx { + u64 cycles; +}; + +static int gve_cycles_to_clock_fn(ktime_t *device_time, + struct system_counterval_t *system_counterval, + void *ctx) +{ + struct gve_cycles_to_clock_callback_ctx *context =3D ctx; + + *device_time =3D 0; + + system_counterval->cycles =3D context->cycles; + system_counterval->use_nsecs =3D false; + + if (IS_ENABLED(CONFIG_X86)) + system_counterval->cs_id =3D CSID_X86_TSC; + else if (IS_ENABLED(CONFIG_ARM64)) + system_counterval->cs_id =3D CSID_ARM_ARCH_COUNTER; + else + return -EOPNOTSUPP; + + return 0; +} + +/* + * Convert a raw cycle count (e.g. from get_cycles()) to the system clock + * type specified by clockid. The system_time_snapshot must be taken before + * the cycle counter is sampled. + */ +static int gve_cycles_to_timespec64(struct gve_priv *priv, clockid_t clock= id, + struct system_time_snapshot *snap, + u64 cycles, struct timespec64 *ts) +{ + struct gve_cycles_to_clock_callback_ctx ctx =3D {0}; + struct system_device_crosststamp xtstamp; + int err; + + ctx.cycles =3D cycles; + err =3D get_device_system_crosststamp(gve_cycles_to_clock_fn, &ctx, snap, + &xtstamp); + if (err) { + dev_err_ratelimited(&priv->pdev->dev, + "get_device_system_crosststamp() failed to convert %lld cycles to = system time: %d\n", + cycles, + err); + return err; + } + + switch (clockid) { + case CLOCK_REALTIME: + *ts =3D ktime_to_timespec64(xtstamp.sys_realtime); + break; + case CLOCK_MONOTONIC_RAW: + *ts =3D ktime_to_timespec64(xtstamp.sys_monoraw); + break; + default: + dev_err_ratelimited(&priv->pdev->dev, + "Cycle count conversion to clockid %d not supported\n", + clockid); + return -EOPNOTSUPP; + } + + return 0; +} + static int gve_ptp_gettimex64(struct ptp_clock_info *info, struct timespec64 *ts, struct ptp_system_timestamp *sts) { - return -EOPNOTSUPP; + struct gve_ptp *ptp =3D container_of(info, struct gve_ptp, info); + struct gve_sysclock_sample sysclock =3D {0}; + struct gve_priv *priv =3D ptp->priv; + u64 nic_ts; + int err; + + if (sts && !(IS_ENABLED(CONFIG_X86) || IS_ENABLED(CONFIG_ARM64))) + return -EOPNOTSUPP; + + err =3D gve_clock_nic_ts_read(ptp, &nic_ts, sts ? &sysclock : NULL); + if (err) + return err; + + if (sts) { + /* Reject samples with out of order system clock values */ + if (!(sysclock.host_pre_cycles <=3D sysclock.nic_pre_cycles && + sysclock.nic_pre_cycles <=3D sysclock.nic_post_cycles && + sysclock.nic_post_cycles <=3D sysclock.host_post_cycles)) { + dev_err_ratelimited(&priv->pdev->dev, + "AdminQ system clock cycle counts out of order. Expecting %llu <= =3D %llu <=3D %llu <=3D %llu\n", + (u64)sysclock.host_pre_cycles, + sysclock.nic_pre_cycles, + sysclock.nic_post_cycles, + (u64)sysclock.host_post_cycles); + return -EBADMSG; + } + + err =3D gve_cycles_to_timespec64(priv, sts->clockid, + &sysclock.snapshot, + sysclock.nic_pre_cycles, + &sts->pre_ts); + if (err) + return err; + + err =3D gve_cycles_to_timespec64(priv, sts->clockid, + &sysclock.snapshot, + sysclock.nic_post_cycles, + &sts->post_ts); + if (err) + return err; + } + + *ts =3D ns_to_timespec64(nic_ts); + + return 0; } =20 static int gve_ptp_settime64(struct ptp_clock_info *info, @@ -50,7 +233,7 @@ static long gve_ptp_do_aux_work(struct ptp_clock_info *i= nfo) if (gve_get_reset_in_progress(priv) || !gve_get_admin_queue_ok(priv)) goto out; =20 - err =3D gve_clock_nic_ts_read(ptp, &nic_raw); + err =3D gve_clock_nic_ts_read(ptp, &nic_raw, NULL); if (err) { dev_err_ratelimited(&priv->pdev->dev, "%s read err %d\n", __func__, err); @@ -93,7 +276,7 @@ int gve_init_clock(struct gve_priv *priv) goto free_ptp; } =20 - err =3D gve_clock_nic_ts_read(ptp, &nic_raw); + err =3D gve_clock_nic_ts_read(ptp, &nic_raw, NULL); if (err) { dev_err(&priv->pdev->dev, "failed to read NIC clock %d\n", err); goto free_dma_mem; --=20 2.53.0.1213.gd9a14994de-goog