From nobody Fri Apr 3 10:24:59 2026 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 8DA273CD8CC; Thu, 2 Apr 2026 13:08:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775135305; cv=none; b=cbiBfKaVneIRnOY4242wNAwCR71nDUcF4jFK4/I7R/YuNXZntQ71Ih3DGPGOwy22tixgea1HuudOzrwLesM3tX+gxIjaL/de0nt9fK4dlOha7A49DyC5xduSL9O2UVoP98o6qc5+vc0LVx6TXzvWppxtzfbPjRCEOTRPmkYnCp0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775135305; c=relaxed/simple; bh=0pzuAWzpVngTq7uFimeChvbs2L1mwTDF67Lt+JPnBPo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=AeWe7aYLzrXV3z23aE2Xg2ywCvoKIwBgw2mcME2XkqW/N6UBX1fgvy9WyiZaAzkpfbjwuEXKPKW702WwvgyBOqPzT4LGwI9/MpOfMVGXOaDRvJG7pNggItmnA9DoWBLT7jCsbIPEeEGq1b614UjKMMPmrDlfC45eAm3pF0UspNU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8AxgsA_as5pSDchAA--.34768S3; Thu, 02 Apr 2026 21:08:15 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by front1 (Coremail) with SMTP id qMiowJCx+8E6as5p6oJjAA--.58940S3; Thu, 02 Apr 2026 21:08:14 +0800 (CST) From: Song Gao To: maobibo@loongson.cn, chenhuacai@kernel.org Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, kernel@xen0n.name, linux-kernel@vger.kernel.org, lixianglai@loongson.cn Subject: [PATCH v9 1/2] LoongArch: KVM: Add DMSINTC device support Date: Thu, 2 Apr 2026 20:42:36 +0800 Message-Id: <20260402124237.4174550-2-gaosong@loongson.cn> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20260402124237.4174550-1-gaosong@loongson.cn> References: <20260402124237.4174550-1-gaosong@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJCx+8E6as5p6oJjAA--.58940S3 X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" Add device model for DMSINTC interrupt controller, implement basic create/destroy/set_attr interfaces, and register device model to kvm device table. Reviewed-by: Bibo Mao Signed-off-by: Song Gao --- arch/loongarch/include/asm/kvm_dmsintc.h | 21 ++++ arch/loongarch/include/asm/kvm_host.h | 3 + arch/loongarch/include/uapi/asm/kvm.h | 4 + arch/loongarch/kvm/Makefile | 1 + arch/loongarch/kvm/intc/dmsintc.c | 117 +++++++++++++++++++++++ arch/loongarch/kvm/main.c | 6 ++ include/uapi/linux/kvm.h | 2 + 7 files changed, 154 insertions(+) create mode 100644 arch/loongarch/include/asm/kvm_dmsintc.h create mode 100644 arch/loongarch/kvm/intc/dmsintc.c diff --git a/arch/loongarch/include/asm/kvm_dmsintc.h b/arch/loongarch/incl= ude/asm/kvm_dmsintc.h new file mode 100644 index 000000000000..b04b89dd2a35 --- /dev/null +++ b/arch/loongarch/include/asm/kvm_dmsintc.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2025 Loongson Technology Corporation Limited + */ + +#ifndef __ASM_KVM_DMSINTC_H +#define __ASM_KVM_DMSINTC_H + + +struct loongarch_dmsintc { + struct kvm *kvm; + uint64_t msg_addr_base; + uint64_t msg_addr_size; +}; + +struct dmsintc_state { + atomic64_t vector_map[4]; +}; + +int kvm_loongarch_register_dmsintc_device(void); +#endif diff --git a/arch/loongarch/include/asm/kvm_host.h b/arch/loongarch/include= /asm/kvm_host.h index 19eb5e5c3984..6a8d72cf8e4e 100644 --- a/arch/loongarch/include/asm/kvm_host.h +++ b/arch/loongarch/include/asm/kvm_host.h @@ -22,6 +22,7 @@ #include #include #include +#include #include =20 #define __KVM_HAVE_ARCH_INTC_INITIALIZED @@ -135,6 +136,7 @@ struct kvm_arch { struct loongarch_ipi *ipi; struct loongarch_eiointc *eiointc; struct loongarch_pch_pic *pch_pic; + struct loongarch_dmsintc *dmsintc; }; =20 #define CSR_MAX_NUMS 0x800 @@ -247,6 +249,7 @@ struct kvm_vcpu_arch { struct kvm_mp_state mp_state; /* ipi state */ struct ipi_state ipi_state; + struct dmsintc_state dmsintc_state; /* cpucfg */ u32 cpucfg[KVM_MAX_CPUCFG_REGS]; =20 diff --git a/arch/loongarch/include/uapi/asm/kvm.h b/arch/loongarch/include= /uapi/asm/kvm.h index 419647aacdf3..c39b8ac7a90a 100644 --- a/arch/loongarch/include/uapi/asm/kvm.h +++ b/arch/loongarch/include/uapi/asm/kvm.h @@ -155,4 +155,8 @@ struct kvm_iocsr_entry { #define KVM_DEV_LOONGARCH_PCH_PIC_GRP_CTRL 0x40000006 #define KVM_DEV_LOONGARCH_PCH_PIC_CTRL_INIT 0 =20 +#define KVM_DEV_LOONGARCH_DMSINTC_CTRL 0x40000007 +#define KVM_DEV_LOONGARCH_DMSINTC_MSG_ADDR_BASE 0x0 +#define KVM_DEV_LOONGARCH_DMSINTC_MSG_ADDR_SIZE 0x1 + #endif /* __UAPI_ASM_LOONGARCH_KVM_H */ diff --git a/arch/loongarch/kvm/Makefile b/arch/loongarch/kvm/Makefile index cb41d9265662..6e184e24443c 100644 --- a/arch/loongarch/kvm/Makefile +++ b/arch/loongarch/kvm/Makefile @@ -19,6 +19,7 @@ kvm-y +=3D vm.o kvm-y +=3D intc/ipi.o kvm-y +=3D intc/eiointc.o kvm-y +=3D intc/pch_pic.o +kvm-y +=3D intc/dmsintc.o kvm-y +=3D irqfd.o =20 CFLAGS_exit.o +=3D $(call cc-disable-warning, override-init) diff --git a/arch/loongarch/kvm/intc/dmsintc.c b/arch/loongarch/kvm/intc/dm= sintc.c new file mode 100644 index 000000000000..1bb61e55d061 --- /dev/null +++ b/arch/loongarch/kvm/intc/dmsintc.c @@ -0,0 +1,117 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2025 Loongson Technology Corporation Limited + */ + +#include +#include +#include + +static int kvm_dmsintc_ctrl_access(struct kvm_device *dev, + struct kvm_device_attr *attr, + bool is_write) +{ + int addr =3D attr->attr; + void __user *data; + struct loongarch_dmsintc *s =3D dev->kvm->arch.dmsintc; + u64 tmp; + u32 cpu_bit; + + data =3D (void __user *)attr->addr; + switch (addr) { + case KVM_DEV_LOONGARCH_DMSINTC_MSG_ADDR_BASE: + if (is_write) { + if (copy_from_user(&tmp, data, sizeof(s->msg_addr_base))) + return -EFAULT; + if (s->msg_addr_base) { + /* Duplicate setting are not allowed. */ + return -EFAULT; + } + if ((tmp & (BIT(AVEC_CPU_SHIFT) - 1)) =3D=3D 0) + s->msg_addr_base =3D tmp; + else + return -EFAULT; + s->msg_addr_base =3D tmp; + cpu_bit =3D find_first_bit((unsigned long *)&(s->msg_addr_base), 64) + - AVEC_CPU_SHIFT; + cpu_bit =3D min(cpu_bit, AVEC_CPU_BIT); + s->cpu_mask =3D GENMASK(cpu_bit - 1, 0) & AVEC_CPU_MASK; + } + break; + case KVM_DEV_LOONGARCH_DMSINTC_MSG_ADDR_SIZE: + if (is_write) { + if (copy_from_user(&tmp, data, sizeof(s->msg_addr_size))) + return -EFAULT; + if (s->msg_addr_size) { + /*Duplicate setting are not allowed. */ + return -EFAULT; + } + s->msg_addr_size =3D tmp; + } + break; + default: + kvm_err("%s: unknown dmsintc register, addr =3D %d\n", __func__, addr); + return -ENXIO; + } + + return 0; +} + +static int kvm_dmsintc_set_attr(struct kvm_device *dev, + struct kvm_device_attr *attr) +{ + switch (attr->group) { + case KVM_DEV_LOONGARCH_DMSINTC_CTRL: + return kvm_dmsintc_ctrl_access(dev, attr, true); + default: + kvm_err("%s: unknown group (%d)\n", __func__, attr->group); + return -EINVAL; + } +} + +static int kvm_dmsintc_create(struct kvm_device *dev, u32 type) +{ + struct kvm *kvm; + struct loongarch_dmsintc *s; + + if (!dev) { + kvm_err("%s: kvm_device ptr is invalid!\n", __func__); + return -EINVAL; + } + + kvm =3D dev->kvm; + if (kvm->arch.dmsintc) { + kvm_err("%s: LoongArch DMSINTC has already been created!\n", __func__); + return -EINVAL; + } + + s =3D kzalloc(sizeof(struct loongarch_dmsintc), GFP_KERNEL); + if (!s) + return -ENOMEM; + + s->kvm =3D kvm; + kvm->arch.dmsintc =3D s; + return 0; +} + +static void kvm_dmsintc_destroy(struct kvm_device *dev) +{ + + if (!dev || !dev->kvm || !dev->kvm->arch.dmsintc) + return; + + kfree(dev->kvm->arch.dmsintc); + kfree(dev); +} + +static struct kvm_device_ops kvm_dmsintc_dev_ops =3D { + .name =3D "kvm-loongarch-dmsintc", + .create =3D kvm_dmsintc_create, + .destroy =3D kvm_dmsintc_destroy, + .set_attr =3D kvm_dmsintc_set_attr, +}; + +int kvm_loongarch_register_dmsintc_device(void) +{ + return kvm_register_device_ops(&kvm_dmsintc_dev_ops, KVM_DEV_TYPE_LOONGAR= CH_DMSINTC); +} diff --git a/arch/loongarch/kvm/main.c b/arch/loongarch/kvm/main.c index 2c593ac7892f..713771a93d90 100644 --- a/arch/loongarch/kvm/main.c +++ b/arch/loongarch/kvm/main.c @@ -416,6 +416,12 @@ static int kvm_loongarch_env_init(void) =20 /* Register LoongArch PCH-PIC interrupt controller interface. */ ret =3D kvm_loongarch_register_pch_pic_device(); + if (ret) + return ret; + + /* Register LoongArch DMSINTC interrupt contrroller interface */ + if (cpu_has_msgint) + ret =3D kvm_loongarch_register_dmsintc_device(); =20 return ret; } diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h index 80364d4dbebb..0c940fbcee8b 100644 --- a/include/uapi/linux/kvm.h +++ b/include/uapi/linux/kvm.h @@ -1224,6 +1224,8 @@ enum kvm_device_type { #define KVM_DEV_TYPE_LOONGARCH_EIOINTC KVM_DEV_TYPE_LOONGARCH_EIOINTC KVM_DEV_TYPE_LOONGARCH_PCHPIC, #define KVM_DEV_TYPE_LOONGARCH_PCHPIC KVM_DEV_TYPE_LOONGARCH_PCHPIC + KVM_DEV_TYPE_LOONGARCH_DMSINTC, +#define KVM_DEV_TYPE_LOONGARCH_DMSINTC KVM_DEV_TYPE_LOONGARCH_DMSINTC =20 KVM_DEV_TYPE_MAX, =20 --=20 2.39.3 From nobody Fri Apr 3 10:24:59 2026 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id DCFC6285CA8; Thu, 2 Apr 2026 13:08:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775135307; cv=none; b=IZ0V/xRlx0ply7xQBQlRkQ80l2SGX5i5R2+Vk6a81oBG5A3ynsN+W3YIcfRppf9Z1K/ttVndk8XlPljbtW5FjbBfncb49RZIz0tlR60VPDfWa/FkHg/p3s1LaIjbhQhl7syjnzTI1r4LZAykmOSGCjYX8mPG5ib3TceMg+90hso= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775135307; c=relaxed/simple; bh=bvczBY/WyeuBZmp33DGd9oyyd3hhtrefGoU6v+iCB+Q=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=lB7rbuiqghHEuwM8nNaoh0x8ooF9jfPKcUDKjXztSSENvp8fxmlLW1nbLNZ877rsRejsVYkI/Evw8gv4fygyWMz0LDK+hWXPpC8TvjprJOzSkxBy/16H24YNbLIhyBWSi88SzHm0tbZOC82L/6ZXUfcl6tFLqm1pDxU+Sissqak= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8BxcfA_as5pTDchAA--.28536S3; Thu, 02 Apr 2026 21:08:15 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by front1 (Coremail) with SMTP id qMiowJCx+8E6as5p6oJjAA--.58940S4; Thu, 02 Apr 2026 21:08:15 +0800 (CST) From: Song Gao To: maobibo@loongson.cn, chenhuacai@kernel.org Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, kernel@xen0n.name, linux-kernel@vger.kernel.org, lixianglai@loongson.cn Subject: [PATCH v9 2/2] LoongArch: KVM: Add dmsintc inject msi to the dest vcpu Date: Thu, 2 Apr 2026 20:42:37 +0800 Message-Id: <20260402124237.4174550-3-gaosong@loongson.cn> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20260402124237.4174550-1-gaosong@loongson.cn> References: <20260402124237.4174550-1-gaosong@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJCx+8E6as5p6oJjAA--.58940S4 X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" Implement irqfd deliver msi to vcpu and vcpu dmsintc inject irq. Add irqfd choice dmsintc to set msi irq by the msg_addr and implement dmsintc set msi irq. Signed-off-by: Song Gao --- arch/loongarch/include/asm/kvm_dmsintc.h | 2 + arch/loongarch/include/asm/kvm_pch_pic.h | 4 +- arch/loongarch/kvm/intc/pch_pic.c | 15 +++++++- arch/loongarch/kvm/interrupt.c | 37 ++++++++++++++++++ arch/loongarch/kvm/irqfd.c | 48 +++++++++++++++++++++--- 5 files changed, 97 insertions(+), 9 deletions(-) diff --git a/arch/loongarch/include/asm/kvm_dmsintc.h b/arch/loongarch/incl= ude/asm/kvm_dmsintc.h index b04b89dd2a35..3f6a22f5a4ee 100644 --- a/arch/loongarch/include/asm/kvm_dmsintc.h +++ b/arch/loongarch/include/asm/kvm_dmsintc.h @@ -11,11 +11,13 @@ struct loongarch_dmsintc { struct kvm *kvm; uint64_t msg_addr_base; uint64_t msg_addr_size; + uint32_t cpu_mask; }; =20 struct dmsintc_state { atomic64_t vector_map[4]; }; =20 +int dmsintc_set_msi_irq(struct kvm *kvm, u64 addr, int data, int level); int kvm_loongarch_register_dmsintc_device(void); #endif diff --git a/arch/loongarch/include/asm/kvm_pch_pic.h b/arch/loongarch/incl= ude/asm/kvm_pch_pic.h index 7f33a3039272..5f49b1f82c56 100644 --- a/arch/loongarch/include/asm/kvm_pch_pic.h +++ b/arch/loongarch/include/asm/kvm_pch_pic.h @@ -70,6 +70,8 @@ struct loongarch_pch_pic { =20 int kvm_loongarch_register_pch_pic_device(void); void pch_pic_set_irq(struct loongarch_pch_pic *s, int irq, int level); -void pch_msi_set_irq(struct kvm *kvm, int irq, int level); +struct kvm_kernel_irq_routing_entry; +int pch_msi_set_irq(struct kvm *kvm, + struct kvm_kernel_irq_routing_entry *e, int level); =20 #endif /* __ASM_KVM_PCH_PIC_H */ diff --git a/arch/loongarch/kvm/intc/pch_pic.c b/arch/loongarch/kvm/intc/pc= h_pic.c index dd7e7f8d53db..875420f8c6ab 100644 --- a/arch/loongarch/kvm/intc/pch_pic.c +++ b/arch/loongarch/kvm/intc/pch_pic.c @@ -4,6 +4,7 @@ */ =20 #include +#include #include #include #include @@ -67,9 +68,19 @@ void pch_pic_set_irq(struct loongarch_pch_pic *s, int ir= q, int level) } =20 /* msi irq handler */ -void pch_msi_set_irq(struct kvm *kvm, int irq, int level) +int pch_msi_set_irq(struct kvm *kvm, + struct kvm_kernel_irq_routing_entry *e, int level) { - eiointc_set_irq(kvm->arch.eiointc, irq, level); + u64 msg_addr =3D (((u64)e->msi.address_hi) << 32) | e->msi.address_lo; + + if (cpu_has_msgint && kvm->arch.dmsintc && + msg_addr >=3D kvm->arch.dmsintc->msg_addr_base && + msg_addr < (kvm->arch.dmsintc->msg_addr_base + kvm->arch.dmsintc->msg_a= ddr_size)) { + return dmsintc_set_msi_irq(kvm, msg_addr, e->msi.data, level); + } + + eiointc_set_irq(kvm->arch.eiointc, e->msi.data, level); + return 0; } =20 static int loongarch_pch_pic_read(struct loongarch_pch_pic *s, gpa_t addr,= int len, void *val) diff --git a/arch/loongarch/kvm/interrupt.c b/arch/loongarch/kvm/interrupt.c index fb704f4c8ac5..76a133adedc2 100644 --- a/arch/loongarch/kvm/interrupt.c +++ b/arch/loongarch/kvm/interrupt.c @@ -8,6 +8,42 @@ #include #include =20 +static void dmsintc_inject_irq(struct kvm_vcpu *vcpu) +{ + struct dmsintc_state *ds =3D &vcpu->arch.dmsintc_state; + unsigned int i; + unsigned long temp[4], old; + + if (!ds) + return; + + for (i =3D 0; i < 4; i++) { + old =3D atomic64_read(&(ds->vector_map[i])); + if (old) + temp[i] =3D atomic64_xchg(&(ds->vector_map[i]), 0); + } + + if (temp[0]) { + old =3D kvm_read_hw_gcsr(LOONGARCH_CSR_ISR0); + kvm_write_hw_gcsr(LOONGARCH_CSR_ISR0, temp[0]|old); + } + + if (temp[1]) { + old =3D kvm_read_hw_gcsr(LOONGARCH_CSR_ISR1); + kvm_write_hw_gcsr(LOONGARCH_CSR_ISR1, temp[1]|old); + } + + if (temp[2]) { + old =3D kvm_read_hw_gcsr(LOONGARCH_CSR_ISR2); + kvm_write_hw_gcsr(LOONGARCH_CSR_ISR2, temp[2]|old); + } + + if (temp[3]) { + old =3D kvm_read_hw_gcsr(LOONGARCH_CSR_ISR3); + kvm_write_hw_gcsr(LOONGARCH_CSR_ISR3, temp[3]|old); + } +} + static unsigned int priority_to_irq[EXCCODE_INT_NUM] =3D { [INT_TI] =3D CPU_TIMER, [INT_IPI] =3D CPU_IPI, @@ -33,6 +69,7 @@ static int kvm_irq_deliver(struct kvm_vcpu *vcpu, unsigne= d int priority) irq =3D priority_to_irq[priority]; =20 if (kvm_guest_has_msgint(&vcpu->arch) && (priority =3D=3D INT_AVEC)) { + dmsintc_inject_irq(vcpu); set_gcsr_estat(irq); return 1; } diff --git a/arch/loongarch/kvm/irqfd.c b/arch/loongarch/kvm/irqfd.c index 9a39627aecf0..18df75c78de8 100644 --- a/arch/loongarch/kvm/irqfd.c +++ b/arch/loongarch/kvm/irqfd.c @@ -6,6 +6,28 @@ #include #include #include +#include + +static int dmsintc_deliver_msi_to_vcpu(struct kvm *kvm, + struct kvm_vcpu *vcpu, + u32 vector, int level) +{ + struct kvm_interrupt vcpu_irq; + struct dmsintc_state *ds; + + if (!level) + return 0; + if (!vcpu || vector >=3D 256) + return -EINVAL; + ds =3D &vcpu->arch.dmsintc_state; + if (!ds) + return -ENODEV; + set_bit(vector, (unsigned long *)&ds->vector_map); + vcpu_irq.irq =3D INT_AVEC; + kvm_vcpu_ioctl_interrupt(vcpu, &vcpu_irq); + kvm_vcpu_kick(vcpu); + return 0; +} =20 static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e, struct kvm *kvm, int irq_source_id, int level, bool line_status) @@ -16,6 +38,21 @@ static int kvm_set_pic_irq(struct kvm_kernel_irq_routing= _entry *e, return 0; } =20 +int dmsintc_set_msi_irq(struct kvm *kvm, u64 addr, int data, int level) +{ + unsigned int virq, dest; + struct kvm_vcpu *vcpu; + + virq =3D (addr >> AVEC_IRQ_SHIFT) & AVEC_IRQ_MASK; + dest =3D (addr >> AVEC_CPU_SHIFT) & kvm->arch.dmsintc->cpu_mask; + if (dest >=3D KVM_MAX_VCPUS) + return -EINVAL; + vcpu =3D kvm_get_vcpu_by_cpuid(kvm, dest); + if (!vcpu) + return -EINVAL; + return dmsintc_deliver_msi_to_vcpu(kvm, vcpu, virq, level); +} + /* * kvm_set_msi: inject the MSI corresponding to the * MSI routing entry @@ -28,10 +65,7 @@ int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e, { if (!level) return -1; - - pch_msi_set_irq(kvm, e->msi.data, level); - - return 0; + return pch_msi_set_irq(kvm, e, level); } =20 /* @@ -71,13 +105,15 @@ int kvm_set_routing_entry(struct kvm *kvm, int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e, struct kvm *kvm, int irq_source_id, int level, bool line_status) { + if (!level) + return -EWOULDBLOCK; + switch (e->type) { case KVM_IRQ_ROUTING_IRQCHIP: pch_pic_set_irq(kvm->arch.pch_pic, e->irqchip.pin, level); return 0; case KVM_IRQ_ROUTING_MSI: - pch_msi_set_irq(kvm, e->msi.data, level); - return 0; + return pch_msi_set_irq(kvm, e, level); default: return -EWOULDBLOCK; } --=20 2.39.3