From nobody Tue Apr 7 02:37:16 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C7EBF39182C for ; Thu, 2 Apr 2026 09:29:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775122157; cv=none; b=gII4aqDgeFs9VEkfi+jboI9GETUlo0NvijNWCkvWG/fUHDmoVySoAwvUP+rA9HnN0QE7p7O5RU4V4qfoRSn4w+wXB3V4k+crr/elYnG4GLce0W2BNzyHFiy1yJyOFBjah6LpqSq31o3pRQlEnc73DS0wTT6TiTtS1pRoJ1fNfng= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775122157; c=relaxed/simple; bh=zM1IM+N8PcbAaqyvnzjF8NUaAGzCr3+yL2dQodAku1Q=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=eZzs8WD0XATgDBtTwKj6UpBN8cuCmec66YhZ1pH3hJxZO2FqA6u9ms6Wlkcf/Q3dDqhFQiZEPFBPPdvsUQaoLkgmlvKnZv2hJApCf0akkga9Xv/lF47uUgoGY6rNY7cPpHBhzSdXJZUI8WGEGq9/oanVgy0Z7XJXnW8wVaGeMRc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=Ltv7CY98; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=WqTPOO/G; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="Ltv7CY98"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="WqTPOO/G" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6324Qh2t1551221 for ; Thu, 2 Apr 2026 09:29:02 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=H3ohFTGXI3E m1WV/owX09SmkHTBw1bejtZk7T2akX+I=; b=Ltv7CY98ZVPGdW6o0oUAKLo7EVp 8LyU1nCPRvera+Nsfboxq7qYJWAEFiHzZO2lgtEqmmu1SAywMzZkFBz4eaqsbEam orcEeeEt4gr2lPIyTrRb1cLpUPicNEXC48y/MMGu5uCi+gFqhY8xUkiXjGmuY5xi 1cZZ3RqgeEGjca/ps0buHq3mPiVTKxstveOtAYBWTs+jov4eVwBRg91bK4wExn5r JcwQ0p+5JDiD31xbWZ7kZGDqbhOVOuDXwDneYmVxFwBJtOdZi/YnXsR0w3IuTjpN xaFc8aB5dO5XD/ON71fT8iav8jG0/3uJcvJk+4cLTI3iwx8C1mk0q2UyqaQ== Received: from mail-dy1-f199.google.com (mail-dy1-f199.google.com [74.125.82.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4d9hees7ks-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 02 Apr 2026 09:29:01 +0000 (GMT) Received: by mail-dy1-f199.google.com with SMTP id 5a478bee46e88-2c7130f88e3so5593610eec.0 for ; Thu, 02 Apr 2026 02:29:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1775122141; x=1775726941; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=H3ohFTGXI3Em1WV/owX09SmkHTBw1bejtZk7T2akX+I=; b=WqTPOO/Gx0VElwXTC3nr0LoPIqx7foUBTV5vNgueiYDr2nf7z+fsodrwFyK6r641Wz As7tP6WzQyQ2l9Fd/wP8V2XjZLk/fJplljUod0LNDqDLkEFx1Ptg2V+nGeB+/weExF9h AKi5n1SoqJgFDxRACU81PGitJWP8cOiH9bxYm2it/RzIaDUgZtTFCwWmv5s3oKGj0Bye JKqfUiyOoj8p0jTtsEus0ilSp8WK/Wr/7DEBN2ArqN+tT66JzAR4BaIFMZ8QF8tYFmFV cU/bgVS7CsfXigFliwANHv0SZel1Ae2M1Cacfdmv0dSe5KoBxGkiKLFryR24F6T7jRtB 2ZIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1775122141; x=1775726941; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=H3ohFTGXI3Em1WV/owX09SmkHTBw1bejtZk7T2akX+I=; b=jxlUPErcDS/izFf0iSyQe6bF269P06660zT1iufz/pH13LAVghO0VQnaikNL8UySd+ +bOJqtWJJzEqtXPgZbcEbp1Izr//lzU2aRbZT1giRTzwij6DjAJ1BtYj0vj6uE7RX+Z2 H6O6Jho6xp9gZONELPvhHIAhLUoqwqIyjEyds9iFcZ337r9oMQthi9Dbd/wRXQ+eTPL0 yDHXsXGLM+pvsg2oEf7nIdO3nt5M1dodgpkD0ayvQ8uRpYnl6vAXrxKei8jCbQdf94cF drStiisnWKcPCsc3Q32ISkIVvshQU1MkXdXd0hZ3gHv0YqYwlPy6+k73ezqgRdM1RC0x siCw== X-Forwarded-Encrypted: i=1; AJvYcCUO9tP7oSnm+CmChWY5DvKItjQw2Aqtg9SDkL+RWgxh7EPPV6y4NewP7BJx5UbhAd7BFvO1nJ9Ew6K4nGg=@vger.kernel.org X-Gm-Message-State: AOJu0Yz/L2wuNVrCUMgOm0RxyZTSRTz2cYlJ6M3MnuWovaciNQ5NDCfU 1io20MQKNpkJS7KPospYVGWl6RQtCupjYcmCoqPmaW+zqH1tT+EwFsX16nDnU1wyrgJFyiIWR/d 5w6iL2Fi+5YNl0qGtsoXTx6k4/kZkiEL2fg7i7kAQ5Ee/AAoS8XPPtzqt6WspTKYSd8E= X-Gm-Gg: ATEYQzzIFc61W9ZN74jo7Kr5hkwukyWdvXrgbMIgNtAD95Dsq8VShBzSyYa3zP22IBo 3HUoyB8YaRr2XKDXu40LBaSGi4K+Bws2iVHvdUJ7bbZdtdq3jkWB/+BmP1jp0VYaHQ2ZixgDxYQ /uWzpjhrpOqfZ7nikqKm3DRqusBSLBrmjmeibtm5KXtFJ/6o04XzRLtNiW68mOkLmbeJj65UZ5X NehVBIA8ByA03svC6t9N/tYNlCEuzljw9zBuiknuKzyyNG3Bct0OIEo5Pd8nUN2u/n9cF0eRcKT g7yybnF8N6k40ZJu8fVE7nCfU554sipXSEI/2/saZL8N5QKmKL0QWJwUV90HHQ3/7yTJmRhNbDX Xem5hpuVx0TSQzVyIPuzVOWRLheNJrqWAffaaKn/jQ/bv+GrvEYb+SuClkq4PR74l2MeLrovwtw lv X-Received: by 2002:a05:693c:2b16:b0:2c5:60d0:7031 with SMTP id 5a478bee46e88-2c930798b89mr4003033eec.4.1775122141043; Thu, 02 Apr 2026 02:29:01 -0700 (PDT) X-Received: by 2002:a05:693c:2b16:b0:2c5:60d0:7031 with SMTP id 5a478bee46e88-2c930798b89mr4003017eec.4.1775122140493; Thu, 02 Apr 2026 02:29:00 -0700 (PDT) Received: from hu-songchai-lv.qualcomm.com (Global_NAT1.qualcomm.com. [129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2cafd073194sm951094eec.28.2026.04.02.02.28.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Apr 2026 02:29:00 -0700 (PDT) From: Songwei Chai To: andersson@kernel.org, alexander.shishkin@linux.intel.com, mike.leach@linaro.org, konrad.dybcio@oss.qualcomm.com, suzuki.poulose@arm.com, james.clark@arm.com, krzk+dt@kernel.org, conor+dt@kernel.org Cc: Songwei Chai , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, devicetree@vger.kernel.org, gregkh@linuxfoundation.org, Jie Gan Subject: [PATCH v13 5/7] qcom-tgu: Add support to configure next action Date: Thu, 2 Apr 2026 02:28:36 -0700 Message-Id: <20260402092838.341295-6-songwei.chai@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260402092838.341295-1-songwei.chai@oss.qualcomm.com> References: <20260402092838.341295-1-songwei.chai@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: ICYgdBg8l4h_kVPisRuAC22_O-QLgK7y X-Authority-Analysis: v=2.4 cv=VY36/Vp9 c=1 sm=1 tr=0 ts=69ce36dd cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=s623Ih-0px1LxcEVn60A:9 a=scEy_gLbYbu1JhEsrz4S:22 X-Proofpoint-GUID: ICYgdBg8l4h_kVPisRuAC22_O-QLgK7y X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDAyMDA4NCBTYWx0ZWRfXwQu8Ga/SCJPA jQuUuuWiMDUZ6MKnsj2e+sydczMBJGsGbT8MTDLCweKP0SkWBEcjBCUl8cSdd8mUur5Utr/QA2/ c418kDfxAeocBnwtGSrqjJSXFIdbEGpJtc4ggC6M0tyPSSz2qhqF5K3VKqyUisWeicL9ju+7Zxk DU+v+aRu3qLqWLAPFJmo4jfBMPHfWBXUAgnGfRUgf9dJI1u+UWft1zzTNrHumX+x8kZ/wo6dBBa L2WaSPp54HGPMY8TulDX/bCgEQB9Qf55wrZrX8yH0K74T1e6B5OK3z4KeeNwb9EkWMpieTRyYSb BNBvH3PjEe9IywlT6FhIyK90mdbyAsOKd+ovuP6Bz/Yhfj/IK9lXkVtbseomu/P8KebswGF6e+l eTvacgyfH2CKqTvseHGx8K0JvDagbclfmfO+4hotdjZpljqtld7TsWgSLTeHQowV3rbl7JF6F8V lY48khCbu2hMBvcFUgg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-02_01,2026-04-02_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 lowpriorityscore=0 clxscore=1015 priorityscore=1501 malwarescore=0 spamscore=0 adultscore=0 impostorscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2604020084 Content-Type: text/plain; charset="utf-8" Add "select" node for each step to determine if another step is taken, trigger(s) are generated, counters/timers incremented/decremented, etc. Reviewed-by: Jie Gan Signed-off-by: Songwei Chai --- .../ABI/testing/sysfs-bus-amba-devices-tgu | 7 +++ drivers/hwtracing/qcom/tgu.c | 53 ++++++++++++++++++- drivers/hwtracing/qcom/tgu.h | 27 ++++++++++ 3 files changed, 85 insertions(+), 2 deletions(-) diff --git a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu b/Documen= tation/ABI/testing/sysfs-bus-amba-devices-tgu index 4ef0d696d3d0..786cb852bbe5 100644 --- a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu +++ b/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu @@ -21,3 +21,10 @@ KernelVersion: 7.1 Contact: Jinlong Mao , Songwei Chai Description: (RW) Set/Get the decode mode with specific step for TGU. + +What: /sys/bus/amba/devices//step[0:7]_condition_select/reg[0:3] +Date: April 2026 +KernelVersion: 7.1 +Contact: Jinlong Mao , Songwei Chai +Description: + (RW) Set/Get the next action with specific step for TGU. diff --git a/drivers/hwtracing/qcom/tgu.c b/drivers/hwtracing/qcom/tgu.c index 5b37eb10f863..4112e6a691d6 100644 --- a/drivers/hwtracing/qcom/tgu.c +++ b/drivers/hwtracing/qcom/tgu.c @@ -29,6 +29,9 @@ static int calculate_array_location(struct tgu_drvdata *d= rvdata, case TGU_CONDITION_DECODE: return step_index * (drvdata->num_condition_decode) + reg_index; + case TGU_CONDITION_SELECT: + return step_index * (drvdata->num_condition_select) + + reg_index; default: break; } @@ -71,6 +74,9 @@ static ssize_t tgu_dataset_show(struct device *dev, case TGU_CONDITION_DECODE: return sysfs_emit(buf, "0x%x\n", drvdata->value_table->condition_decode[index]); + case TGU_CONDITION_SELECT: + return sysfs_emit(buf, "0x%x\n", + drvdata->value_table->condition_select[index]); default: break; } @@ -112,6 +118,10 @@ static ssize_t tgu_dataset_store(struct device *dev, tgu_drvdata->value_table->condition_decode[index] =3D val; ret =3D size; break; + case TGU_CONDITION_SELECT: + tgu_drvdata->value_table->condition_select[index] =3D val; + ret =3D size; + break; default: ret =3D -EINVAL; break; @@ -146,6 +156,13 @@ static umode_t tgu_node_visible(struct kobject *kobjec= t, if (tgu_attr->reg_num < drvdata->num_condition_decode) return attr->mode; break; + case TGU_CONDITION_SELECT: + /* 'default' register is at the end of 'select' region */ + if (tgu_attr->reg_num =3D=3D drvdata->num_condition_select - 1) + attr->name =3D "default"; + if (tgu_attr->reg_num < drvdata->num_condition_select) + return attr->mode; + break; default: break; } @@ -184,6 +201,18 @@ static ssize_t tgu_write_all_hw_regs(struct tgu_drvdat= a *drvdata) drvdata->base + CONDITION_DECODE_STEP(i, j)); } } + + for (i =3D 0; i < drvdata->num_step; i++) { + for (j =3D 0; j < drvdata->num_condition_select; j++) { + index =3D check_array_location(drvdata, i, + TGU_CONDITION_SELECT, j); + if (index =3D=3D -EINVAL) + goto exit; + + writel(drvdata->value_table->condition_select[index], + drvdata->base + CONDITION_SELECT_STEP(i, j)); + } + } /* Enable TGU to program the triggers */ writel(1, drvdata->base + TGU_CONTROL); exit: @@ -223,6 +252,8 @@ static void tgu_set_conditions(struct tgu_drvdata *drvd= ata) =20 devid =3D readl(drvdata->base + TGU_DEVID); drvdata->num_condition_decode =3D TGU_DEVID_CONDITIONS(devid); + /* select region has an additional 'default' register */ + drvdata->num_condition_select =3D TGU_DEVID_CONDITIONS(devid) + 1; } =20 static int tgu_enable(struct device *dev) @@ -366,6 +397,14 @@ static const struct attribute_group *tgu_attr_groups[]= =3D { CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(5), CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(6), CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(7), + CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(0), + CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(1), + CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(2), + CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(3), + CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(4), + CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(5), + CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(6), + CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(7), NULL, }; =20 @@ -373,8 +412,8 @@ static int tgu_probe(struct amba_device *adev, const st= ruct amba_id *id) { struct device *dev =3D &adev->dev; struct tgu_drvdata *drvdata; - unsigned int *priority, *condition; - size_t priority_size, condition_size; + unsigned int *priority, *condition, *select; + size_t priority_size, condition_size, select_size; int ret; =20 drvdata =3D devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); @@ -425,6 +464,16 @@ static int tgu_probe(struct amba_device *adev, const s= truct amba_id *id) =20 drvdata->value_table->condition_decode =3D condition; =20 + select_size =3D drvdata->num_condition_select * drvdata->num_step; + + select =3D devm_kcalloc(dev, select_size, + sizeof(*(drvdata->value_table->condition_select)), + GFP_KERNEL); + if (!select) + return -ENOMEM; + + drvdata->value_table->condition_select =3D select; + drvdata->enabled =3D false; =20 pm_runtime_put(&adev->dev); diff --git a/drivers/hwtracing/qcom/tgu.h b/drivers/hwtracing/qcom/tgu.h index 987ea07bd618..ac46a2875209 100644 --- a/drivers/hwtracing/qcom/tgu.h +++ b/drivers/hwtracing/qcom/tgu.h @@ -52,6 +52,7 @@ #define STEP_OFFSET 0x1D8 #define PRIORITY_START_OFFSET 0x0074 #define CONDITION_DECODE_OFFSET 0x0050 +#define CONDITION_SELECT_OFFSET 0x0060 #define PRIORITY_OFFSET 0x60 #define REG_OFFSET 0x4 =20 @@ -63,6 +64,9 @@ #define CONDITION_DECODE_STEP(step, decode) \ (CONDITION_DECODE_OFFSET + REG_OFFSET * decode + STEP_OFFSET * step) =20 +#define CONDITION_SELECT_STEP(step, select) \ + (CONDITION_SELECT_OFFSET + REG_OFFSET * select + STEP_OFFSET * step) + #define tgu_dataset_rw(name, step_index, type, reg_num) \ (&((struct tgu_attribute[]){ { \ __ATTR(name, 0644, tgu_dataset_show, tgu_dataset_store), \ @@ -76,6 +80,8 @@ reg_num) #define STEP_DECODE(step_index, reg_num) \ tgu_dataset_rw(reg##reg_num, step_index, TGU_CONDITION_DECODE, reg_num) +#define STEP_SELECT(step_index, reg_num) \ + tgu_dataset_rw(reg##reg_num, step_index, TGU_CONDITION_SELECT, reg_num) =20 #define STEP_PRIORITY_LIST(step_index, priority) \ {STEP_PRIORITY(step_index, 0, priority), \ @@ -107,6 +113,15 @@ NULL \ } =20 +#define STEP_SELECT_LIST(n) \ + {STEP_SELECT(n, 0), \ + STEP_SELECT(n, 1), \ + STEP_SELECT(n, 2), \ + STEP_SELECT(n, 3), \ + STEP_SELECT(n, 4), \ + NULL \ + } + #define PRIORITY_ATTRIBUTE_GROUP_INIT(step, priority)\ (&(const struct attribute_group){\ .attrs =3D (struct attribute*[])STEP_PRIORITY_LIST(step, priority),\ @@ -121,12 +136,21 @@ .name =3D "step" #step "_condition_decode" \ }) =20 +#define CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(step)\ + (&(const struct attribute_group){\ + .attrs =3D (struct attribute*[])STEP_SELECT_LIST(step),\ + .is_visible =3D tgu_node_visible,\ + .name =3D "step" #step "_condition_select" \ + }) + + enum operation_index { TGU_PRIORITY0, TGU_PRIORITY1, TGU_PRIORITY2, TGU_PRIORITY3, TGU_CONDITION_DECODE, + TGU_CONDITION_SELECT, }; =20 /* Maximum priority that TGU supports */ @@ -142,6 +166,7 @@ struct tgu_attribute { struct value_table { unsigned int *priority; unsigned int *condition_decode; + unsigned int *condition_select; }; =20 static inline void TGU_LOCK(void __iomem *addr) @@ -172,6 +197,7 @@ static inline void TGU_UNLOCK(void __iomem *addr) * @num_reg: Maximum number of registers * @num_step: Maximum step size * @num_condition_decode: Maximum number of condition_decode + * @num_condition_select: Maximum number of condition_select * * This structure defines the data associated with a TGU device, * including its base address, device pointers, clock, spinlock for @@ -187,6 +213,7 @@ struct tgu_drvdata { int num_reg; int num_step; int num_condition_decode; + int num_condition_select; }; =20 #endif --=20 2.34.1