From nobody Mon Apr 6 12:13:28 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 7768C3624D4; Thu, 2 Apr 2026 09:10:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775121011; cv=none; b=XwClgrpzuejNMxcTtIY1UAOgtNHb0XEoGgFrinVldCyHlhjZZRnKwhDTjYchb3NYRHsjodUVD/VlZLmGD/azCdKI64ZDaDuWbwWR0u0CvuWnx4GqA1QBHAnr4TpCoemMD1no0eYfOyZKV0uh9wHYmS+yLw9FYR34GiO35qVKH7g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775121011; c=relaxed/simple; bh=IKqbW+eX+HXA5Z7kfQcw3ua/Fr6+fjr+TqVEeZe8vXM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CctGvRRq4H4qgO/Av56DOSWUuvGotsOyLkAo0cNhXE8QvKDmXBmpxDkfqYWr0hceK7doxdIj/4CGLLJuAYLDNsu59OJKsfJsjlEVIJxvQYTUHZYCvSDa6LMTUzgcTMrgac92Eq3rA4DD97gNyQ9hI/v00MogUvZpzlF2QWUW5JI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: e9mZFhknR2WZSvqa/FWTdQ== X-CSE-MsgGUID: jY19ZEZGRGaDtySI4VTInA== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 02 Apr 2026 18:10:07 +0900 Received: from ubuntu.adwin.renesas.com (unknown [10.226.92.136]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 33DB2413EABB; Thu, 2 Apr 2026 18:09:58 +0900 (JST) From: John Madieu To: Geert Uytterhoeven , Kuninori Morimoto , Vinod Koul , Mark Brown , Rob Herring , Krzysztof Kozlowski Cc: Michael Turquette , Stephen Boyd , Conor Dooley , Frank Li , Liam Girdwood , Magnus Damm , Thomas Gleixner , Jaroslav Kysela , Takashi Iwai , Philipp Zabel , Claudiu Beznea , Biju Das , Fabrizio Castro , Lad Prabhakar , John Madieu , linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, linux-sound@vger.kernel.org, John Madieu Subject: [PATCH v2 20/24] arm64: dts: renesas: r9a09g047: Add R-Car Sound support Date: Thu, 2 Apr 2026 11:05:19 +0200 Message-ID: <20260402090524.9137-21-john.madieu.xa@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260402090524.9137-1-john.madieu.xa@bp.renesas.com> References: <20260402090524.9137-1-john.madieu.xa@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the rzg3e_sound node for the RZ/G3E SoC with all sub-components: - SSI (Serial Sound Interface) units 0-9 - SSIU (Serial Sound Interface Unit) units 0-27 - SRC (Sample Rate Converter) units 0-9 - CTU (Channel Transfer Unit) units 0-7 - DVC (Digital Volume Control) units 0-1 - MIX (Mixer) units 0-1 Wire up all 5 DMA controllers (dmac0-dmac4) for each audio sub-node with repeated channel names, so that the DMA core can pick the first available controller. Signed-off-by: John Madieu --- Changes: v2: - Remove 2-cells specifier on audio DMA assignment - Do not update DMAC #dma-cells anymore=20 arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 502 +++++++++++++++++++++ 1 file changed, 502 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi b/arch/arm64/boot/d= ts/renesas/r9a09g047.dtsi index 1ff48c8f98e1..b1e567d71c26 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi @@ -918,6 +918,508 @@ rsci9: serial@12803000 { status =3D "disabled"; }; =20 + snd_rzg3e: sound@13c00000 { + /* + * #sound-dai-cells is required + * + * Single DAI : #sound-dai-cells =3D <0>; <&snd_rzg3e>; + * Multi DAI : #sound-dai-cells =3D <1>; <&snd_rzg3e N>; + */ + /* + * #clock-cells is required for audio_clkout0/1/2/3 + * + * clkout : #clock-cells =3D <0>; <&snd_rzg3e>; + * clkout0/1/2/3: #clock-cells =3D <1>; <&snd_rzg3e N>; + */ + compatible =3D "renesas,r9a09g047-sound"; + reg =3D <0 0x13c00000 0 0x10000>, /* SCU */ + <0 0x13c20000 0 0x10000>, /* ADG */ + <0 0x13c30000 0 0x1000>, /* SSIU */ + <0 0x13c31000 0 0x1F000>, /* SSI */ + <0 0x13c50000 0 0x10000>; /* Audio DMAC peri peri */ + reg-names =3D "scu", "adg", "ssiu", "ssi", "audmapp"; + clocks =3D <&cpg CPG_MOD 245>, + <&cpg CPG_MOD 394>, + <&cpg CPG_MOD 393>, + <&cpg CPG_MOD 392>, + <&cpg CPG_MOD 391>, + <&cpg CPG_MOD 390>, + <&cpg CPG_MOD 389>, + <&cpg CPG_MOD 388>, + <&cpg CPG_MOD 387>, + <&cpg CPG_MOD 386>, + <&cpg CPG_MOD 385>, + <&cpg CPG_MOD 381>, + <&cpg CPG_MOD 380>, + <&cpg CPG_MOD 379>, + <&cpg CPG_MOD 378>, + <&cpg CPG_MOD 377>, + <&cpg CPG_MOD 376>, + <&cpg CPG_MOD 375>, + <&cpg CPG_MOD 374>, + <&cpg CPG_MOD 373>, + <&cpg CPG_MOD 372>, + <&cpg CPG_MOD 371>, + <&cpg CPG_MOD 370>, + <&cpg CPG_MOD 371>, + <&cpg CPG_MOD 370>, + <&cpg CPG_MOD 368>, + <&cpg CPG_MOD 369>, + <&cpg CPG_MOD 251>, + <&cpg CPG_MOD 252>, + <&cpg CPG_MOD 253>, + <&cpg CPG_MOD 250>, + <&cpg CPG_MOD 384>, + <&cpg CPG_MOD 246>, + <&cpg CPG_MOD 247>, + <&cpg CPG_MOD 382>, + <&cpg CPG_MOD 361>, + <&cpg CPG_MOD 360>, + <&cpg CPG_MOD 359>, + <&cpg CPG_MOD 358>, + <&cpg CPG_MOD 357>, + <&cpg CPG_MOD 356>, + <&cpg CPG_MOD 355>, + <&cpg CPG_MOD 354>, + <&cpg CPG_MOD 353>, + <&cpg CPG_MOD 352>, + <&cpg CPG_MOD 248>, + <&cpg CPG_MOD 249>; + clock-names =3D "ssi-all", + "ssi.9", "ssi.8", + "ssi.7", "ssi.6", + "ssi.5", "ssi.4", + "ssi.3", "ssi.2", + "ssi.1", "ssi.0", + "src.9", "src.8", + "src.7", "src.6", + "src.5", "src.4", + "src.3", "src.2", + "src.1", "src.0", + "mix.1", "mix.0", + "ctu.1", "ctu.0", + "dvc.0", "dvc.1", + "clk_a", "clk_b", + "clk_c", "clk_i", + "ssif_supply", + "scu", "scu_x2", + "scu_supply", + "adg.ssi.9", "adg.ssi.8", + "adg.ssi.7", "adg.ssi.6", + "adg.ssi.5", "adg.ssi.4", + "adg.ssi.3", "adg.ssi.2", + "adg.ssi.1", "adg.ssi.0", + "audmapp", "adg"; + power-domains =3D <&cpg>; + resets =3D <&cpg 225>, + <&cpg 235>, + <&cpg 234>, + <&cpg 233>, + <&cpg 232>, + <&cpg 231>, + <&cpg 230>, + <&cpg 229>, + <&cpg 228>, + <&cpg 227>, + <&cpg 226>, + <&cpg 236>, + <&cpg 238>, + <&cpg 237>; + reset-names =3D "ssi-all", + "ssi.9", "ssi.8", + "ssi.7", "ssi.6", + "ssi.5", "ssi.4", + "ssi.3", "ssi.2", + "ssi.1", "ssi.0", + "scu", "adg", + "audmapp"; + status =3D "disabled"; + + rcar_sound,ctu { + ctu00: ctu-0 { }; + ctu01: ctu-1 { }; + ctu02: ctu-2 { }; + ctu03: ctu-3 { }; + ctu10: ctu-4 { }; + ctu11: ctu-5 { }; + ctu12: ctu-6 { }; + ctu13: ctu-7 { }; + }; + + rcar_sound,dvc { + dvc0: dvc-0 { + dmas =3D <&dmac0 0x1db3>, <&dmac1 0x1db3>, + <&dmac2 0x1db3>, <&dmac3 0x1db3>, + <&dmac4 0x1db3>; + dma-names =3D "tx", "tx", "tx", "tx", "tx"; + }; + dvc1: dvc-1 { + dmas =3D <&dmac0 0x1db4>, <&dmac1 0x1db4>, + <&dmac2 0x1db4>, <&dmac3 0x1db4>, + <&dmac4 0x1db4>; + dma-names =3D "tx", "tx", "tx", "tx", "tx"; + }; + }; + + rcar_sound,mix { + mix0: mix-0 { }; + mix1: mix-1 { }; + }; + + rcar_sound,src { + src0: src-0 { + interrupts =3D ; + dmas =3D <&dmac0 0x1d9f>, <&dmac0 0x1da9>, + <&dmac1 0x1d9f>, <&dmac1 0x1da9>, + <&dmac2 0x1d9f>, <&dmac2 0x1da9>, + <&dmac3 0x1d9f>, <&dmac3 0x1da9>, + <&dmac4 0x1d9f>, <&dmac4 0x1da9>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "= tx"; + }; + src1: src-1 { + interrupts =3D ; + dmas =3D <&dmac0 0x1da0>, <&dmac0 0x1daa>, + <&dmac1 0x1da0>, <&dmac1 0x1daa>, + <&dmac2 0x1da0>, <&dmac2 0x1daa>, + <&dmac3 0x1da0>, <&dmac3 0x1daa>, + <&dmac4 0x1da0>, <&dmac4 0x1daa>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "= tx"; + }; + src2: src-2 { + interrupts =3D ; + dmas =3D <&dmac0 0x1da1>, <&dmac0 0x1dab>, + <&dmac1 0x1da1>, <&dmac1 0x1dab>, + <&dmac2 0x1da1>, <&dmac2 0x1dab>, + <&dmac3 0x1da1>, <&dmac3 0x1dab>, + <&dmac4 0x1da1>, <&dmac4 0x1dab>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "= tx"; + }; + src3: src-3 { + interrupts =3D ; + dmas =3D <&dmac0 0x1da2>, <&dmac0 0x1dac>, + <&dmac1 0x1da2>, <&dmac1 0x1dac>, + <&dmac2 0x1da2>, <&dmac2 0x1dac>, + <&dmac3 0x1da2>, <&dmac3 0x1dac>, + <&dmac4 0x1da2>, <&dmac4 0x1dac>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "= tx"; + }; + src4: src-4 { + interrupts =3D ; + dmas =3D <&dmac0 0x1da3>, <&dmac0 0x1dad>, + <&dmac1 0x1da3>, <&dmac1 0x1dad>, + <&dmac2 0x1da3>, <&dmac2 0x1dad>, + <&dmac3 0x1da3>, <&dmac3 0x1dad>, + <&dmac4 0x1da3>, <&dmac4 0x1dad>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "= tx"; + }; + src5: src-5 { + interrupts =3D ; + dmas =3D <&dmac0 0x1da4>, <&dmac0 0x1dae>, + <&dmac1 0x1da4>, <&dmac1 0x1dae>, + <&dmac2 0x1da4>, <&dmac2 0x1dae>, + <&dmac3 0x1da4>, <&dmac3 0x1dae>, + <&dmac4 0x1da4>, <&dmac4 0x1dae>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "= tx"; + }; + src6: src-6 { + interrupts =3D ; + dmas =3D <&dmac0 0x1da5>, <&dmac0 0x1daf>, + <&dmac1 0x1da5>, <&dmac1 0x1daf>, + <&dmac2 0x1da5>, <&dmac2 0x1daf>, + <&dmac3 0x1da5>, <&dmac3 0x1daf>, + <&dmac4 0x1da5>, <&dmac4 0x1daf>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "= tx"; + }; + src7: src-7 { + interrupts =3D ; + dmas =3D <&dmac0 0x1da6>, <&dmac0 0x1db0>, + <&dmac1 0x1da6>, <&dmac1 0x1db0>, + <&dmac2 0x1da6>, <&dmac2 0x1db0>, + <&dmac3 0x1da6>, <&dmac3 0x1db0>, + <&dmac4 0x1da6>, <&dmac4 0x1db0>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "= tx"; + }; + src8: src-8 { + interrupts =3D ; + dmas =3D <&dmac0 0x1da7>, <&dmac0 0x1db1>, + <&dmac1 0x1da7>, <&dmac1 0x1db1>, + <&dmac2 0x1da7>, <&dmac2 0x1db1>, + <&dmac3 0x1da7>, <&dmac3 0x1db1>, + <&dmac4 0x1da7>, <&dmac4 0x1db1>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "= tx"; + }; + src9: src-9 { + interrupts =3D ; + dmas =3D <&dmac0 0x1da8>, <&dmac0 0x1db2>, + <&dmac1 0x1da8>, <&dmac1 0x1db2>, + <&dmac2 0x1da8>, <&dmac2 0x1db2>, + <&dmac3 0x1da8>, <&dmac3 0x1db2>, + <&dmac4 0x1da8>, <&dmac4 0x1db2>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "= tx"; + }; + }; + + rcar_sound,ssi { + ssi0: ssi-0 { + interrupts =3D ; + }; + ssi1: ssi-1 { + interrupts =3D ; + }; + ssi2: ssi-2 { + interrupts =3D ; + }; + ssi3: ssi-3 { + interrupts =3D ; + }; + ssi4: ssi-4 { + interrupts =3D ; + }; + ssi5: ssi-5 { + interrupts =3D ; + }; + ssi6: ssi-6 { + interrupts =3D ; + }; + ssi7: ssi-7 { + interrupts =3D ; + }; + ssi8: ssi-8 { + interrupts =3D ; + }; + ssi9: ssi-9 { + interrupts =3D ; + }; + }; + + rcar_sound,ssiu { + ssiu00: ssiu-0 { + dmas =3D <&dmac0 0x1d61>, <&dmac0 0x1d62>, + <&dmac1 0x1d61>, <&dmac1 0x1d62>, + <&dmac2 0x1d61>, <&dmac2 0x1d62>, + <&dmac3 0x1d61>, <&dmac3 0x1d62>, + <&dmac4 0x1d61>, <&dmac4 0x1d62>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu01: ssiu-1 { + dmas =3D <&dmac0 0x1d63>, <&dmac0 0x1d64>, + <&dmac1 0x1d63>, <&dmac1 0x1d64>, + <&dmac2 0x1d63>, <&dmac2 0x1d64>, + <&dmac3 0x1d63>, <&dmac3 0x1d64>, + <&dmac4 0x1d63>, <&dmac4 0x1d64>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu02: ssiu-2 { + dmas =3D <&dmac0 0x1d65>, <&dmac0 0x1d66>, + <&dmac1 0x1d65>, <&dmac1 0x1d66>, + <&dmac2 0x1d65>, <&dmac2 0x1d66>, + <&dmac3 0x1d65>, <&dmac3 0x1d66>, + <&dmac4 0x1d65>, <&dmac4 0x1d66>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu03: ssiu-3 { + dmas =3D <&dmac0 0x1d67>, <&dmac0 0x1d68>, + <&dmac1 0x1d67>, <&dmac1 0x1d68>, + <&dmac2 0x1d67>, <&dmac2 0x1d68>, + <&dmac3 0x1d67>, <&dmac3 0x1d68>, + <&dmac4 0x1d67>, <&dmac4 0x1d68>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu10: ssiu-4 { + dmas =3D <&dmac0 0x1d69>, <&dmac0 0x1d6a>, + <&dmac1 0x1d69>, <&dmac1 0x1d6a>, + <&dmac2 0x1d69>, <&dmac2 0x1d6a>, + <&dmac3 0x1d69>, <&dmac3 0x1d6a>, + <&dmac4 0x1d69>, <&dmac4 0x1d6a>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu11: ssiu-5 { + dmas =3D <&dmac0 0x1d6b>, <&dmac0 0x1d6c>, + <&dmac1 0x1d6b>, <&dmac1 0x1d6c>, + <&dmac2 0x1d6b>, <&dmac2 0x1d6c>, + <&dmac3 0x1d6b>, <&dmac3 0x1d6c>, + <&dmac4 0x1d6b>, <&dmac4 0x1d6c>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu12: ssiu-6 { + dmas =3D <&dmac0 0x1d6d>, <&dmac0 0x1d6e>, + <&dmac1 0x1d6d>, <&dmac1 0x1d6e>, + <&dmac2 0x1d6d>, <&dmac2 0x1d6e>, + <&dmac3 0x1d6d>, <&dmac3 0x1d6e>, + <&dmac4 0x1d6d>, <&dmac4 0x1d6e>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu13: ssiu-7 { + dmas =3D <&dmac0 0x1d6f>, <&dmac0 0x1d70>, + <&dmac1 0x1d6f>, <&dmac1 0x1d70>, + <&dmac2 0x1d6f>, <&dmac2 0x1d70>, + <&dmac3 0x1d6f>, <&dmac3 0x1d70>, + <&dmac4 0x1d6f>, <&dmac4 0x1d70>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu20: ssiu-8 { + dmas =3D <&dmac0 0x1d71>, <&dmac0 0x1d72>, + <&dmac1 0x1d71>, <&dmac1 0x1d72>, + <&dmac2 0x1d71>, <&dmac2 0x1d72>, + <&dmac3 0x1d71>, <&dmac3 0x1d72>, + <&dmac4 0x1d71>, <&dmac4 0x1d72>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu21: ssiu-9 { + dmas =3D <&dmac0 0x1d73>, <&dmac0 0x1d74>, + <&dmac1 0x1d73>, <&dmac1 0x1d74>, + <&dmac2 0x1d73>, <&dmac2 0x1d74>, + <&dmac3 0x1d73>, <&dmac3 0x1d74>, + <&dmac4 0x1d73>, <&dmac4 0x1d74>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu22: ssiu-10 { + dmas =3D <&dmac0 0x1d75>, <&dmac0 0x1d76>, + <&dmac1 0x1d75>, <&dmac1 0x1d76>, + <&dmac2 0x1d75>, <&dmac2 0x1d76>, + <&dmac3 0x1d75>, <&dmac3 0x1d76>, + <&dmac4 0x1d75>, <&dmac4 0x1d76>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu23: ssiu-11 { + dmas =3D <&dmac0 0x1d77>, <&dmac0 0x1d78>, + <&dmac1 0x1d77>, <&dmac1 0x1d78>, + <&dmac2 0x1d77>, <&dmac2 0x1d78>, + <&dmac3 0x1d77>, <&dmac3 0x1d78>, + <&dmac4 0x1d77>, <&dmac4 0x1d78>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu30: ssiu-12 { + dmas =3D <&dmac0 0x1d79>, <&dmac0 0x1d7a>, + <&dmac1 0x1d79>, <&dmac1 0x1d7a>, + <&dmac2 0x1d79>, <&dmac2 0x1d7a>, + <&dmac3 0x1d79>, <&dmac3 0x1d7a>, + <&dmac4 0x1d79>, <&dmac4 0x1d7a>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu31: ssiu-13 { + dmas =3D <&dmac0 0x1d7b>, <&dmac0 0x1d7c>, + <&dmac1 0x1d7b>, <&dmac1 0x1d7c>, + <&dmac2 0x1d7b>, <&dmac2 0x1d7c>, + <&dmac3 0x1d7b>, <&dmac3 0x1d7c>, + <&dmac4 0x1d7b>, <&dmac4 0x1d7c>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu32: ssiu-14 { + dmas =3D <&dmac0 0x1d7d>, <&dmac0 0x1d7e>, + <&dmac1 0x1d7d>, <&dmac1 0x1d7e>, + <&dmac2 0x1d7d>, <&dmac2 0x1d7e>, + <&dmac3 0x1d7d>, <&dmac3 0x1d7e>, + <&dmac4 0x1d7d>, <&dmac4 0x1d7e>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu33: ssiu-15 { + dmas =3D <&dmac0 0x1d7f>, <&dmac0 0x1d80>, + <&dmac1 0x1d7f>, <&dmac1 0x1d80>, + <&dmac2 0x1d7f>, <&dmac2 0x1d80>, + <&dmac3 0x1d7f>, <&dmac3 0x1d80>, + <&dmac4 0x1d7f>, <&dmac4 0x1d80>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu40: ssiu-16 { + dmas =3D <&dmac0 0x1d81>, <&dmac0 0x1d82>, + <&dmac1 0x1d81>, <&dmac1 0x1d82>, + <&dmac2 0x1d81>, <&dmac2 0x1d82>, + <&dmac3 0x1d81>, <&dmac3 0x1d82>, + <&dmac4 0x1d81>, <&dmac4 0x1d82>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu41: ssiu-17 { + dmas =3D <&dmac0 0x1d83>, <&dmac0 0x1d84>, + <&dmac1 0x1d83>, <&dmac1 0x1d84>, + <&dmac2 0x1d83>, <&dmac2 0x1d84>, + <&dmac3 0x1d83>, <&dmac3 0x1d84>, + <&dmac4 0x1d83>, <&dmac4 0x1d84>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu42: ssiu-18 { + dmas =3D <&dmac0 0x1d85>, <&dmac0 0x1d86>, + <&dmac1 0x1d85>, <&dmac1 0x1d86>, + <&dmac2 0x1d85>, <&dmac2 0x1d86>, + <&dmac3 0x1d85>, <&dmac3 0x1d86>, + <&dmac4 0x1d85>, <&dmac4 0x1d86>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu43: ssiu-19 { + dmas =3D <&dmac0 0x1d87>, <&dmac0 0x1d88>, + <&dmac1 0x1d87>, <&dmac1 0x1d88>, + <&dmac2 0x1d87>, <&dmac2 0x1d88>, + <&dmac3 0x1d87>, <&dmac3 0x1d88>, + <&dmac4 0x1d87>, <&dmac4 0x1d88>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu50: ssiu-20 { + dmas =3D <&dmac0 0x1d89>, <&dmac0 0x1d8a>, + <&dmac1 0x1d89>, <&dmac1 0x1d8a>, + <&dmac2 0x1d89>, <&dmac2 0x1d8a>, + <&dmac3 0x1d89>, <&dmac3 0x1d8a>, + <&dmac4 0x1d89>, <&dmac4 0x1d8a>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu60: ssiu-21 { + dmas =3D <&dmac0 0x1d8b>, <&dmac0 0x1d8c>, + <&dmac1 0x1d8b>, <&dmac1 0x1d8c>, + <&dmac2 0x1d8b>, <&dmac2 0x1d8c>, + <&dmac3 0x1d8b>, <&dmac3 0x1d8c>, + <&dmac4 0x1d8b>, <&dmac4 0x1d8c>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu70: ssiu-22 { + dmas =3D <&dmac0 0x1d8d>, <&dmac0 0x1d8e>, + <&dmac1 0x1d8d>, <&dmac1 0x1d8e>, + <&dmac2 0x1d8d>, <&dmac2 0x1d8e>, + <&dmac3 0x1d8d>, <&dmac3 0x1d8e>, + <&dmac4 0x1d8d>, <&dmac4 0x1d8e>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu80: ssiu-23 { + dmas =3D <&dmac0 0x1d8f>, <&dmac0 0x1d90>, + <&dmac1 0x1d8f>, <&dmac1 0x1d90>, + <&dmac2 0x1d8f>, <&dmac2 0x1d90>, + <&dmac3 0x1d8f>, <&dmac3 0x1d90>, + <&dmac4 0x1d8f>, <&dmac4 0x1d90>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu90: ssiu-24 { + dmas =3D <&dmac0 0x1d91>, <&dmac0 0x1d92>, + <&dmac1 0x1d91>, <&dmac1 0x1d92>, + <&dmac2 0x1d91>, <&dmac2 0x1d92>, + <&dmac3 0x1d91>, <&dmac3 0x1d92>, + <&dmac4 0x1d91>, <&dmac4 0x1d92>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu91: ssiu-25 { + dmas =3D <&dmac0 0x1d93>, <&dmac0 0x1d94>, + <&dmac1 0x1d93>, <&dmac1 0x1d94>, + <&dmac2 0x1d93>, <&dmac2 0x1d94>, + <&dmac3 0x1d93>, <&dmac3 0x1d94>, + <&dmac4 0x1d93>, <&dmac4 0x1d94>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu92: ssiu-26 { + dmas =3D <&dmac0 0x1d95>, <&dmac0 0x1d96>, + <&dmac1 0x1d95>, <&dmac1 0x1d96>, + <&dmac2 0x1d95>, <&dmac2 0x1d96>, + <&dmac3 0x1d95>, <&dmac3 0x1d96>, + <&dmac4 0x1d95>, <&dmac4 0x1d96>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + ssiu93: ssiu-27 { + dmas =3D <&dmac0 0x1d97>, <&dmac0 0x1d98>, + <&dmac1 0x1d97>, <&dmac1 0x1d98>, + <&dmac2 0x1d97>, <&dmac2 0x1d98>, + <&dmac3 0x1d97>, <&dmac3 0x1d98>, + <&dmac4 0x1d97>, <&dmac4 0x1d98>; + dma-names =3D "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "= rx"; + }; + }; + }; + wdt1: watchdog@14400000 { compatible =3D "renesas,r9a09g047-wdt", "renesas,r9a09g057-wdt"; reg =3D <0 0x14400000 0 0x400>; --=20 2.25.1