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To that end: when starting DMA on an RX channel - prepend the existing queue of issued descriptors with an additional "dummy" command descriptor with the LOCK bit set. Once the transaction is done (no more issued descriptors), issue one more dummy descriptor with the UNLOCK bit. We *must* wait until the transaction is signalled as done because we must not perform any writes into config registers while the engine is busy. The dummy writes must be issued into a scratchpad register of the client so provide a mechanism to communicate the right address via descriptor metadata. Reviewed-by: Manivannan Sadhasivam Signed-off-by: Bartosz Golaszewski --- drivers/dma/qcom/bam_dma.c | 167 +++++++++++++++++++++++++++++++++++= +++- include/linux/dma/qcom_bam_dma.h | 14 ++++ 2 files changed, 177 insertions(+), 4 deletions(-) diff --git a/drivers/dma/qcom/bam_dma.c b/drivers/dma/qcom/bam_dma.c index 83491e7c2f17d8c9d12a1a055baea7e3a0a75a53..c3c1d39b6e7cce16cb4eaf45022= 0c9e9a4dffe3f 100644 --- a/drivers/dma/qcom/bam_dma.c +++ b/drivers/dma/qcom/bam_dma.c @@ -28,11 +28,13 @@ #include #include #include +#include #include #include #include #include #include +#include #include #include #include @@ -60,6 +62,8 @@ struct bam_desc_hw { #define DESC_FLAG_EOB BIT(13) #define DESC_FLAG_NWD BIT(12) #define DESC_FLAG_CMD BIT(11) +#define DESC_FLAG_LOCK BIT(10) +#define DESC_FLAG_UNLOCK BIT(9) =20 struct bam_async_desc { struct virt_dma_desc vd; @@ -391,6 +395,14 @@ struct bam_chan { struct list_head desc_list; =20 struct list_head node; + + /* BAM locking infrastructure */ + phys_addr_t scratchpad_addr; + enum dma_transfer_direction direction; + struct scatterlist lock_sg; + struct scatterlist unlock_sg; + struct bam_cmd_element lock_ce; + struct bam_cmd_element unlock_ce; }; =20 static inline struct bam_chan *to_bam_chan(struct dma_chan *common) @@ -652,6 +664,33 @@ static int bam_slave_config(struct dma_chan *chan, return 0; } =20 +static int bam_metadata_attach(struct dma_async_tx_descriptor *desc, void = *data, size_t len) +{ + struct bam_chan *bchan =3D to_bam_chan(desc->chan); + const struct bam_device_data *bdata =3D bchan->bdev->dev_data; + struct bam_desc_metadata *metadata =3D data; + + if (!data) + return -EINVAL; + + if (!bdata->pipe_lock_supported) + /* + * The client wants to use locking but this BAM version doesn't + * support it. Don't return an error here as this will stop the + * client from using DMA at all for no reason. + */ + return 0; + + bchan->scratchpad_addr =3D metadata->scratchpad_addr; + bchan->direction =3D metadata->direction; + + return 0; +} + +static const struct dma_descriptor_metadata_ops bam_metadata_ops =3D { + .attach =3D bam_metadata_attach, +}; + /** * bam_prep_slave_sg - Prep slave sg transaction * @@ -668,6 +707,7 @@ static struct dma_async_tx_descriptor *bam_prep_slave_s= g(struct dma_chan *chan, void *context) { struct bam_chan *bchan =3D to_bam_chan(chan); + struct dma_async_tx_descriptor *tx_desc; struct bam_device *bdev =3D bchan->bdev; struct bam_async_desc *async_desc; struct scatterlist *sg; @@ -723,7 +763,12 @@ static struct dma_async_tx_descriptor *bam_prep_slave_= sg(struct dma_chan *chan, } while (remainder > 0); } =20 - return vchan_tx_prep(&bchan->vc, &async_desc->vd, flags); + tx_desc =3D vchan_tx_prep(&bchan->vc, &async_desc->vd, flags); + if (!tx_desc) + return NULL; + + tx_desc->metadata_ops =3D &bam_metadata_ops; + return tx_desc; } =20 /** @@ -1012,13 +1057,116 @@ static void bam_apply_new_config(struct bam_chan *= bchan, bchan->reconfigure =3D 0; } =20 +static struct bam_async_desc * +bam_make_lock_desc(struct bam_chan *bchan, struct scatterlist *sg, + struct bam_cmd_element *ce, unsigned long flag) +{ + struct dma_chan *chan =3D &bchan->vc.chan; + struct bam_async_desc *async_desc; + struct bam_desc_hw *desc; + struct virt_dma_desc *vd; + struct virt_dma_chan *vc; + unsigned int mapped; + dma_cookie_t cookie; + int ret; + + sg_init_table(sg, 1); + + async_desc =3D kzalloc_flex(*async_desc, desc, 1, GFP_NOWAIT); + if (!async_desc) { + dev_err(bchan->bdev->dev, "failed to allocate the BAM lock descriptor\n"= ); + return ERR_PTR(-ENOMEM); + } + + async_desc->num_desc =3D 1; + async_desc->curr_desc =3D async_desc->desc; + async_desc->dir =3D DMA_MEM_TO_DEV; + + desc =3D async_desc->desc; + + bam_prep_ce_le32(ce, bchan->scratchpad_addr, BAM_WRITE_COMMAND, 0); + sg_set_buf(sg, ce, sizeof(*ce)); + + mapped =3D dma_map_sg_attrs(chan->slave, sg, 1, DMA_TO_DEVICE, DMA_PREP_C= MD); + if (!mapped) { + kfree(async_desc); + return ERR_PTR(-ENOMEM); + } + + desc->flags |=3D cpu_to_le16(DESC_FLAG_CMD | flag); + desc->addr =3D sg_dma_address(sg); + desc->size =3D sizeof(struct bam_cmd_element); + + vc =3D &bchan->vc; + vd =3D &async_desc->vd; + + dma_async_tx_descriptor_init(&vd->tx, &vc->chan); + vd->tx.flags =3D DMA_PREP_CMD; + vd->tx.desc_free =3D vchan_tx_desc_free; + vd->tx_result.result =3D DMA_TRANS_NOERROR; + vd->tx_result.residue =3D 0; + + cookie =3D dma_cookie_assign(&vd->tx); + ret =3D dma_submit_error(cookie); + if (ret) { + dma_unmap_sg(chan->slave, sg, 1, DMA_TO_DEVICE); + kfree(async_desc); + return ERR_PTR(ret); + } + + return async_desc; +} + +static int bam_do_setup_pipe_lock(struct bam_chan *bchan, bool lock) +{ + struct bam_device *bdev =3D bchan->bdev; + const struct bam_device_data *bdata =3D bdev->dev_data; + struct bam_async_desc *lock_desc; + struct bam_cmd_element *ce; + struct scatterlist *sgl; + unsigned long flag; + + lockdep_assert_held(&bchan->vc.lock); + + if (!bdata->pipe_lock_supported || !bchan->scratchpad_addr || + bchan->direction !=3D DMA_MEM_TO_DEV) + return 0; + + if (lock) { + sgl =3D &bchan->lock_sg; + ce =3D &bchan->lock_ce; + flag =3D DESC_FLAG_LOCK; + } else { + sgl =3D &bchan->unlock_sg; + ce =3D &bchan->unlock_ce; + flag =3D DESC_FLAG_UNLOCK; + } + + lock_desc =3D bam_make_lock_desc(bchan, sgl, ce, flag); + if (IS_ERR(lock_desc)) + return PTR_ERR(lock_desc); + + if (lock) + list_add(&lock_desc->vd.node, &bchan->vc.desc_issued); + else + list_add_tail(&lock_desc->vd.node, &bchan->vc.desc_issued); + + return 0; +} + +static void bam_setup_pipe_lock(struct bam_chan *bchan) +{ + if (bam_do_setup_pipe_lock(bchan, true) || bam_do_setup_pipe_lock(bchan, = false)) + dev_err(bchan->vc.chan.slave, "Failed to setup BAM pipe lock descriptors= "); +} + /** * bam_start_dma - start next transaction * @bchan: bam dma channel */ static void bam_start_dma(struct bam_chan *bchan) { - struct virt_dma_desc *vd =3D vchan_next_desc(&bchan->vc); + struct virt_dma_desc *vd; struct bam_device *bdev =3D bchan->bdev; struct bam_async_desc *async_desc =3D NULL; struct bam_desc_hw *desc; @@ -1030,6 +1178,9 @@ static void bam_start_dma(struct bam_chan *bchan) =20 lockdep_assert_held(&bchan->vc.lock); =20 + bam_setup_pipe_lock(bchan); + + vd =3D vchan_next_desc(&bchan->vc); if (!vd) return; =20 @@ -1157,8 +1308,15 @@ static void bam_issue_pending(struct dma_chan *chan) */ static void bam_dma_free_desc(struct virt_dma_desc *vd) { - struct bam_async_desc *async_desc =3D container_of(vd, - struct bam_async_desc, vd); + struct bam_async_desc *async_desc =3D container_of(vd, struct bam_async_d= esc, vd); + struct bam_desc_hw *desc =3D async_desc->desc; + struct dma_chan *chan =3D vd->tx.chan; + struct bam_chan *bchan =3D to_bam_chan(chan); + + if (le16_to_cpu(desc->flags) & DESC_FLAG_LOCK) + dma_unmap_sg(chan->slave, &bchan->lock_sg, 1, DMA_TO_DEVICE); + else if (le16_to_cpu(desc->flags) & DESC_FLAG_UNLOCK) + dma_unmap_sg(chan->slave, &bchan->unlock_sg, 1, DMA_TO_DEVICE); =20 kfree(async_desc); } @@ -1350,6 +1508,7 @@ static int bam_dma_probe(struct platform_device *pdev) bdev->common.device_terminate_all =3D bam_dma_terminate_all; bdev->common.device_issue_pending =3D bam_issue_pending; bdev->common.device_tx_status =3D bam_tx_status; + bdev->common.desc_metadata_modes =3D DESC_METADATA_CLIENT; bdev->common.dev =3D bdev->dev; =20 ret =3D dma_async_device_register(&bdev->common); diff --git a/include/linux/dma/qcom_bam_dma.h b/include/linux/dma/qcom_bam_= dma.h index 68fc0e643b1b97fe4520d5878daa322b81f4f559..a2594264b0f58c4b2b1c85e243c= ad0d5669c26dc 100644 --- a/include/linux/dma/qcom_bam_dma.h +++ b/include/linux/dma/qcom_bam_dma.h @@ -6,6 +6,8 @@ #ifndef _QCOM_BAM_DMA_H #define _QCOM_BAM_DMA_H =20 +#include + #include =20 /* @@ -34,6 +36,18 @@ enum bam_command_type { BAM_READ_COMMAND, }; =20 +/** + * struct bam_desc_metadata - DMA descriptor metadata specific to the BAM = driver. + * + * @scratchpad_addr: Physical address to use for dummy write operations wh= en + * queuing command descriptors with LOCK/UNLOCK bits set. + * @direction: Transfer direction of this channel. + */ +struct bam_desc_metadata { + phys_addr_t scratchpad_addr; + enum dma_transfer_direction direction; +}; + /* * prep_bam_ce_le32 - Wrapper function to prepare a single BAM command * element with the data already in le32 format. --=20 2.47.3