From nobody Wed Apr 1 22:19:11 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 36B1840B6C6; Wed, 1 Apr 2026 12:27:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.14 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775046422; cv=none; b=kunGDC5iKOq8twJe9+HYVzPzZH8jOyOZ4aTbQJYVfHTHsmJLAeCdjKONlvLFxRMiMXm/3os08G18p7A2vkk/8o1v0DV++ULkuUq5DZlZhjvb6MRg4s5+m8rgeBhgYXeyDcqzaJWKPh9akM+zkgPvkPj804V1DZP6KPSw4isyZUg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775046422; c=relaxed/simple; bh=EmicahoMhpzcoOsl03NzvCaNCko7K5Z3dqC/sXu0POY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=k1h9Yz4bFNlnikoUSHsYODzUKMqwda1opLvAgB8HI4dne9SGhvIlpqyzd+YN7iGqAbUydPUlqqgqtsxoI9Mtp5IBW8wiKDyqA4XIvkIOHTTp+DhzpZGSn/xYr0tNh03PthnIc39/+xehd2HgaMkPxnKI5ELII9B7P6xmc6M+snw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=cNuALHq5; arc=none smtp.client-ip=198.175.65.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="cNuALHq5" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1775046421; x=1806582421; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EmicahoMhpzcoOsl03NzvCaNCko7K5Z3dqC/sXu0POY=; b=cNuALHq5EN1ZJ+9pB0dg+DBsfMI/FHPzADrtcVQMLNeGfXx85Ks7BbSw g43RL8OAaREYCCtrGKkFIcCN6CYk2boespNIHKwf7lH2pjmHlSuruyhtb osd9ArmC1wxkSQSaJ6RepJj031XvV6qK6yIMVt2v3RqZiqC6cgN6cNoBz vsy5ALKjZAAuKXqS+oy3VnkDbaW+bzI+C8BoQ1btawYskyh2uBJSb5PUO M0VodY9Pm1w6jkbrZe6MGOd9NghwEuGv/gXCod0bHVLVxBEq7wTC0oYX6 eElHpzeHHiTuSx1JxRVJH/whJobMYVAsHh8p+dQMf81ar66uct/871/+l A==; X-CSE-ConnectionGUID: p6yrF4KDQBiuAzFvniYD0Q== X-CSE-MsgGUID: LObQCt7IQYWpnrlxSGpKkw== X-IronPort-AV: E=McAfee;i="6800,10657,11745"; a="79936882" X-IronPort-AV: E=Sophos;i="6.23,153,1770624000"; d="scan'208";a="79936882" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2026 05:27:01 -0700 X-CSE-ConnectionGUID: 7BJoRhusR8CZ7IuqAt0b8g== X-CSE-MsgGUID: b6bcucmiR7KUR77KHstcwg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,153,1770624000"; d="scan'208";a="249698784" Received: from intel-nuc8i7beh.iind.intel.com ([10.223.163.35]) by fmviesa002.fm.intel.com with ESMTP; 01 Apr 2026 05:26:58 -0700 From: Arun T To: arun.t@intel.com, johannes.goede@oss.qualcomm.com Cc: sakari.ailus@linux.intel.com, arec.kao@intel.com, ilpo.jarvinen@linux.intel.com, dan.scally@ideasonboard.com, platform-driver-x86@vger.kernel.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, mehdi.djait@intel.com Subject: [PATCH v7 2/2] media: ov13b10: Support multiple regulators Date: Wed, 1 Apr 2026 17:50:30 +0530 Message-ID: <20260401122030.3955499-3-arun.t@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260401122030.3955499-1-arun.t@intel.com> References: <20260401122030.3955499-1-arun.t@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The OV13B10 sensor driver currently handles a single regulator called avdd, however the sensor can be supplied by up to three regulators. Update the driver to handle all of them together using the regulator bulk API. Signed-off-by: Arun T Reviewed-by: Daniel Scally Reviewed-by: Sakari Ailus Reviewed-by: Hans de Goede #include #include +#include #include #include #include @@ -699,6 +700,12 @@ static const struct ov13b10_mode supported_2_lanes_mod= es[] =3D { }, }; =20 +static const char * const ov13b10_supply_names[] =3D { + "dovdd", /* Digital I/O power */ + "avdd", /* Analog power */ + "dvdd", /* Digital core power */ +}; + struct ov13b10 { struct device *dev; =20 @@ -708,7 +715,7 @@ struct ov13b10 { struct v4l2_ctrl_handler ctrl_handler; =20 struct clk *img_clk; - struct regulator *avdd; + struct regulator_bulk_data supplies[ARRAY_SIZE(ov13b10_supply_names)]; struct gpio_desc *reset; =20 /* V4L2 Controls */ @@ -1194,9 +1201,8 @@ static int ov13b10_power_off(struct device *dev) struct ov13b10 *ov13b10 =3D to_ov13b10(sd); =20 gpiod_set_value_cansleep(ov13b10->reset, 1); - - if (ov13b10->avdd) - regulator_disable(ov13b10->avdd); + regulator_bulk_disable(ARRAY_SIZE(ov13b10_supply_names), + ov13b10->supplies); =20 clk_disable_unprepare(ov13b10->img_clk); =20 @@ -1214,14 +1220,12 @@ static int ov13b10_power_on(struct device *dev) dev_err(dev, "failed to enable imaging clock: %d", ret); return ret; } - - if (ov13b10->avdd) { - ret =3D regulator_enable(ov13b10->avdd); - if (ret < 0) { - dev_err(dev, "failed to enable avdd: %d", ret); - clk_disable_unprepare(ov13b10->img_clk); - return ret; - } + ret =3D regulator_bulk_enable(ARRAY_SIZE(ov13b10_supply_names), + ov13b10->supplies); + if (ret < 0) { + dev_err(dev, "failed to enable regulators\n"); + clk_disable_unprepare(ov13b10->img_clk); + return ret; } =20 gpiod_set_value_cansleep(ov13b10->reset, 0); @@ -1475,7 +1479,8 @@ static int ov13b10_get_pm_resources(struct ov13b10 *o= v13b) unsigned long freq; int ret; =20 - ov13b->reset =3D devm_gpiod_get_optional(ov13b->dev, "reset", GPIOD_OUT_L= OW); + ov13b->reset =3D devm_gpiod_get_optional(ov13b->dev, "reset", + GPIOD_OUT_LOW); if (IS_ERR(ov13b->reset)) return dev_err_probe(ov13b->dev, PTR_ERR(ov13b->reset), "failed to get reset gpio\n"); @@ -1491,15 +1496,15 @@ static int ov13b10_get_pm_resources(struct ov13b10 = *ov13b) "external clock %lu is not supported\n", freq); =20 - ov13b->avdd =3D devm_regulator_get_optional(ov13b->dev, "avdd"); - if (IS_ERR(ov13b->avdd)) { - ret =3D PTR_ERR(ov13b->avdd); - ov13b->avdd =3D NULL; - if (ret !=3D -ENODEV) - return dev_err_probe(ov13b->dev, ret, - "failed to get avdd regulator\n"); - } + for (unsigned int i =3D 0; i < ARRAY_SIZE(ov13b10_supply_names); i++) + ov13b->supplies[i].supply =3D ov13b10_supply_names[i]; =20 + ret =3D devm_regulator_bulk_get(ov13b->dev, + ARRAY_SIZE(ov13b10_supply_names), + ov13b->supplies); + if (ret) + return dev_err_probe(ov13b->dev, ret, + "failed to get regulators\n"); return 0; } =20 --=20 2.43.0