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charset="utf-8" Add a page associated with the PHC that can be mapped to user space, allowing applications to access hardware timestamp information. In order to synchronize between kernel and user space, a sequence number is incremented at the beginning and end of each update. An odd number means the data is being updated while an even number means the update is complete. To guarantee that the data structure was accessed atomically, user space will: repeat: seq1 =3D goto if odd seq2 =3D if seq1 !=3D seq2 goto repeat This mechanism acts as a guard against reading invalid state during concurrent updates. Co-developed-by: Allen Hubbe Signed-off-by: Allen Hubbe Signed-off-by: Abhijit Gangurde --- .../net/ethernet/pensando/ionic/ionic_lif.h | 3 +- .../net/ethernet/pensando/ionic/ionic_phc.c | 41 +++++++++++++++++++ include/uapi/rdma/ionic-abi.h | 11 +++++ 3 files changed, 54 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/pensando/ionic/ionic_lif.h b/drivers/net/= ethernet/pensando/ionic/ionic_lif.h index 8e10f66dc50e..0b820af2b523 100644 --- a/drivers/net/ethernet/pensando/ionic/ionic_lif.h +++ b/drivers/net/ethernet/pensando/ionic/ionic_lif.h @@ -249,7 +249,7 @@ struct ionic_lif { }; =20 struct ionic_phc { - spinlock_t lock; /* lock for cc and tc */ + spinlock_t lock; /* lock for state_page, cc and tc */ struct cyclecounter cc; struct timecounter tc; =20 @@ -262,6 +262,7 @@ struct ionic_phc { long aux_work_delay; =20 struct ptp_clock_info ptp_info; + struct ionic_phc_state *state_page; struct ptp_clock *ptp; struct ionic_lif *lif; }; diff --git a/drivers/net/ethernet/pensando/ionic/ionic_phc.c b/drivers/net/= ethernet/pensando/ionic/ionic_phc.c index 116408099974..61eaf3834608 100644 --- a/drivers/net/ethernet/pensando/ionic/ionic_phc.c +++ b/drivers/net/ethernet/pensando/ionic/ionic_phc.c @@ -3,6 +3,7 @@ =20 #include #include +#include =20 #include "ionic.h" #include "ionic_bus.h" @@ -334,6 +335,26 @@ static int ionic_setphc_cmd(struct ionic_phc *phc, str= uct ionic_admin_ctx *ctx) return ionic_adminq_post(phc->lif, ctx); } =20 +static void ionic_phc_state_page_update(struct ionic_phc *phc) +{ + struct ionic_phc_state *state =3D phc->state_page; + u32 seq; + + /* read current seq */ + seq =3D smp_load_acquire(&state->seq) & ~1; + + /* make seq odd for updating */ + smp_store_mb(state->seq, seq | 1); + + state->tick =3D phc->tc.cycle_last; + state->nsec =3D phc->tc.nsec; + state->frac =3D phc->tc.frac; + state->mult =3D phc->cc.mult; + + /* make seq the next even number for update completed */ + smp_store_release(&state->seq, seq + 2); +} + static int ionic_phc_adjfine(struct ptp_clock_info *info, long scaled_ppm) { struct ionic_phc *phc =3D container_of(info, struct ionic_phc, ptp_info); @@ -361,6 +382,8 @@ static int ionic_phc_adjfine(struct ptp_clock_info *inf= o, long scaled_ppm) timecounter_read(&phc->tc); phc->cc.mult =3D adj; =20 + ionic_phc_state_page_update(phc); + /* Setphc commands are posted in-order, sequenced by phc->lock. We * need to drop the lock before waiting for the command to complete. */ @@ -386,6 +409,8 @@ static int ionic_phc_adjtime(struct ptp_clock_info *inf= o, s64 delta) =20 timecounter_adjtime(&phc->tc, delta); =20 + ionic_phc_state_page_update(phc); + /* Setphc commands are posted in-order, sequenced by phc->lock. We * need to drop the lock before waiting for the command to complete. */ @@ -415,6 +440,8 @@ static int ionic_phc_settime64(struct ptp_clock_info *i= nfo, =20 timecounter_init(&phc->tc, &phc->cc, ns); =20 + ionic_phc_state_page_update(phc); + /* Setphc commands are posted in-order, sequenced by phc->lock. We * need to drop the lock before waiting for the command to complete. */ @@ -472,6 +499,8 @@ static long ionic_phc_aux_work(struct ptp_clock_info *i= nfo) /* update point-in-time basis to now */ timecounter_read(&phc->tc); =20 + ionic_phc_state_page_update(phc); + /* Setphc commands are posted in-order, sequenced by phc->lock. We * need to drop the lock before waiting for the command to complete. */ @@ -558,6 +587,12 @@ void ionic_lif_alloc_phc(struct ionic_lif *lif) if (!phc) return; =20 + phc->state_page =3D (void *)get_zeroed_page(GFP_KERNEL); + if (!phc->state_page) { + devm_kfree(ionic->dev, phc); + return; + } + phc->lif =3D lif; =20 phc->cc.read =3D ionic_cc_read; @@ -569,6 +604,7 @@ void ionic_lif_alloc_phc(struct ionic_lif *lif) dev_err(lif->ionic->dev, "Invalid device PHC mask multiplier %u, disabling HW timestamp support\= n", phc->cc.mult); + free_page((unsigned long)phc->state_page); devm_kfree(lif->ionic->dev, phc); lif->phc =3D NULL; return; @@ -652,6 +688,10 @@ void ionic_lif_alloc_phc(struct ionic_lif *lif) */ phc->ptp_info.max_adj =3D NORMAL_PPB; =20 + phc->state_page->mask =3D phc->cc.mask; + phc->state_page->shift =3D phc->cc.shift; + ionic_phc_state_page_update(phc); + lif->phc =3D phc; } =20 @@ -662,6 +702,7 @@ void ionic_lif_free_phc(struct ionic_lif *lif) =20 mutex_destroy(&lif->phc->config_lock); =20 + free_page((unsigned long)lif->phc->state_page); devm_kfree(lif->ionic->dev, lif->phc); lif->phc =3D NULL; } diff --git a/include/uapi/rdma/ionic-abi.h b/include/uapi/rdma/ionic-abi.h index 7b589d3e9728..97f695510380 100644 --- a/include/uapi/rdma/ionic-abi.h +++ b/include/uapi/rdma/ionic-abi.h @@ -112,4 +112,15 @@ struct ionic_srq_resp { __aligned_u64 rq_cmb_offset; }; =20 +struct ionic_phc_state { + __u32 seq; + __u32 rsvd; + __aligned_u64 mask; + __aligned_u64 tick; + __aligned_u64 nsec; + __aligned_u64 frac; + __u32 mult; + __u32 shift; +}; + #endif /* IONIC_ABI_H */ --=20 2.43.0