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Wed, 1 Apr 2026 02:30:38 -0500 From: Aksh Garg To: , , , , , , , , , , CC: , , , , , Subject: [PATCH v2 3/4] PCI: endpoint: Add API for DOE initialization and setup in EPC core Date: Wed, 1 Apr 2026 13:00:21 +0530 Message-ID: <20260401073022.215805-4-a-garg7@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260401073022.215805-1-a-garg7@ti.com> References: <20260401073022.215805-1-a-garg7@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00021F68:EE_|SJ0PR10MB5663:EE_ X-MS-Office365-Filtering-Correlation-Id: ff52b391-d837-4e75-77a0-08de8fc097fe X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|36860700016|82310400026|1800799024|921020|18002099003|22082099003|56012099003; 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charset="utf-8" Add pci_epc_setup_doe() API in EPC core driver to initialize and setup the DOE framework for an endpoint controller. The API discovers the DOE capabilities (extended capability ID 0x2E), and registers each discovered DOE mailbox for all the functions in the endpoint controller. This API should be invoked by the controller driver during probe based on the doe_capable feature. Add pci_epc_destroy_doe() API in EPC core driver for cleanup of DOE resources, which should be invoked by the controller driver during controller cleanup based on the doe_capable feature. Co-developed-by: Siddharth Vadapalli Signed-off-by: Siddharth Vadapalli Signed-off-by: Aksh Garg --- Changes since v1: - New patch added to v2 (not in v1) This patch is introduced based on the feedback provided by Manivannan Sadhasivam at [1]. [1]: https://lore.kernel.org/all/p57x6jleaim5w7t2k3v7tioujnaxuovfpj5euop5og= efvw23se@y5fw3che5p5d/ drivers/pci/endpoint/pci-epc-core.c | 71 +++++++++++++++++++++++++++++ include/linux/pci-epc.h | 21 +++++++++ 2 files changed, 92 insertions(+) diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci= -epc-core.c index e546b3dbb240..14f77dd0877b 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -14,6 +14,8 @@ #include #include =20 +#include "../pci.h" + static const struct class pci_epc_class =3D { .name =3D "pci_epc", }; @@ -547,6 +549,75 @@ void pci_epc_mem_unmap(struct pci_epc *epc, u8 func_no= , u8 vfunc_no, } EXPORT_SYMBOL_GPL(pci_epc_mem_unmap); =20 +/** + * pci_epc_doe_setup() - Setup and discover DOE mailboxes for all functions + * @epc: the EPC device on which DOE mailboxes has to be setup + * + * Discover DOE (Data Object Exchange) capabilities for all physical funct= ions + * in the endpoint controller and register DOE mailboxes. + * + * This API should be called by the controller driver during initialization + * if DOE support is available (indicated by doe_capable in pci_epc_featur= es). + * + * RETURNS: 0 on success, -errno on failure + */ +int pci_epc_doe_setup(struct pci_epc *epc) +{ + u16 cap_offset =3D 0; + u8 func_no; + int ret; + + if (!epc || !epc->ops || !epc->ops->find_ext_capability) + return -EINVAL; + + /* Initialize DOE framework for this controller */ + ret =3D pci_ep_doe_init(epc); + if (ret) + return ret; + + /* Discover DOE capabilities for all functions */ + for (func_no =3D 0; func_no < epc->max_functions; func_no++) { + while ((cap_offset =3D epc->ops->find_ext_capability(epc, func_no, 0, + cap_offset, + PCI_EXT_CAP_ID_DOE))) { + /* Register this DOE mailbox */ + ret =3D pci_ep_doe_add_mailbox(epc, func_no, cap_offset); + if (ret) { + dev_err(&epc->dev, + "[pf%d:offset %x] failed to add DOE mailbox\n", + func_no, cap_offset); + } + } + } + + dev_dbg(&epc->dev, "DOE mailboxes setup complete\n"); + return 0; +} +EXPORT_SYMBOL_GPL(pci_epc_doe_setup); + +/** + * pci_epc_doe_destroy() - Destroy and cleanup DOE mailboxes + * @epc: the EPC device on which DOE mailboxes has to be destroyed + * + * Destroy all DOE mailboxes registered on this endpoint controller and + * free associated resources. + * + * This API should be called by the controller driver during controller cl= eanup + * if DOE support is available (indicated by doe_capable in pci_epc_featur= es). + * + * RETURNS: 0 on success, -errno on failure + */ +int pci_epc_doe_destroy(struct pci_epc *epc) +{ + if (!epc) + return -EINVAL; + + pci_ep_doe_destroy(epc); + dev_dbg(&epc->dev, "DOE mailboxes destroyed\n"); + return 0; +} +EXPORT_SYMBOL_GPL(pci_epc_doe_destroy); + /** * pci_epc_clear_bar() - reset the BAR * @epc: the EPC device for which the BAR has to be cleared diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index cfe74585be4c..07fa41a8e466 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -84,6 +84,8 @@ struct pci_epc_map { * @start: ops to start the PCI link * @stop: ops to stop the PCI link * @get_features: ops to get the features supported by the EPC + * @find_ext_capability: ops to find extended capability offset for a func= tion + * in endpoint controller * @owner: the module owner containing the ops */ struct pci_epc_ops { @@ -115,6 +117,8 @@ struct pci_epc_ops { void (*stop)(struct pci_epc *epc); const struct pci_epc_features* (*get_features)(struct pci_epc *epc, u8 func_no, u8 vfunc_no); + u16 (*find_ext_capability)(struct pci_epc *epc, u8 func_no, + u8 vfunc_no, u16 start, u8 cap); struct module *owner; }; =20 @@ -236,6 +240,7 @@ struct pci_epc_bar_desc { * @msi_capable: indicate if the endpoint function has MSI capability * @msix_capable: indicate if the endpoint function has MSI-X capability * @intx_capable: indicate if the endpoint can raise INTx interrupts + * @doe_capable: indicate if the endpoint function has DOE capability * @bar: array specifying the hardware description for each BAR * @align: alignment size required for BAR buffer allocation */ @@ -246,6 +251,7 @@ struct pci_epc_features { unsigned int msi_capable : 1; unsigned int msix_capable : 1; unsigned int intx_capable : 1; + unsigned int doe_capable : 1; struct pci_epc_bar_desc bar[PCI_STD_NUM_BARS]; size_t align; }; @@ -334,6 +340,21 @@ int pci_epc_mem_map(struct pci_epc *epc, u8 func_no, u= 8 vfunc_no, void pci_epc_mem_unmap(struct pci_epc *epc, u8 func_no, u8 vfunc_no, struct pci_epc_map *map); =20 +#ifdef CONFIG_PCI_ENDPOINT_DOE +int pci_epc_doe_setup(struct pci_epc *epc); +int pci_epc_doe_destroy(struct pci_epc *epc); +#else +static inline int pci_epc_doe_setup(struct pci_epc *epc) +{ + return -EOPNOTSUPP; +} + +static inline int pci_epc_doe_destroy(struct pci_epc *epc) +{ + return -EOPNOTSUPP; +} +#endif + #else static inline void pci_epc_init_notify(struct pci_epc *epc) { --=20 2.34.1