From nobody Wed Apr 1 23:46:37 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5B15937F8B0 for ; Wed, 1 Apr 2026 07:27:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775028428; cv=none; b=i+d2ZwElpvqo2FfeAVEFDbAP3u0QJaVc1zHD/Ipd4Nk5pvg08GnlEsoNfr7onbtjH5vhYcQekacevNU/oCUUI6wbYJBtJPSJlR6Fom+qLPcqJmc1+3zmZ8UGYcjB5YW2DnPA+WPQqUJCIici+QLjxzpmal1B5Eeo96LtloNYeQs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775028428; c=relaxed/simple; bh=EnIudP2dkv0psMSTc/VxhMNE1Y82xgXO/GhT4OjRcK0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qLzRE6+6eb90hQzetzaTV3Q1xOj6mHt/Xl9X8cdnXI+d8lesRqE2U/YqJN/Sd53r8A+gCj6IJ/q6UG7yHJ7jIkgc0qqShdGz2NYek1mIv7d4IsHQoKwT07BRlWF/0eEv01P76d6kaPe0Xk2Pl0qXIfG+nBGGseLpolmLKMyVfEc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=AuV95Bfd; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=XY8VS9ke; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="AuV95Bfd"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="XY8VS9ke" Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6312J5lA1006550 for ; Wed, 1 Apr 2026 07:27:06 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= e3tt35zca4Yf0zt4f6l5trL2SRMBblb/msuZnR25dvg=; b=AuV95BfdhL+Opmfg jcU4C8KMnOx/l9/5FzjcE5B4pfGuP8jEZoHMQC+hcUtQCtD7o5vRc1UVSEDuzcUM HzVOTHep4X4VKRBZ+Q1b+Vc5A8XihEi4Hjb+kfG8XVl+dFbGplSU1ae3LyNnqpyu r/XEuaGQs4UsFSeVEgbeLXUgTJIJqyBhdVAAdDuS/7Y1z6cT0nmd2f0p2ZSpvdcK zKE+CVGzPNbGIhyUVD6mGF0QO/3aXUhvyhMQTAxzLAIbQj4nnQdIX/DkYBuN/EQF eSv9Qiqwet/IlbNfQaHmYbOa2cWVABIxKaicDPO+ZVUeDFJJIKI/NrDhyeGPAO1R hfKXVw== Received: from mail-qt1-f197.google.com (mail-qt1-f197.google.com [209.85.160.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4d8tfjh350-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 01 Apr 2026 07:27:06 +0000 (GMT) Received: by mail-qt1-f197.google.com with SMTP id d75a77b69052e-5094ba09affso69473161cf.2 for ; Wed, 01 Apr 2026 00:27:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1775028425; x=1775633225; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=e3tt35zca4Yf0zt4f6l5trL2SRMBblb/msuZnR25dvg=; b=XY8VS9ke86L8UKKnVkxc5lZhZcJKaV0qQ1OPNkGBetYoVVoi+91jxCzQXG3xsezjxF mRKRiyja2Izwse7lxXwVQsomc5qEov+4Z4NDnxR8DgIv50c0wyQikx7tN0pjfZuce+q3 U5QIGYVexYoEr3ecz2WDahC+ZVZeFR+mGSuhXDNC1HZnAypgecuzMqIqXHQMnQlLWAnJ rGF4b21LSB7HKsazBOYA0ksxw1mAdgZdWO9JJZI4Y3pI+AfadF8UbeqDfS43WoVbCyYG TMhyM6VtiH358ulhOIxy+6t5NCwiEh1Bo9EjuwQPyAuoUIyHs/NE2srT0T48thDvnJYy nJsw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1775028425; x=1775633225; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=e3tt35zca4Yf0zt4f6l5trL2SRMBblb/msuZnR25dvg=; b=fASr9LJ3fRmkKhRSnoGrBaIuozqUTYcxaMXbbS27sJMxKPBwdMr50ui9LAl8AC1s3k PjVir5/mdmPGn14e9njysi+6BEITltvlS6jxYrBtXetpIVmAk7DAiUfgPLxhpxp4xSPx OJnlESdplgADSy576JAsT7pWGv4Wz1r2XgwgVjWUl6R/Oode08VIAA53iClDKUaE4+fm z9bb1gBAvksFlenzhwwaMXAg9kBC0ZZ+vuwDxV0Yd2P7BsL6J+oD+bk86lv+WK/PwgTk 7z1H7OpAzLg4n9Rl/glvXH1zyTNGdC9URSaSFGJrg0RkRFGNgb6kOeGyDMMyl53pdyqn QHRA== X-Forwarded-Encrypted: i=1; AJvYcCWBjrAQnvpgK5e2f/FAksP306nr5/8e8lY/wyC0KeAKHe/N538B24LySMU5NPlQnVUz9DLe+mp3rGdAT/Q=@vger.kernel.org X-Gm-Message-State: AOJu0YymIRbY7ML7EW6VylAh3hqpMOpN6uASqeFbZUIwPP8/u6Yge+VF 0+OqQ5avEomdxduHAxe5XJpILWFklnxwXmSca6Vld/GLZa/gx0EulmhsnYZd9Lz8uqTwrIdmP+5 B0Sk8WwBg+0e29ltU177T5OLAI/0+qZMBzjrpITJOUomczNLIz9ZlmrhS0iXWEFwD9wc= X-Gm-Gg: ATEYQzyl/Ea/lIFKHujnYg5sCYO4ifrRseQXRxFAN0F6SueN+nnBAPd9eN/L+a4YG8e WoEeKYU6psEGg3AiXI3h7hviYB92SfQH1fZmR9CgW0PRCfYRmIs0GyoLu23Qi0TQ7963abo5nB4 Z4fIdqlDGQVArrWbJC8+efYx21H0Zrfk2Y8NA9h9DwY5AY73twLvISfVRo4mbgMOJu31tfnxcUd Z8zFlTkrmwG8VXUKfHU7z8Vd40+w7tDk5ymZ5Kl80jezvnlcTbLHqpqbl/H2BddqXEz6pNKGdIL YvjakDtS8q+a5mja5fRKthI0NaFxnEAtjNcHtjCXIWYY/Js/B514XzJ7g3MZrn7y2MbURGH9xvL LRNbJRbCnb3dmdMO6CMw7dAqbzQaxlDQANw6dr1UP+JroAPEjEEQIq9w5VuMaXHDoS6EjcVF3az I6DCGmF7oE4HTPZ+Ho4b/QXcrszohByFjndDU= X-Received: by 2002:a05:622a:1f0b:b0:50b:2708:6ba6 with SMTP id d75a77b69052e-50d3bd84b35mr33564331cf.37.1775028425592; Wed, 01 Apr 2026 00:27:05 -0700 (PDT) X-Received: by 2002:a05:622a:1f0b:b0:50b:2708:6ba6 with SMTP id d75a77b69052e-50d3bd84b35mr33563971cf.37.1775028425153; Wed, 01 Apr 2026 00:27:05 -0700 (PDT) Received: from umbar.lan (2001-14ba-a073-af00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-38cb9f31972sm8638421fa.12.2026.04.01.00.27.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Apr 2026 00:27:04 -0700 (PDT) From: Dmitry Baryshkov Date: Wed, 01 Apr 2026 10:26:31 +0300 Subject: [PATCH 12/19] drm/panel: jadard-jd9365da-h3: support variable DSI configuration Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260401-waveshare-dsi-touch-v1-12-5e9119b5a014@oss.qualcomm.com> References: <20260401-waveshare-dsi-touch-v1-0-5e9119b5a014@oss.qualcomm.com> In-Reply-To: <20260401-waveshare-dsi-touch-v1-0-5e9119b5a014@oss.qualcomm.com> To: Neil Armstrong , Jessica Zhang , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Cong Yang , Ondrej Jirman , Javier Martinez Canillas , Jagan Teki , Liam Girdwood , Mark Brown , Linus Walleij , Bartosz Golaszewski Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=4628; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=EnIudP2dkv0psMSTc/VxhMNE1Y82xgXO/GhT4OjRcK0=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBpzMise5q716JNb6mCOHextVpcrev8EGq1VfyrS XejKxWxc/CJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCaczIrAAKCRCLPIo+Aiko 1atlB/9ybXh0oNRRyVFpLsEO6chTzWL7HYwNjNu/Pf4qF1Lte3YiAXlwF+e5DzcRdGdmzLDuWw3 orTibRNusLWwzPjASY44YPX9XKSstSru7XMZUXUk8rBMvlVtSgsvyZOIXxob01kAkzO6lGdaHHm 75jyrWRT9FIqgGpu+mCBVio7tBEfFziYyTac5rvQf6kwc1ef0/RAiARmtFWFB3hmZnDF8+5SyHr OdI/3Lxq4YCFtd62ytRvvLd2PF4YYKttCc1rg59V3+YtPNg+nOvIQY13BMP2D1BNNDR4H+c7q7e 93BCtdbug9bYsLRpzXagMO13gWpIeJaFyylQJwqYqo+WCIOS X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-GUID: ED15DNMIHssdCEJIv401946hYsDDFuZp X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDAxMDA2NCBTYWx0ZWRfX3cQui3bN97eC xjkLHpiAd8GVDsqKecWQ9v1LkEBdv8m5l/0dzTY1/aAcljYvEZTGU5Sphw3fCHP+W2uQfOE+mU+ UaZVWTVer+eDiv98cc6XsxcCZwTMQOUuOLnNt9DX0K0h0Ign0Akz2dxYfgzDI/C0iFrfnsujjeZ NtuCV0pn7J5QuF6sd35jDpfKpqsuSM4gvxYqNq/5LPwcxI4F9SF1W7KtVq4pZ5XWHaZnSsMIi3M 2OVzDjXUsfZcEnanD4wNo6Yv2NUI12ljXnT82xiZlIsL6JfZi8sFo/QAnjStje4Gr7lN0eiUkiN A3Us7zDGpprtTRaSt3DZD289Mn3pDoJ0THcTadXLD5BtX/+GrmO8C+5YDNTi3aBY4lDUfkurtjC 8VNB5Jw4enoLd9L2hMniIrNXJjpGoSC78xW3G+z/tGxFpWL9ctvMWa3dmfvjkCKSiGdngjwro9n 0g8Cpj+wRYCbe16Zf+w== X-Authority-Analysis: v=2.4 cv=fJc0HJae c=1 sm=1 tr=0 ts=69ccc8ca cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=_FY8QkBUUwJpvv6m3lQA:9 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 X-Proofpoint-ORIG-GUID: ED15DNMIHssdCEJIv401946hYsDDFuZp X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-01_02,2026-04-01_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 phishscore=0 suspectscore=0 lowpriorityscore=0 adultscore=0 priorityscore=1501 spamscore=0 clxscore=1015 bulkscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2604010064 Several panels support attachment either using 4 DSI lanes or just 2. In some cases, this requires a different panel mode to fulfill clock requirements. Extend the driver to handle such cases by letting the panel description to omit lanes specification and parsing number of lanes from the DT. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c | 32 +++++++++++++++++---= ---- 1 file changed, 23 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c b/drivers/gpu= /drm/panel/panel-jadard-jd9365da-h3.c index 1884ad2404cd..5d9db2e1f28f 100644 --- a/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c +++ b/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c @@ -10,6 +10,7 @@ =20 #include #include +#include #include #include #include @@ -23,7 +24,8 @@ struct jadard; =20 struct jadard_panel_desc { - const struct drm_display_mode mode; + const struct drm_display_mode *mode_4ln; + const struct drm_display_mode *mode_2ln; unsigned int lanes; enum mipi_dsi_pixel_format format; int (*init)(struct jadard *jadard); @@ -57,7 +59,10 @@ static void jadard_enable_standard_cmds(struct mipi_dsi_= multi_context *dsi_ctx) mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe1, 0x93); mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe2, 0x65); mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe3, 0xf8); - mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x80, 0x03); + if (dsi_ctx->dsi->lanes =3D=3D 2) + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x80, 0x01); + else + mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x80, 0x03); } =20 static inline struct jadard *panel_to_jadard(struct drm_panel *panel) @@ -151,7 +156,10 @@ static int jadard_get_modes(struct drm_panel *panel, { struct jadard *jadard =3D panel_to_jadard(panel); =20 - return drm_connector_helper_get_modes_fixed(connector, &jadard->desc->mod= e); + if (jadard->dsi->lanes =3D=3D 2) + return drm_connector_helper_get_modes_fixed(connector, jadard->desc->mod= e_2ln); + else + return drm_connector_helper_get_modes_fixed(connector, jadard->desc->mod= e_4ln); } =20 static enum drm_panel_orientation jadard_panel_get_orientation(struct drm_= panel *panel) @@ -354,7 +362,7 @@ static int radxa_display_8hd_ad002_init_cmds(struct jad= ard *jadard) }; =20 static const struct jadard_panel_desc radxa_display_8hd_ad002_desc =3D { - .mode =3D { + .mode_4ln =3D &(const struct drm_display_mode) { .clock =3D 70000, =20 .hdisplay =3D 800, @@ -586,7 +594,7 @@ static int cz101b4001_init_cmds(struct jadard *jadard) }; =20 static const struct jadard_panel_desc cz101b4001_desc =3D { - .mode =3D { + .mode_4ln =3D &(const struct drm_display_mode) { .clock =3D 70000, =20 .hdisplay =3D 800, @@ -819,7 +827,7 @@ static int kingdisplay_kd101ne3_init_cmds(struct jadard= *jadard) }; =20 static const struct jadard_panel_desc kingdisplay_kd101ne3_40ti_desc =3D { - .mode =3D { + .mode_4ln =3D &(const struct drm_display_mode) { .clock =3D (800 + 24 + 24 + 24) * (1280 + 30 + 4 + 8) * 60 / 1000, =20 .hdisplay =3D 800, @@ -1070,7 +1078,7 @@ static int melfas_lmfbx101117480_init_cmds(struct jad= ard *jadard) }; =20 static const struct jadard_panel_desc melfas_lmfbx101117480_desc =3D { - .mode =3D { + .mode_4ln =3D &(const struct drm_display_mode) { .clock =3D (800 + 24 + 24 + 24) * (1280 + 30 + 4 + 8) * 60 / 1000, =20 .hdisplay =3D 800, @@ -1326,7 +1334,7 @@ static int anbernic_rgds_init_cmds(struct jadard *jad= ard) }; =20 static const struct jadard_panel_desc anbernic_rgds_display_desc =3D { - .mode =3D { + .mode_4ln =3D &(const struct drm_display_mode) { .clock =3D (640 + 260 + 220 + 260) * (480 + 10 + 2 + 16) * 60 / 1000, =20 .hdisplay =3D 640, @@ -1562,7 +1570,7 @@ static int taiguan_xti05101_01a_init_cmds(struct jada= rd *jadard) }; =20 static const struct jadard_panel_desc taiguan_xti05101_01a_desc =3D { - .mode =3D { + .mode_4ln =3D &(const struct drm_display_mode) { .clock =3D (800 + 24 + 24 + 24) * (1280 + 30 + 4 + 8) * 60 / 1000, =20 .hdisplay =3D 800, @@ -1614,6 +1622,12 @@ static int jadard_dsi_probe(struct mipi_dsi_device *= dsi) =20 dsi->format =3D desc->format; dsi->lanes =3D desc->lanes; + if (!dsi->lanes) { + dsi->lanes =3D drm_of_get_data_lanes_count_remote(dsi->dev.of_node, 0, -= 1, 2, 4); + if (dsi->lanes < 0) + return dsi->lanes; + } + dev_dbg(&dsi->dev, "lanes: %d\n", dsi->lanes); =20 jadard->reset =3D devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); if (IS_ERR(jadard->reset)) --=20 2.47.3