From nobody Thu Apr 2 01:37:05 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9FD783624C4; Wed, 1 Apr 2026 20:32:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775075534; cv=none; b=Skg5M3aOZWSOMbqY7gD4OctDFRCegYChBdVYrkVxHnUK45GXJFqpdB+FpPfniZiyONOTJPr4OKnIHUXhGjCRe1s+TpdxAqrXtDTDbEoJVzyp2FIobA6K/eSejoLUkWkJAMz8clfPrntxFPVqPP50s2Au5LbUPTgtcmqUL2thLGo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775075534; c=relaxed/simple; bh=452m8FHLQPVsDKFFpFV0J4unoJa1T/HptteCCz0jsx4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OjY6a2isz9sLfg0UvICAnoMhVofslLvxnln02yXekeit/HXgpfKsfZYyT0WgMtGtlziNMiDo+uf9EwnF7IBTKYmD+q+h6abIuKdhVwPFo0OHS8U2Lw3XLITvJXeO2xUygnsHoen02xT54WQt5VGavh2byVH4HWv8kPJFHespimM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=XI55P+Gx; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="XI55P+Gx" Received: by smtp.kernel.org (Postfix) with ESMTPS id 768E9C4CEF7; Wed, 1 Apr 2026 20:32:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1775075534; bh=452m8FHLQPVsDKFFpFV0J4unoJa1T/HptteCCz0jsx4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=XI55P+GxTx1kx7OC5UNSzF5lPshMkLgN4vRGiJcxgpdCCY/7tZVZZvLAzJkO/GM5v kbngVRmPo5ML1r9YkGX6D2KZzoRto6sEdMg8NnsalvxXJm260yz/FA+2DnTSlo5WFV GP0AH0o62EI6/pN7fFdqrY4sxLlOU0Z7OkaAkaSR7H+n6QtlskDDcHKvNSCKWRUGDl zNCpCrOhb2IzOeMpgeku1QkMmbpd541kna2VoTEXFebOShxvu2pKRv5SKFi6D1j5Vg vgLk8BSqIfgZDlbzilNetFcm9ucQRx5EUFP4iQdHh1ANSuazOc7FyAF61y/PyIqQpR OJsI+UnVhstuA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 692C010FCACE; Wed, 1 Apr 2026 20:32:14 +0000 (UTC) From: Rudraksha Gupta via B4 Relay Date: Wed, 01 Apr 2026 13:32:14 -0700 Subject: [PATCH v3 2/4] ARM: dts: qcom: msm8960: Flatten I2C pinctrl state subnodes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260401-expressatt_fuel_guage-v3-2-9674cfc0b5a2@gmail.com> References: <20260401-expressatt_fuel_guage-v3-0-9674cfc0b5a2@gmail.com> In-Reply-To: <20260401-expressatt_fuel_guage-v3-0-9674cfc0b5a2@gmail.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rudraksha Gupta X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1775075533; l=5002; i=guptarud@gmail.com; s=20240916; h=from:subject:message-id; bh=uGSuJpabkXo+b2760NIqVXSdmHC8oQgQfvmWmQRFFVI=; b=ONbsK8sMeCl2/DeiWXCNx3++3J1t0bEpuhnxGHZ+z2WYkYlihNnEdNlg3UrK5TWLoOpnYT4Hf t1HlT9312XbBNp/ccfGeNz7oCNG2nzZgMA7qhDwtbMQnqCVmt4ll55x X-Developer-Key: i=guptarud@gmail.com; a=ed25519; pk=ETrudRugWAtOpr0OhRiheQ1lXM4Kk4KGFnBySlKDi2I= X-Endpoint-Received: by B4 Relay for guptarud@gmail.com/20240916 with auth_id=211 X-Original-From: Rudraksha Gupta Reply-To: guptarud@gmail.com From: Rudraksha Gupta Remove unnecessary inner i2c*-pins {} wrapper nodes from the I2C pinctrl state definitions. Properties are moved directly under the -state {} node, consistent with modern DT style. Assisted-by: Claude:claude-opus-4.6 Signed-off-by: Rudraksha Gupta --- arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 140 +++++++++++++--------------= ---- 1 file changed, 56 insertions(+), 84 deletions(-) diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/q= com/qcom-msm8960.dtsi index fd28401cebb5..6069fb925672 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi @@ -132,129 +132,101 @@ tlmm: pinctrl@800000 { #interrupt-cells =3D <2>; =20 i2c1_default_state: i2c1-default-state { - i2c1-pins { - pins =3D "gpio8", "gpio9"; - function =3D "gsbi1"; - drive-strength =3D <8>; - bias-disable; - }; + pins =3D "gpio8", "gpio9"; + function =3D "gsbi1"; + drive-strength =3D <8>; + bias-disable; }; =20 i2c1_sleep_state: i2c1-sleep-state { - i2c1-pins { - pins =3D "gpio8", "gpio9"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-bus-hold; - }; + pins =3D "gpio8", "gpio9"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-bus-hold; }; =20 i2c2_default_state: i2c2-default-state { - i2c2-pins { - pins =3D "gpio12", "gpio13"; - function =3D "gsbi2"; - drive-strength =3D <8>; - bias-disable; - }; + pins =3D "gpio12", "gpio13"; + function =3D "gsbi2"; + drive-strength =3D <8>; + bias-disable; }; =20 i2c2_sleep_state: i2c2-sleep-state { - i2c2-pins { - pins =3D "gpio12", "gpio13"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-bus-hold; - }; + pins =3D "gpio12", "gpio13"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-bus-hold; }; =20 i2c3_default_state: i2c3-default-state { - i2c3-pins { - pins =3D "gpio16", "gpio17"; - function =3D "gsbi3"; - drive-strength =3D <8>; - bias-disable; - }; + pins =3D "gpio16", "gpio17"; + function =3D "gsbi3"; + drive-strength =3D <8>; + bias-disable; }; =20 i2c3_sleep_state: i2c3-sleep-state { - i2c3-pins { - pins =3D "gpio16", "gpio17"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-bus-hold; - }; + pins =3D "gpio16", "gpio17"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-bus-hold; }; =20 i2c7_default_state: i2c7-default-state { - i2c7-pins { - pins =3D "gpio32", "gpio33"; - function =3D "gsbi7"; - drive-strength =3D <8>; - bias-disable; - }; + pins =3D "gpio32", "gpio33"; + function =3D "gsbi7"; + drive-strength =3D <8>; + bias-disable; }; =20 i2c7_sleep_state: i2c7-sleep-state { - i2c7-pins { - pins =3D "gpio32", "gpio33"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-bus-hold; - }; + pins =3D "gpio32", "gpio33"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-bus-hold; }; =20 i2c8_default_state: i2c8-default-state { - i2c8-pins { - pins =3D "gpio36", "gpio37"; - function =3D "gsbi8"; - drive-strength =3D <8>; - bias-disable; - }; + pins =3D "gpio36", "gpio37"; + function =3D "gsbi8"; + drive-strength =3D <8>; + bias-disable; }; =20 i2c8_sleep_state: i2c8-sleep-state { - i2c8-pins { - pins =3D "gpio36", "gpio37"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-bus-hold; - }; + pins =3D "gpio36", "gpio37"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-bus-hold; }; =20 i2c10_default_state: i2c10-default-state { - i2c10-pins { - pins =3D "gpio73", "gpio74"; - function =3D "gsbi10"; - drive-strength =3D <8>; - bias-disable; - }; + pins =3D "gpio73", "gpio74"; + function =3D "gsbi10"; + drive-strength =3D <8>; + bias-disable; }; =20 i2c10_sleep_state: i2c10-sleep-state { - i2c10-pins { - pins =3D "gpio73", "gpio74"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-bus-hold; - }; + pins =3D "gpio73", "gpio74"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-bus-hold; }; =20 i2c12_default_state: i2c12-default-state { - i2c12-pins { - pins =3D "gpio44", "gpio45"; - function =3D "gsbi12"; - drive-strength =3D <8>; - bias-disable; - }; + pins =3D "gpio44", "gpio45"; + function =3D "gsbi12"; + drive-strength =3D <8>; + bias-disable; }; =20 i2c12_sleep_state: i2c12-sleep-state { - i2c12-pins { - pins =3D "gpio44", "gpio45"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-bus-hold; - }; + pins =3D "gpio44", "gpio45"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-bus-hold; }; =20 sdcc3_default_state: sdcc3-default-state { --=20 2.53.0