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Tue, 31 Mar 2026 22:30:23 +0000 (GMT) From: Gaurav Batra To: linuxppc-dev@lists.ozlabs.org Cc: maddy@linux.ibm.com, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Gaurav Batra , =?UTF-8?q?Dan=20Hor=C3=A1k?= , Ritesh Harjani Subject: [PATCH] powerpc/powernv/iommu: iommu incorrectly bypass DMA APIs Date: Tue, 31 Mar 2026 17:30:22 -0500 Message-ID: <20260331223022.47488-1-gbatra@linux.ibm.com> X-Mailer: git-send-email 2.50.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-GUID: _fFAo6qfGRaGlLCbBrYAdpr7fQd6ao8X X-Authority-Analysis: v=2.4 cv=frzRpV4f c=1 sm=1 tr=0 ts=69cc4b05 cx=c_pps a=3Bg1Hr4SwmMryq2xdFQyZA==:117 a=3Bg1Hr4SwmMryq2xdFQyZA==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=U7nrCbtTmkRpXpFmAIza:22 a=e5mUnYsNAAAA:8 a=pGLkceISAAAA:8 a=VnNF1IyMAAAA:8 a=jgozE7b-QqKo_AkqVKQA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=Vxmtnl_E_bksehYqCbjh:22 X-Proofpoint-ORIG-GUID: UOrbby6Wz-GXax-J-mH2U2QZrhg8FaZH X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzMxMDIxNiBTYWx0ZWRfX8nfxoPgPROHD D2OIuolOTwj00byMLOMSyr4zGMpIEEq2yist7uVhHBkZhhX/l+eZPG8h3s8mUhQG3NNxG1M8lti 9IEB1DxlxMx/hAQZNxqoMZXfa7QVw07ZjZM4j6IfoGZKU1lvHfVO0TMMZDpJdHUnfd338qzbGKA r1a76NNkmJ+RsV8vbTAJjs+z6icLO8aO8v1NxFK9zakHOtQj2fiKIzS+C7T9cZARpvSuhb0EH8R k8gi9XMzPcy2m/TgNiojl92YtJ/ipgAcwE9jv9RpLACArHi/+xurtYMW8FT42ND8JuvUmlNfJRo D4eOX7tH49Ate2bsU61ookE+rbcJfQW8BDsPktVFrX2+Qeoowhqod/qtYHcakwOnVB2GdJwclpA Nxts8PawogyECoZ76ncQbePMS2X2JAl50zurYGHcUUy4zC7yBqxLGgx6R65T0nXhbN2gI951Zji dgE8QJ7x0mLR12QrG2A== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-31_05,2026-03-31_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 priorityscore=1501 malwarescore=0 clxscore=1011 lowpriorityscore=0 bulkscore=0 adultscore=0 suspectscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603310216 In a PowerNV environment, for devices that supports DMA mask less than 64 bit but larger than 32 bits, iommu is incorrectly bypassing DMA APIs while allocating and mapping buffers for DMA operations. Devices are failing with ENOMEN during probe with the following messages amdgpu 0000:01:00.0: [drm] Detected VRAM RAM=3D4096M, BAR=3D4096M amdgpu 0000:01:00.0: [drm] RAM width 128bits GDDR5 amdgpu 0000:01:00.0: iommu: 64-bit OK but direct DMA is limited by 0 amdgpu 0000:01:00.0: dma_iommu_get_required_mask: returning bypass mask 0xf= ffffffffffffff amdgpu 0000:01:00.0: 4096M of VRAM memory ready amdgpu 0000:01:00.0: 32570M of GTT memory ready. amdgpu 0000:01:00.0: (-12) failed to allocate kernel bo amdgpu 0000:01:00.0: [drm] Debug VRAM access will use slowpath MM access amdgpu 0000:01:00.0: [drm] GART: num cpu pages 4096, num gpu pages 65536 amdgpu 0000:01:00.0: [drm] PCIE GART of 256M enabled (table at 0x000000F4FF= F80000). amdgpu 0000:01:00.0: (-12) failed to allocate kernel bo amdgpu 0000:01:00.0: (-12) create WB bo failed amdgpu 0000:01:00.0: amdgpu_device_wb_init failed -12 amdgpu 0000:01:00.0: amdgpu_device_ip_init failed amdgpu 0000:01:00.0: Fatal error during GPU init amdgpu 0000:01:00.0: finishing device. amdgpu 0000:01:00.0: probe with driver amdgpu failed with error -12 amdgpu 0000:01:00.0: ttm finalized Fixes: 1471c517cf7d ("powerpc/iommu: bypass DMA APIs for coherent allocatio= ns for pre-mapped memory") Reported-by: Dan Hor=C3=A1k Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/5039 Tested-by: Dan Horak Signed-off-by: Ritesh Harjani Signed-off-by: Gaurav Batra Reviewed-by: Ritesh Harjani (IBM) Suggested-by: Ritesh Harjani (IBM) --- arch/powerpc/kernel/dma-iommu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/kernel/dma-iommu.c b/arch/powerpc/kernel/dma-iomm= u.c index 73e10bd4d56d..8b4de508d2eb 100644 --- a/arch/powerpc/kernel/dma-iommu.c +++ b/arch/powerpc/kernel/dma-iommu.c @@ -67,7 +67,7 @@ bool arch_dma_unmap_sg_direct(struct device *dev, struct = scatterlist *sg, } bool arch_dma_alloc_direct(struct device *dev) { - if (dev->dma_ops_bypass) + if (dev->dma_ops_bypass && dev->bus_dma_limit) return true; =20 return false; @@ -75,7 +75,7 @@ bool arch_dma_alloc_direct(struct device *dev) =20 bool arch_dma_free_direct(struct device *dev, dma_addr_t dma_handle) { - if (!dev->dma_ops_bypass) + if (!dev->dma_ops_bypass || !dev->bus_dma_limit) return false; =20 return is_direct_handle(dev, dma_handle); --=20 I am working on testing the patch in an LPAR with AMDGPU. I will update the results soon.