From nobody Wed Apr 1 10:59:09 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B6EEB40824D; Tue, 31 Mar 2026 15:26:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774970794; cv=none; b=KWanUkTpX9ER1qu78fn7xtxqw1hdycPGgK1Irbv9ZbLIDrYQfq2whXhUZm5paAmIx0vFtff2kMjktMljr+sHEHwaqUWhevA9BcXdlRnRH7sE9DvZaa69NJvCMZP5kP/TzGJbMhHqzEKiHrnQLlVQ8QxhzFCAvScoPFEvPV+5C3o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774970794; c=relaxed/simple; bh=0al2iiCyvdqOvHHOAtA9D87j8/jVhjszFu42OwifpXQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Wm6bDGNER5JX5sm0Wogwoh9a+n1qIha3FR/ggaPq2fBDVFSrbvJvFqSG1xfaXINYv+lVL7zvu2sqOTYG6/FCjfpZPnS4/orqGvjCLzkCul2Kf6yJmimWtVYPs73R2tQf/2coqPKqzdk1zay7hMKq29uOWfkJdqVWalp5fSd/00Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=HEzymEV2; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="HEzymEV2" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 287121A30C4; Tue, 31 Mar 2026 15:26:30 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id EE76E6029D; Tue, 31 Mar 2026 15:26:29 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 8A26D10450287; Tue, 31 Mar 2026 17:26:27 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1774970789; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=1uWcBKQ8nvsKRUPJODE2gnHDve1r4371hZd5qBpuh4Q=; b=HEzymEV2IlNDHGFWgdu6k7TjKILP+8wZj58U9KN0jmcX3/UvtrPs71mO2Goxm7wFjf3Xj4 3FToGFFvA2TcAL+CgaWnVNbV9k0GKIZCa7SoE2EOUOmiTYt2+XJPid6SzP21YLWt5BiAW/ ONMf6k2GkXMZGLNN78P2hKt/DBi+cQqrD9MvNtMBW++TZ1TnBzJEp7tGyueKGrdnccS/Ro TDYebpmREeaWo5CKI+dxsArBRef9yDu+jxQ0oSaVi123sBxurLDMerUEmW35vCcw6AKqtm U64i25n2wHkP5+WmsWMKZSdlWSCinWKkUyVrIJ6oNim1sJmnQIt7+ejpn9DfCw== From: "Herve Codina (Schneider Electric)" To: Wolfram Sang , Herve Codina , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm Cc: linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Pascal Eberhard , Miquel Raynal , Thomas Petazzoni Subject: [PATCH 3/4] ARM: dts: r9a06g032: Add support for timers Date: Tue, 31 Mar 2026 17:26:14 +0200 Message-ID: <20260331152616.197031-4-herve.codina@bootlin.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260331152616.197031-1-herve.codina@bootlin.com> References: <20260331152616.197031-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" In the Renesas RZ/N1 SoCs family, two timers block are available. Each block contains 8 timers composed of 6 16-bits timers and 2 32-bits timers. Each timer has its own interrupt line. Describe those timers blocks. Signed-off-by: Herve Codina (Schneider Electric) --- arch/arm/boot/dts/renesas/r9a06g032.dtsi | 34 ++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/r= enesas/r9a06g032.dtsi index f4f760aff28b..7d736e1e835a 100644 --- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi +++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi @@ -674,6 +674,40 @@ gpioirqmux: interrupt-controller@51000480 { status =3D "disabled"; }; =20 + timer0: timer@51001000 { + compatible =3D "renesas,r9a06g032-timer", "renesas,rzn1-timer"; + reg =3D <0x51001000 0x400>; + clocks =3D <&sysctrl R9A06G032_HCLK_TIMER0>; + clock-names =3D "pclk"; + power-domains =3D <&sysctrl>; + interrupts =3D , + , + , + , + , + , + , + ; + status =3D "disabled"; + }; + + timer1: timer@51002000 { + compatible =3D "renesas,r9a06g032-timer", "renesas,rzn1-timer"; + reg =3D <0x51002000 0x400>; + clocks =3D <&sysctrl R9A06G032_HCLK_TIMER1>; + clock-names =3D "pclk"; + power-domains =3D <&sysctrl>; + interrupts =3D , + , + , + , + , + , + , + ; + status =3D "disabled"; + }; + can0: can@52104000 { compatible =3D "renesas,r9a06g032-sja1000", "renesas,rzn1-sja1000"; reg =3D <0x52104000 0x800>; --=20 2.53.0