From nobody Wed Apr 1 09:47:51 2026 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3CF8C3FF890; Tue, 31 Mar 2026 14:52:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774968758; cv=none; b=NZAIvIKhTgOYn6RgU53T+ArSK2bS3KR5ahqzEIurPQS8p8qDduQtSS9W4Z4deZRoW23OsI8dhRMUAWnNvpt40977DPluyPnd4jfbLXFhL0uLoIe+CyJxC/L7Qspi7+ge/b/jpFwI5iMz3hEmX+sMcsaSqsvGgwXB7XgBhS3C29Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774968758; c=relaxed/simple; bh=NQaVxmfcqTeFxpUYUeCfJOIcQ1OBkiQyo82UX8yL1qQ=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=tW6DI49jmmvHobdk25LvUzUQC93qOuUiE/g0HNffDp9blfsSZeKlTMxT+Gn+dRtUkPEm6/2np1wryoC0Z/fdz2B7Dzm9Zy8s372aDK4CdxB/c4xOs4qbPr1ud1D6MCCAKq5lbZx77091zKJ72LdRIxHb8Yg00BWGdvbIt5hsElA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: Tcx395gARCK8VW8Ydq0Mdg== X-CSE-MsgGUID: 7dAj3FM/SxSYPU62XqYzCg== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 31 Mar 2026 23:52:35 +0900 Received: from mind-2s.example.org (unknown [10.226.37.207]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id CB7224209849; Tue, 31 Mar 2026 23:52:31 +0900 (JST) From: Fabrizio Castro To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Fabrizio Castro , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Biju Das , Lad Prabhakar Subject: [PATCH] arm64: dts: renesas: rzt2h-n2h-evk: Configure eMMC/SDHI pins Date: Tue, 31 Mar 2026 15:52:18 +0100 Message-ID: <20260331145221.7974-1-fabrizio.castro.jz@renesas.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The HW user manual for the Renesas RZ/T2H and the RZ/N2H state that for SDR104, SDR50, and HS200 to work properly the eMMC/SDHI interface pins have to be configured as specified below: * SDn_CLK pin - drive strength: Ultra High, slew rate: fast * Other SDn_* pins: drive strength: High, slew rate: fast, Schmitt trigger: disabled (not applicable to SDn_RST pins). Adjust the pin definitions accordingly. Signed-off-by: Fabrizio Castro Reviewed-by: Lad Prabhakar --- .../dts/renesas/rzt2h-n2h-evk-common.dtsi | 54 ++++++++++++++++--- 1 file changed, 46 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi b/arch/a= rm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi index f87c2492f414..3fae950db603 100644 --- a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi +++ b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi @@ -275,12 +275,28 @@ data-pins { , /* SD0_DATA5 */ , /* SD0_DATA6 */ ; /* SD0_DATA7 */ + drive-strength-microamp =3D <9000>; + slew-rate =3D <1>; + input-schmitt-disable; }; =20 - ctrl-pins { - pinmux =3D , /* SD0_CLK */ - , /* SD0_CMD */ - ; /* SD0_RST# */ + clk-pins { + pinmux =3D ; /* SD0_CLK */ + drive-strength-microamp =3D <11800>; + slew-rate =3D <1>; + }; + + cmd-pins { + pinmux =3D ; /* SD0_CMD */ + drive-strength-microamp =3D <9000>; + slew-rate =3D <1>; + input-schmitt-disable; + }; + + rst-pins { + pinmux =3D ; /* SD0_RST# */ + drive-strength-microamp =3D <9000>; + slew-rate =3D <1>; }; }; =20 @@ -299,12 +315,23 @@ data-pins { , /* SD0_DATA1 */ , /* SD0_DATA2 */ ; /* SD0_DATA3 */ + drive-strength-microamp =3D <9000>; + slew-rate =3D <1>; + input-schmitt-disable; + }; + + clk-pins { + pinmux =3D ; /* SD0_CLK */ + drive-strength-microamp =3D <11800>; + slew-rate =3D <1>; }; =20 ctrl-pins { - pinmux =3D , /* SD0_CLK */ - , /* SD0_CMD */ + pinmux =3D , /* SD0_CMD */ ; /* SD0_CD */ + drive-strength-microamp =3D <9000>; + slew-rate =3D <1>; + input-schmitt-disable; }; }; =20 @@ -323,12 +350,23 @@ data-pins { , /* SD1_DATA1 */ , /* SD1_DATA2 */ ; /* SD1_DATA3 */ + drive-strength-microamp =3D <9000>; + slew-rate =3D <1>; + input-schmitt-disable; + }; + + clk-pins { + pinmux =3D ; /* SD1_CLK */ + drive-strength-microamp =3D <11800>; + slew-rate =3D <1>; }; =20 ctrl-pins { - pinmux =3D , /* SD1_CLK */ - , /* SD1_CMD */ + pinmux =3D , /* SD1_CMD */ ; /* SD1_CD */ + drive-strength-microamp =3D <9000>; + slew-rate =3D <1>; + input-schmitt-disable; }; }; }; --=20 2.34.1