From nobody Wed Apr 1 11:15:17 2026 Received: from www537.your-server.de (www537.your-server.de [188.40.3.216]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CB41A3DDDC5; Tue, 31 Mar 2026 14:19:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=188.40.3.216 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774966769; cv=none; b=pgKYl/fP+IqaL0YCkePYEqmzWoxrUHm/dOePqntG+6Zs9dNO/QBfHlDVBQ+jtq/AbPF/fpgidh7UxQDXlcHtYo9+4n2qDOjKfI/gDJawOdbdRGZQQqrMlW61AHuE/G+bbZQIHpTlXADQ5oUsxheSfOUbiS6nmKbBSjsR2FQvFQg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774966769; c=relaxed/simple; bh=rc79PrskglrbOIeqo3w2tff9iVbhZUGUlEcbazTtf8E=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MsArYqERAuI2yI8YDlRbszIDPA+5JF5rb4FM7Eix2AOtoJQ7M3lRMehDCXVVr7eHZ4fFk14I7l/ywiOUj9GnAPKP49oPFMaGuzyeZGKaj57gDqpTX1RHkp5MH0LQXPXnbE091p1kuvlAztZD8LqAARjKct7xwwxa+AKHFPnFtGA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ew.tq-group.com; spf=pass smtp.mailfrom=ew.tq-group.com; dkim=pass (2048-bit key) header.d=ew.tq-group.com header.i=@ew.tq-group.com header.b=c7YY0sT1; arc=none smtp.client-ip=188.40.3.216 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ew.tq-group.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ew.tq-group.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ew.tq-group.com header.i=@ew.tq-group.com header.b="c7YY0sT1" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=ew.tq-group.com; s=default2602; h=Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID; bh=ZNMU7R0+PtTCXkLPMkSZUIxZhAoZeXOu0BjqlP2xt14=; b=c7YY0sT1vUNSMvnHN3lGle78gM TYbzYY45vzyuk+SOLtRbaOwZ0GTCkaqYA+nHH6USLjGaOyFLi2Yfv9zjIVUICZrX7ERpEE+iBcDIL GEmKInaL7ie3++04Dc3MaV45dyQXlDye2yzy2CAyBWF8ZTs1ICOW4DLXPqEv0KUN3CAW3ARsStIRn VVwYf9NXphN15LsmUp9fI3nTzHXS01C+0kMbT743Q5PkWgoDag+BQT26+UNRiWJgAQCQvMS4KTdV9 0QuYwo7hZ5XeVWopRQqo0koW/7brQyWrvaxBajtNZA+47V0OANkp/ZPYaBuevLF7ibCjnP8BTc7KH eFLpBRBQ==; Received: from sslproxy02.your-server.de ([78.47.166.47]) by www537.your-server.de with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.96.2) (envelope-from ) id 1w7ZwE-000JtF-17; Tue, 31 Mar 2026 16:19:26 +0200 Received: from localhost ([127.0.0.1]) by sslproxy02.your-server.de with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1w7ZwD-000Mdz-2B; Tue, 31 Mar 2026 16:19:25 +0200 From: Alexander Stein To: Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexander Stein , Shawn Guo Cc: Nora Schiffer , linux-arm-kernel@lists.infradead.org, linux@ew.tq-group.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 6/7] arm64: dts: fsl-lx2160a-tqmlx2160a-mbls2160a: specify Ethernet PHY reset GPIOs Date: Tue, 31 Mar 2026 16:19:07 +0200 Message-ID: <20260331141915.2918927-7-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260331141915.2918927-1-alexander.stein@ew.tq-group.com> References: <20260331141915.2918927-1-alexander.stein@ew.tq-group.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Virus-Scanned: Clear (ClamAV 1.4.3/27957/Tue Mar 31 08:24:30 2026) Content-Type: text/plain; charset="utf-8" From: Nora Schiffer Correctly describe the PHY resets. While the TI DP83867 requires only a 1us reset pulse in RGMII mode, 2.5ms are needed for SGMII, where series capacitors would result in incorrect sampling of strap pins if they don't have enough time to discharge. Signed-off-by: Nora Schiffer Signed-off-by: Alexander Stein --- .../fsl-lx2160a-tqmlx2160a-mblx2160a.dts | 35 +++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a= .dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts index 46a9fdc92bb56..687fd0d62235d 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts @@ -106,36 +106,59 @@ &dpmac18 { phy-connection-type =3D "rgmii-id"; }; =20 +/* + * Assert reset for 2.5ms on SGMII PHYs to let capacitors discharge before + * strap pin sampling + */ + &emdio1 { status =3D "okay"; =20 dp83867_1_1: ethernet-phy@1 { reg =3D <1>; + reset-assert-us =3D <2500>; + reset-deassert-us =3D <200>; + reset-gpios =3D <&gpioex1 1 GPIO_ACTIVE_LOW>; ti,clk-output-sel =3D ; }; =20 dp83867_1_2: ethernet-phy@2 { reg =3D <2>; + reset-assert-us =3D <2500>; + reset-deassert-us =3D <200>; + reset-gpios =3D <&gpioex1 2 GPIO_ACTIVE_LOW>; ti,clk-output-sel =3D ; }; =20 dp83867_1_3: ethernet-phy@3 { reg =3D <3>; + reset-assert-us =3D <2500>; + reset-deassert-us =3D <200>; + reset-gpios =3D <&gpioex1 3 GPIO_ACTIVE_LOW>; ti,clk-output-sel =3D ; }; =20 dp83867_1_4: ethernet-phy@4 { reg =3D <4>; + reset-assert-us =3D <2500>; + reset-deassert-us =3D <200>; + reset-gpios =3D <&gpioex1 4 GPIO_ACTIVE_LOW>; ti,clk-output-sel =3D ; }; =20 dp83867_1_5: ethernet-phy@5 { reg =3D <5>; + reset-assert-us =3D <2500>; + reset-deassert-us =3D <200>; + reset-gpios =3D <&gpioex1 5 GPIO_ACTIVE_LOW>; ti,clk-output-sel =3D ; }; =20 dp83867_1_6: ethernet-phy@6 { reg =3D <6>; + reset-assert-us =3D <2500>; + reset-deassert-us =3D <200>; + reset-gpios =3D <&gpioex1 6 GPIO_ACTIVE_LOW>; ti,clk-output-sel =3D ; }; }; @@ -145,16 +168,25 @@ &emdio2 { =20 dp83867_2_1: ethernet-phy@1 { reg =3D <1>; + reset-assert-us =3D <2500>; + reset-deassert-us =3D <200>; + reset-gpios =3D <&gpioex1 7 GPIO_ACTIVE_LOW>; ti,clk-output-sel =3D ; }; =20 dp83867_2_2: ethernet-phy@2 { reg =3D <2>; + reset-assert-us =3D <2500>; + reset-deassert-us =3D <200>; + reset-gpios =3D <&gpioex1 8 GPIO_ACTIVE_LOW>; ti,clk-output-sel =3D ; }; =20 dp83867_2_3: ethernet-phy@3 { reg =3D <3>; + reset-assert-us =3D <1>; + reset-deassert-us =3D <200>; + reset-gpios =3D <&gpioex1 9 GPIO_ACTIVE_LOW>; ti,rx-internal-delay =3D ; ti,tx-internal-delay =3D ; ti,clk-output-sel =3D ; @@ -162,6 +194,9 @@ dp83867_2_3: ethernet-phy@3 { =20 dp83867_2_4: ethernet-phy@4 { reg =3D <4>; + reset-assert-us =3D <1>; + reset-deassert-us =3D <200>; + reset-gpios =3D <&gpioex1 10 GPIO_ACTIVE_LOW>; ti,rx-internal-delay =3D ; ti,tx-internal-delay =3D ; ti,clk-output-sel =3D ; --=20 2.43.0