From nobody Wed Apr 1 09:47:52 2026 Received: from www537.your-server.de (www537.your-server.de [188.40.3.216]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 577993D811A; Tue, 31 Mar 2026 14:19:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=188.40.3.216 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774966768; cv=none; b=NyGA0YxQzVaugVHeNfyzf2FfTJwa23F60w+qBw3XyYFk9n8ySMjXHaVM+V5U3gC7HF5ph53Nk4C9ZtYxWYwnLNVSXcPbIgjEoqaT0Z7r+WASW1rQ3tNwoDIAwJBZsTigrHW4WLPtpKVbU5OpoQP/HikhAA7UbWkFuG/Hxxf12RY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774966768; c=relaxed/simple; bh=nnqwKeY3tSZ7iGmK1VW91jZ3qqEtcptwPTUk8yZyxsM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=DL53c13UCxdJMcj5rZLjmqCSq2HczKafXN78yD6l9zCLl3wyHXUk8gB8/HGkt7KAm8TtWKC+4pNEEHVmdqoNv3+qOzlD/yU7jV5OT3u9dSkWI7h86n6mFoEi7dOlZ6k48oZv6r5joJ3vRLColtRt2WJewd+568JWdQatWMET33o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ew.tq-group.com; spf=pass smtp.mailfrom=ew.tq-group.com; dkim=pass (2048-bit key) header.d=ew.tq-group.com header.i=@ew.tq-group.com header.b=k5aJAP4x; arc=none smtp.client-ip=188.40.3.216 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ew.tq-group.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ew.tq-group.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ew.tq-group.com header.i=@ew.tq-group.com header.b="k5aJAP4x" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=ew.tq-group.com; s=default2602; h=Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID; bh=sYKAYwmhafN/zPmLO4GAJE3orSeGPeP68O5+nLKp7Xs=; b=k5aJAP4x8YPRe9sneC6P92hK0s 7U0r0VyWK8e3BZN4U90aR3S77xBNy9ZSAsgpxurSv6+uLBuDkdVYCPjBR35QWFHu4L9FwDGJwIDSH yJPwzvTH08DZu7xpnx98aj9GefNsldOf9i0V1R7dgVKCzbVzRWBr6kUKGzyINDZBy7aKLVfY4FkdA h2QVL2tRbSiv6n27FJpI9KKWmyant9a+GUB6CV3L74sEoxMjV3ghnaAB5cB6zAPn+jJTaWPwkJyqM ANROZafE0bJomjubIJtIw+u2Jeb0L3HOMeo0nwECQgnGVPbZA2hixKuAAQlgwCI/HY22/NkFYfVdT U8qAOu2A==; Received: from sslproxy02.your-server.de ([78.47.166.47]) by www537.your-server.de with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.96.2) (envelope-from ) id 1w7ZwC-000Jrv-25; Tue, 31 Mar 2026 16:19:24 +0200 Received: from localhost ([127.0.0.1]) by sslproxy02.your-server.de with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1w7ZwB-000Mdz-38; Tue, 31 Mar 2026 16:19:24 +0200 From: Alexander Stein To: Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexander Stein , Shawn Guo Cc: Nora Schiffer , linux-arm-kernel@lists.infradead.org, linux@ew.tq-group.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/7] arm64: dts: fsl-lx2160a-tqmlx2160a: fix LED polarity Date: Tue, 31 Mar 2026 16:19:02 +0200 Message-ID: <20260331141915.2918927-2-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260331141915.2918927-1-alexander.stein@ew.tq-group.com> References: <20260331141915.2918927-1-alexander.stein@ew.tq-group.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Virus-Scanned: Clear (ClamAV 1.4.3/27957/Tue Mar 31 08:24:30 2026) Content-Type: text/plain; charset="utf-8" From: Nora Schiffer Both LEDs are active-high. Fixes: 04b77e0124ef ("arm64: dts: freescale: add fsl-lx2160a-mblx2160a boar= d") Signed-off-by: Nora Schiffer Signed-off-by: Alexander Stein --- .../boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a= .dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts index f6a4f8d543015..a79290401551e 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts @@ -51,7 +51,7 @@ leds { compatible =3D "gpio-leds"; =20 led-user1 { - gpios =3D <&gpioex1 15 GPIO_ACTIVE_LOW>; + gpios =3D <&gpioex1 15 GPIO_ACTIVE_HIGH>; color =3D ; function =3D LED_FUNCTION_HEARTBEAT; function-enumerator =3D <0>; @@ -59,7 +59,7 @@ led-user1 { }; =20 led-user2 { - gpios =3D <&gpio2 8 GPIO_ACTIVE_LOW>; + gpios =3D <&gpio2 8 GPIO_ACTIVE_HIGH>; color =3D ; function =3D LED_FUNCTION_HEARTBEAT; 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charset="utf-8" From: Nora Schiffer We have been informed that using DPMAC 17 and 18 for RGMII when SERDES2 is configured to provide SGMII lanes for these MACs is unsupported and will cause errors in certain DPAA2 configurations. Update these configurations to use SGMII instead. The total number of available Gbit Ethernet ports does not change, but the PHYs and physical ports corresponding to DPMAC 17 and 18 do. Signed-off-by: Nora Schiffer Signed-off-by: Alexander Stein --- .../fsl-lx2160a-tqmlx2160a-mblx2160a_x_11_x.dtso | 12 ++++++++++++ .../fsl-lx2160a-tqmlx2160a-mblx2160a_x_7_x.dtso | 12 ++++++++++++ 2 files changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a= _x_11_x.dtso b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx216= 0a_x_11_x.dtso index 6d0c808cd840f..0847c786dc1ca 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a_x_11_x= .dtso +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a_x_11_x= .dtso @@ -32,6 +32,18 @@ &dpmac16 { managed =3D "in-band-status"; }; =20 +&dpmac17 { + phy-handle =3D <&dp83867_1_2>; + phy-connection-type =3D "sgmii"; + managed =3D "in-band-status"; +}; + +&dpmac18 { + phy-handle =3D <&dp83867_1_3>; + phy-connection-type =3D "sgmii"; + managed =3D "in-band-status"; +}; + &pcs_mdio12 { status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a= _x_7_x.dtso b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160= a_x_7_x.dtso index db88a86ff69cd..7520f105d5d8c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a_x_7_x.= dtso +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a_x_7_x.= dtso @@ -30,6 +30,18 @@ &dpmac16 { managed =3D "in-band-status"; }; =20 +&dpmac17 { + phy-handle =3D <&dp83867_1_2>; + phy-connection-type =3D "sgmii"; + managed =3D "in-band-status"; +}; + +&dpmac18 { + phy-handle =3D <&dp83867_1_3>; + phy-connection-type =3D "sgmii"; + managed =3D "in-band-status"; +}; + &pcs_mdio12 { status =3D "okay"; }; --=20 2.43.0 From nobody Wed Apr 1 09:47:52 2026 Received: from www537.your-server.de (www537.your-server.de [188.40.3.216]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C53953DFC76; Tue, 31 Mar 2026 14:19:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=188.40.3.216 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774966769; cv=none; b=TeNapjWDSLnpfmDDTsHcC7DIkHPKMXumVC5tlUqK6WmrsWeCyUQ0Kl7g0LYZu7b4rrjYYMdZMzYG7s2ZGUA5u8ENnH/caB7J9+ZMPnQvplvH1ZqXZu+GKd3WPugUqI6RpD4teHErySkkcc5cJJHG+nheuM5mKWRX2kgezRFuSuI= ARC-Message-Signature: i=1; a=rsa-sha256; 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Tue, 31 Mar 2026 16:19:24 +0200 From: Alexander Stein To: Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexander Stein , Shawn Guo Cc: Nora Schiffer , linux-arm-kernel@lists.infradead.org, linux@ew.tq-group.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/7] arm64: dts: fsl-lx2160a-tqmlx2160a: add aliases for all 18 DPMAC instances Date: Tue, 31 Mar 2026 16:19:04 +0200 Message-ID: <20260331141915.2918927-4-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260331141915.2918927-1-alexander.stein@ew.tq-group.com> References: <20260331141915.2918927-1-alexander.stein@ew.tq-group.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Virus-Scanned: Clear (ClamAV 1.4.3/27957/Tue Mar 31 08:24:30 2026) Content-Type: text/plain; charset="utf-8" From: Nora Schiffer Each TQMX2160A comes with a block of 18 MAC addresses. Define aliases to allow firmware to statically assign these addresses to the Ethernet interfaces. In addition, udev can use these aliases for predicable interface names. Signed-off-by: Nora Schiffer Signed-off-by: Alexander Stein --- .../dts/freescale/fsl-lx2160a-tqmlx2160a.dtsi | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a.dtsi b/ar= ch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a.dtsi index 89a4765737b4f..5ca950ff908e7 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a.dtsi @@ -8,6 +8,27 @@ #include "fsl-lx2160a.dtsi" =20 / { + aliases { + ethernet0 =3D &dpmac1; + ethernet1 =3D &dpmac2; + ethernet2 =3D &dpmac3; + ethernet3 =3D &dpmac4; + ethernet4 =3D &dpmac5; + ethernet5 =3D &dpmac6; + ethernet6 =3D &dpmac7; + ethernet7 =3D &dpmac8; + ethernet8 =3D &dpmac9; + ethernet9 =3D &dpmac10; + ethernet10 =3D &dpmac11; + ethernet11 =3D &dpmac12; + ethernet12 =3D &dpmac13; + ethernet13 =3D &dpmac14; + ethernet14 =3D &dpmac15; + ethernet15 =3D &dpmac16; + ethernet16 =3D &dpmac17; + ethernet17 =3D &dpmac18; + }; + reg_vcc3v3: regulator-vcc3v3 { compatible =3D "regulator-fixed"; regulator-name =3D "VCC3V3"; --=20 2.43.0 From nobody Wed Apr 1 09:47:52 2026 Received: from www537.your-server.de (www537.your-server.de [188.40.3.216]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4E88632D7F8; Tue, 31 Mar 2026 14:19:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=188.40.3.216 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774966768; cv=none; b=C7A/a9NZh6dX9HNgDBxzkTNX0Iz8SQcuXNCl1xs1QcTRyWxb5ESgqCrg54KWknCfFP8O2XsAz+A2b9kB+AdZy3iO20VSU4/AU36rMZ8owZm+bnMb9GfOQMU6Ge2UxWOQdjULKGuXU4kSDm5MIJOuI6bCcl19ElHmskesFwkma8A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774966768; c=relaxed/simple; bh=Z6h9bnAgtRDtxosaSxVkWHxCl99Fzyq/xqzZMKeZfTY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; 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charset="utf-8" From: Nora Schiffer Add GPIO hogs for various signals: - Reset signals not assiciated with a device described in the Device Tree (SATA, PCIe, ...) - Inputs that must never be driven to avoid hardware damage Signed-off-by: Nora Schiffer Signed-off-by: Alexander Stein --- .../fsl-lx2160a-tqmlx2160a-mblx2160a.dts | 259 ++++++++++++++++++ 1 file changed, 259 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a= .dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts index a79290401551e..431e4ed2a8b86 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts @@ -187,6 +187,118 @@ gpioex3: gpio@20 { #gpio-cells =3D <2>; gpio-controller; vcc-supply =3D <®_vcc3v3>; + + line0-hog { + gpio-hog; + gpios =3D <0 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "NOR_SWAP#"; + }; + + line1-hog { + gpio-hog; + gpios =3D <1 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "BOOT_SRC2"; + }; + + line2-hog { + gpio-hog; + gpios =3D <2 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "BOOT_SRC1"; + }; + + line3-hog { + gpio-hog; + gpios =3D <3 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "BOOT_SRC0"; + }; + + line4-hog { + gpio-hog; + gpios =3D <4 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "EMMC_SEL1"; + }; + + line5-hog { + gpio-hog; + gpios =3D <5 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "EMMC_SEL0"; + }; + + line6-hog { + gpio-hog; + gpios =3D <6 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "SD2_4_MUX_SEL"; + }; + + line7-hog { + gpio-hog; + gpios =3D <7 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "SD2_3_MUX_SEL"; + }; + + line8-hog { + gpio-hog; + gpios =3D <8 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "SD2_2_MUX_SEL"; + }; + + line9-hog { + gpio-hog; + gpios =3D <9 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "SD1_MUX_SEL"; + }; + + line10-hog { + gpio-hog; + gpios =3D <10 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "ENABLE_FAN"; + }; + + line11-hog { + gpio-hog; + gpios =3D <11 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "SD3_MUX_SEL"; + }; + + line12-hog { + gpio-hog; + gpios =3D <12 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "SD2_7_MUX_SEL"; + }; + + line13-hog { + gpio-hog; + gpios =3D <13 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "SD2_6_MUX_SEL"; + }; + + line14-hog { + gpio-hog; + gpios =3D <14 GPIO_ACTIVE_HIGH>; + input; + /* Reserved */ + }; + + line15-hog { + gpio-hog; + gpios =3D <15 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "EC2_SEL"; + }; }; }; =20 @@ -223,6 +335,83 @@ gpioex0: gpio@20 { #gpio-cells =3D <2>; gpio-controller; vcc-supply =3D <®_vcc3v3>; + + line2-hog { + gpio-hog; + gpios =3D <2 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "QSFP_MODPRS#"; + }; + + line3-hog { + gpio-hog; + gpios =3D <3 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "QSFP_INT#"; + }; + + line5-hog { + gpio-hog; + gpios =3D <5 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "IRQ_RETIMER_1#"; + }; + + line6-hog { + gpio-hog; + gpios =3D <6 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "IRQ_RETIMER_2#"; + }; + + line7-hog { + gpio-hog; + gpios =3D <7 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "MPCIE_1_WAKE#"; + }; + + line8-hog { + gpio-hog; + gpios =3D <8 GPIO_ACTIVE_HIGH>; + output-high; + line-name =3D "MPCIE_1_DISABLE#"; + }; + + line9-hog { + gpio-hog; + gpios =3D <9 GPIO_ACTIVE_HIGH>; + output-high; + line-name =3D "MPCIE_1_RESET#"; + }; + + line10-hog { + gpio-hog; + gpios =3D <10 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "MPCIE_2_WAKE#"; + }; + + line11-hog { + gpio-hog; + gpios =3D <11 GPIO_ACTIVE_HIGH>; + output-high; + line-name =3D "MPCIE_2_DISABLE#"; + }; + + line12-hog { + gpio-hog; + gpios =3D <12 GPIO_ACTIVE_HIGH>; + output-high; + line-name =3D "MPCIE_2_RESET#"; + }; + + line15-hog { + gpio-hog; + gpios =3D <15 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "SIM_CARD_DETECT"; + }; }; =20 gpioex1: gpio@21 { @@ -231,6 +420,20 @@ gpioex1: gpio@21 { #gpio-cells =3D <2>; gpio-controller; vcc-supply =3D <®_vcc3v3>; + + line13-hog { + gpio-hog; + gpios =3D <13 GPIO_ACTIVE_HIGH>; + output-high; + line-name =3D "RST_M2_SATA_1#"; + }; + + line14-hog { + gpio-hog; + gpios =3D <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name =3D "RST_M2_SATA_2#"; + }; }; =20 gpioex2: gpio@22 { @@ -239,6 +442,62 @@ gpioex2: gpio@22 { #gpio-cells =3D <2>; gpio-controller; vcc-supply =3D <®_vcc3v3>; + + line8-hog { + gpio-hog; + gpios =3D <8 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "XFI1_RET_LOSS"; + }; + + line9-hog { + gpio-hog; + gpios =3D <9 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "XFI2_RET_LOSS"; + }; + + line10-hog { + gpio-hog; + gpios =3D <10 GPIO_ACTIVE_HIGH>; + output-high; + line-name =3D "PCIE_1_PERST#"; + }; + + line11-hog { + gpio-hog; + gpios =3D <11 GPIO_ACTIVE_HIGH>; + output-high; + line-name =3D "PCIE_2_PERST#"; + }; + + line12-hog { + gpio-hog; + gpios =3D <12 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "PCIE_WAKE#"; + }; + + line13-hog { + gpio-hog; + gpios =3D <13 GPIO_ACTIVE_HIGH>; + input; + line-name =3D "X8_PRSNT1#"; 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Tue, 31 Mar 2026 16:19:25 +0200 From: Alexander Stein To: Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexander Stein , Shawn Guo Cc: Nora Schiffer , linux-arm-kernel@lists.infradead.org, linux@ew.tq-group.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/7] arm64: dts: fsl-lx2160a-tqmlx2160a-mbls2160a: enable pcs_mdio17 and pcs_mdio18 in appropriate overlays Date: Tue, 31 Mar 2026 16:19:06 +0200 Message-ID: <20260331141915.2918927-6-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260331141915.2918927-1-alexander.stein@ew.tq-group.com> References: <20260331141915.2918927-1-alexander.stein@ew.tq-group.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Virus-Scanned: Clear (ClamAV 1.4.3/27957/Tue Mar 31 08:24:30 2026) Content-Type: text/plain; charset="utf-8" From: Nora Schiffer The pcs_mdio* instances are only needed with phy-connection-type =3D "sgmii" and managed =3D "in-band-status". Move setting status =3D "okay" for pcs_mdio17 and pcs_mdio18 to the appropriate overlays, for consistency with the other pcs_mdio* instances. Signed-off-by: Nora Schiffer Signed-off-by: Alexander Stein --- .../dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts | 8 -------- .../fsl-lx2160a-tqmlx2160a-mblx2160a_x_11_x.dtso | 8 ++++++++ .../freescale/fsl-lx2160a-tqmlx2160a-mblx2160a_x_7_x.dtso | 8 ++++++++ 3 files changed, 16 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a= .dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts index 431e4ed2a8b86..46a9fdc92bb56 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts @@ -545,14 +545,6 @@ i2c@3 { }; }; =20 -&pcs_mdio17 { - status =3D "okay"; -}; - -&pcs_mdio18 { - status =3D "okay"; -}; - &uart0 { status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a= _x_11_x.dtso b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx216= 0a_x_11_x.dtso index 0847c786dc1ca..497ea4ddef3e6 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a_x_11_x= .dtso +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a_x_11_x= .dtso @@ -59,3 +59,11 @@ &pcs_mdio14 { &pcs_mdio16 { status =3D "okay"; }; + +&pcs_mdio17 { + status =3D "okay"; +}; + +&pcs_mdio18 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a= _x_7_x.dtso b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160= a_x_7_x.dtso index 7520f105d5d8c..a51edef83317f 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a_x_7_x.= dtso +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a_x_7_x.= dtso @@ -58,6 +58,14 @@ &pcs_mdio16 { status =3D "okay"; }; =20 +&pcs_mdio17 { + status =3D "okay"; +}; + +&pcs_mdio18 { + status =3D "okay"; +}; + &sfp_xfi1 { status =3D "okay"; }; --=20 2.43.0 From nobody Wed Apr 1 09:47:52 2026 Received: from www537.your-server.de (www537.your-server.de [188.40.3.216]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CB41A3DDDC5; Tue, 31 Mar 2026 14:19:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" From: Nora Schiffer Correctly describe the PHY resets. While the TI DP83867 requires only a 1us reset pulse in RGMII mode, 2.5ms are needed for SGMII, where series capacitors would result in incorrect sampling of strap pins if they don't have enough time to discharge. Signed-off-by: Nora Schiffer Signed-off-by: Alexander Stein --- .../fsl-lx2160a-tqmlx2160a-mblx2160a.dts | 35 +++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a= .dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts index 46a9fdc92bb56..687fd0d62235d 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts @@ -106,36 +106,59 @@ &dpmac18 { phy-connection-type =3D "rgmii-id"; }; =20 +/* + * Assert reset for 2.5ms on SGMII PHYs to let capacitors discharge before + * strap pin sampling + */ + &emdio1 { status =3D "okay"; =20 dp83867_1_1: ethernet-phy@1 { reg =3D <1>; + reset-assert-us =3D <2500>; + reset-deassert-us =3D <200>; + reset-gpios =3D <&gpioex1 1 GPIO_ACTIVE_LOW>; ti,clk-output-sel =3D ; }; =20 dp83867_1_2: ethernet-phy@2 { reg =3D <2>; + reset-assert-us =3D <2500>; + reset-deassert-us =3D <200>; + reset-gpios =3D <&gpioex1 2 GPIO_ACTIVE_LOW>; ti,clk-output-sel =3D ; }; =20 dp83867_1_3: ethernet-phy@3 { reg =3D <3>; + reset-assert-us =3D <2500>; + reset-deassert-us =3D <200>; + reset-gpios =3D <&gpioex1 3 GPIO_ACTIVE_LOW>; ti,clk-output-sel =3D ; }; =20 dp83867_1_4: ethernet-phy@4 { reg =3D <4>; + reset-assert-us =3D <2500>; + reset-deassert-us =3D <200>; + reset-gpios =3D <&gpioex1 4 GPIO_ACTIVE_LOW>; ti,clk-output-sel =3D ; }; =20 dp83867_1_5: ethernet-phy@5 { reg =3D <5>; + reset-assert-us =3D <2500>; + reset-deassert-us =3D <200>; + reset-gpios =3D <&gpioex1 5 GPIO_ACTIVE_LOW>; ti,clk-output-sel =3D ; }; =20 dp83867_1_6: ethernet-phy@6 { reg =3D <6>; + reset-assert-us =3D <2500>; + reset-deassert-us =3D <200>; + reset-gpios =3D <&gpioex1 6 GPIO_ACTIVE_LOW>; ti,clk-output-sel =3D ; }; }; @@ -145,16 +168,25 @@ &emdio2 { =20 dp83867_2_1: ethernet-phy@1 { reg =3D <1>; + reset-assert-us =3D <2500>; + reset-deassert-us =3D <200>; + reset-gpios =3D <&gpioex1 7 GPIO_ACTIVE_LOW>; ti,clk-output-sel =3D ; }; =20 dp83867_2_2: ethernet-phy@2 { reg =3D <2>; + reset-assert-us =3D <2500>; + reset-deassert-us =3D <200>; + reset-gpios =3D <&gpioex1 8 GPIO_ACTIVE_LOW>; ti,clk-output-sel =3D ; }; =20 dp83867_2_3: ethernet-phy@3 { reg =3D <3>; + reset-assert-us =3D <1>; + reset-deassert-us =3D <200>; + reset-gpios =3D <&gpioex1 9 GPIO_ACTIVE_LOW>; ti,rx-internal-delay =3D ; ti,tx-internal-delay =3D ; ti,clk-output-sel =3D ; @@ -162,6 +194,9 @@ dp83867_2_3: ethernet-phy@3 { =20 dp83867_2_4: ethernet-phy@4 { reg =3D <4>; + reset-assert-us =3D <1>; + reset-deassert-us =3D <200>; + reset-gpios =3D <&gpioex1 10 GPIO_ACTIVE_LOW>; ti,rx-internal-delay =3D ; ti,tx-internal-delay =3D ; ti,clk-output-sel =3D ; --=20 2.43.0 From nobody Wed Apr 1 09:47:52 2026 Received: from www537.your-server.de (www537.your-server.de [188.40.3.216]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3CFA23EE1E4; Tue, 31 Mar 2026 14:19:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" Setting #size-cells in MTD nodes itself is deprecated by mtd.yaml. Remove the deprecated properties. Fixes the warning: fsl-lx2160a-tqmlx2160a.dtsi:62.18-76.4: Warning (avoid_unnecessary_addr_size): /soc/spi@20c0000/flash@0: unnecessary #address-cells/#size-cells without "ranges", "dma-ranges" or child "reg" or "ranges" property Signed-off-by: Alexander Stein --- arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a.dtsi b/ar= ch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a.dtsi index 5ca950ff908e7..d64879ee5e54a 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a.dtsi @@ -62,8 +62,6 @@ &fspi { flash0: flash@0 { compatible =3D "jedec,spi-nor"; reg =3D <0>; - #address-cells =3D <1>; - #size-cells =3D <1>; spi-max-frequency =3D <10000000>; spi-rx-bus-width =3D <1>; spi-tx-bus-width =3D <1>; --=20 2.43.0