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The commit 46be11b678e0 ("drm/panel: simple: Add Waveshare 13.3" panel support") added definitions for one of those panels, describe the rest of them. Note, since the panels are hidden behind the bridges which are not being programmed by the kernel, I could not confirm the pixel format for the panels. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/panel/panel-simple.c | 381 +++++++++++++++++++++++++++++++= ++++ 1 file changed, 381 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/p= anel-simple.c index 236bd56208cc..b2708a1fe464 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -5061,6 +5061,342 @@ static const struct panel_desc vl050_8048nt_c01 =3D= { .bus_flags =3D DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE, }; =20 +static const struct drm_display_mode waveshare_28_lcd_mode =3D { + .clock =3D 50000, + .hdisplay =3D 480, + .hsync_start =3D 480 + 150, + .hsync_end =3D 480 + 150 + 50, + .htotal =3D 480 + 150 + 50 + 150, + .vdisplay =3D 640, + .vsync_start =3D 640 + 150, + .vsync_end =3D 640 + 150 + 50, + .vtotal =3D 640 + 150 + 50 + 150, + .flags =3D DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PHSYNC, +}; + +static const struct panel_desc waveshare_28_lcd_panel =3D { + .modes =3D &waveshare_28_lcd_mode, + .num_modes =3D 1, + .bpc =3D 8, + .size =3D { + .width =3D 44, + .height =3D 58, + }, + .bus_format =3D MEDIA_BUS_FMT_RGB888_1X24, + .connector_type =3D DRM_MODE_CONNECTOR_DPI, + .bus_flags =3D DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE | + DRM_BUS_FLAG_SYNC_SAMPLE_POSEDGE, +}; + +static const struct drm_display_mode waveshare_34_lcd_c_mode =3D { + .clock =3D 50000, + .hdisplay =3D 800, + .hsync_start =3D 800 + 32, + .hsync_end =3D 800 + 32 + 6, + .htotal =3D 800 + 32 + 6 + 120, + .vdisplay =3D 800, + .vsync_start =3D 800 + 8, + .vsync_end =3D 800 + 8 + 4, + .vtotal =3D 800 + 8 + 4 + 16, +}; + +static const struct panel_desc waveshare_34_lcd_c_panel =3D { + .modes =3D &waveshare_34_lcd_c_mode, + .num_modes =3D 1, + .bpc =3D 8, + .size =3D { + .width =3D 88, + .height =3D 88, + }, + .bus_format =3D MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, + .connector_type =3D DRM_MODE_CONNECTOR_LVDS, +}; + +static const struct drm_display_mode waveshare_40_lcd_mode =3D { + .clock =3D 50000, + .hdisplay =3D 480, + .hsync_start =3D 480 + 150, + .hsync_end =3D 480 + 150 + 100, + .htotal =3D 480 + 150 + 100 + 150, + .vdisplay =3D 800, + .vsync_start =3D 800 + 20, + .vsync_end =3D 800 + 20 + 100, + .vtotal =3D 800 + 20 + 100 + 20, + .flags =3D DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PHSYNC, +}; + +static const struct panel_desc waveshare_40_lcd_panel =3D { + .modes =3D &waveshare_40_lcd_mode, + .num_modes =3D 1, + .bpc =3D 8, + .size =3D { + .width =3D 52, + .height =3D 87, + }, + .bus_format =3D MEDIA_BUS_FMT_RGB888_1X24, + .connector_type =3D DRM_MODE_CONNECTOR_DPI, + .bus_flags =3D DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE | + DRM_BUS_FLAG_SYNC_SAMPLE_POSEDGE, +}; + +static const struct drm_display_mode waveshare_40_lcd_c_mode =3D { + .clock =3D 50000, + .hdisplay =3D 720, + .hsync_start =3D 720 + 32, + .hsync_end =3D 720 + 32 + 200, + .htotal =3D 720 + 32 + 200 + 120, + .vdisplay =3D 720, + .vsync_start =3D 720 + 8, + .vsync_end =3D 720 + 8 + 4, + .vtotal =3D 720 + 8 + 4 + 16, +}; + +static const struct panel_desc waveshare_40_lcd_c_panel =3D { + .modes =3D &waveshare_40_lcd_c_mode, + .num_modes =3D 1, + .bpc =3D 8, + .size =3D { + .width =3D 102, + .height =3D 102, + }, + .bus_format =3D MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, + .connector_type =3D DRM_MODE_CONNECTOR_LVDS, +}; + +static const struct drm_display_mode waveshare_50_lcd_c_mode =3D { + .clock =3D 50000, + .hdisplay =3D 1024, + .hsync_start =3D 1024 + 100, + .hsync_end =3D 1024 + 100 + 100, + .htotal =3D 1024 + 100 + 100 + 100, + .vdisplay =3D 600, + .vsync_start =3D 600 + 10, + .vsync_end =3D 600 + 10 + 10, + .vtotal =3D 600 + 10 + 10 + 10, + .flags =3D DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PHSYNC, +}; + +static const struct panel_desc waveshare_50_lcd_c_panel =3D { + .modes =3D &waveshare_50_lcd_c_mode, + .num_modes =3D 1, + .bpc =3D 8, + .size =3D { + .width =3D 109, + .height =3D 66, + }, + .bus_format =3D MEDIA_BUS_FMT_RGB888_1X24, + .connector_type =3D DRM_MODE_CONNECTOR_DPI, + .bus_flags =3D DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE | + DRM_BUS_FLAG_SYNC_SAMPLE_POSEDGE, +}; + +static const struct drm_display_mode waveshare_50_lcd_d_mode =3D { + .clock =3D 83333, + .hdisplay =3D 720, + .hsync_start =3D 720 + 100, + .hsync_end =3D 720 + 100 + 80, + .htotal =3D 720 + 100 + 80 + 100, + .vdisplay =3D 1280, + .vsync_start =3D 1280 + 20, + .vsync_end =3D 1280 + 20 + 20, + .vtotal =3D 1280 + 20 + 20 + 20, +}; + +static const struct panel_desc waveshare_50_lcd_d_panel =3D { + .modes =3D &waveshare_50_lcd_d_mode, + .num_modes =3D 1, + .bpc =3D 8, + .size =3D { + .width =3D 62, + .height =3D 110, + }, + .bus_format =3D MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, + .connector_type =3D DRM_MODE_CONNECTOR_LVDS, +}; + +static const struct drm_display_mode waveshare_625_lcd_mode =3D { + .clock =3D 83333, + .hdisplay =3D 720, + .hsync_start =3D 720 + 50, + .hsync_end =3D 720 + 50 + 50, + .htotal =3D 720 + 50 + 50 + 50, + .vdisplay =3D 1560, + .vsync_start =3D 1560 + 20, + .vsync_end =3D 1560 + 20 + 20, + .vtotal =3D 1560 + 20 + 20 + 20, +}; + +static const struct panel_desc waveshare_625_lcd_panel =3D { + .modes =3D &waveshare_625_lcd_mode, + .num_modes =3D 1, + .bpc =3D 8, + .size =3D { + .width =3D 66, + .height =3D 144, + }, + .bus_format =3D MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, + .connector_type =3D DRM_MODE_CONNECTOR_LVDS, +}; + +static const struct panel_desc waveshare_70_lcd_c_panel =3D { + .modes =3D &waveshare_50_lcd_c_mode, + .num_modes =3D 1, + .bpc =3D 8, + .size =3D { + .width =3D 155, + .height =3D 87, + }, + .bus_format =3D MEDIA_BUS_FMT_RGB888_1X24, + .connector_type =3D DRM_MODE_CONNECTOR_DPI, + .bus_flags =3D DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE | + DRM_BUS_FLAG_SYNC_SAMPLE_POSEDGE, +}; + +static const struct drm_display_mode waveshare_80_lcd_c_mode; +static const struct panel_desc waveshare_70_lcd_e_panel =3D { + .modes =3D &waveshare_80_lcd_c_mode, + .num_modes =3D 1, + .bpc =3D 8, + .size =3D { + .width =3D 152, + .height =3D 95, + }, + .bus_format =3D MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, + .connector_type =3D DRM_MODE_CONNECTOR_LVDS, +}; + +static const struct drm_display_mode waveshare_70_lcd_h_mode =3D { + .clock =3D 83333, + .hdisplay =3D 1280, + .hsync_start =3D 1280 + 64, + .hsync_end =3D 1280 + 64 + 64, + .htotal =3D 1280 + 64 + 64 + 64, + .vdisplay =3D 720, + .vsync_start =3D 720 + 64, + .vsync_end =3D 720 + 64 + 64, + .vtotal =3D 720 + 64 + 64 + 64, +}; + +static const struct panel_desc waveshare_70_lcd_h_panel =3D { + .modes =3D &waveshare_70_lcd_h_mode, + .num_modes =3D 1, + .bpc =3D 8, + .size =3D { + .width =3D 155, + .height =3D 88, + }, + .bus_format =3D MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, + .connector_type =3D DRM_MODE_CONNECTOR_LVDS, +}; + +static const struct drm_display_mode waveshare_79_lcd_mode =3D { + .clock =3D 50000, + .hdisplay =3D 400, + .hsync_start =3D 400 + 40, + .hsync_end =3D 400 + 40 + 30, + .htotal =3D 400 + 40 + 30 + 40, + .vdisplay =3D 1280, + .vsync_start =3D 1280 + 20, + .vsync_end =3D 1280 + 20 + 10, + .vtotal =3D 1280 + 20 + 10 + 20, +}; + +static const struct panel_desc waveshare_79_lcd_panel =3D { + .modes =3D &waveshare_79_lcd_mode, + .num_modes =3D 1, + .bpc =3D 8, + .size =3D { + .width =3D 60, + .height =3D 191, + }, + .bus_format =3D MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, + .connector_type =3D DRM_MODE_CONNECTOR_LVDS, +}; + +static const struct drm_display_mode waveshare_80_lcd_c_mode =3D { + .clock =3D 83333, + .hdisplay =3D 1280, + .hsync_start =3D 1280 + 156, + .hsync_end =3D 1280 + 156 + 20, + .htotal =3D 1280 + 156 + 20 + 40, + .vdisplay =3D 800, + .vsync_start =3D 800 + 40, + .vsync_end =3D 800 + 40 + 48, + .vtotal =3D 800 + 40 + 48 + 40, +}; + +static const struct panel_desc waveshare_80_lcd_c_panel =3D { + .modes =3D &waveshare_80_lcd_c_mode, + .num_modes =3D 1, + .bpc =3D 8, + .size =3D { + .width =3D 173, + .height =3D 108, + }, + .bus_format =3D MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, + .connector_type =3D DRM_MODE_CONNECTOR_LVDS, +}; + +static const struct drm_display_mode waveshare_88_lcd_mode =3D { + .clock =3D 83333, + .hdisplay =3D 480, + .hsync_start =3D 480 + 50, + .hsync_end =3D 480 + 50 + 50, + .htotal =3D 480 + 50 + 50 + 50, + .vdisplay =3D 1920, + .vsync_start =3D 1920 + 20, + .vsync_end =3D 1920 + 20 + 20, + .vtotal =3D 1920 + 20 + 20 + 20, +}; + +static const struct panel_desc waveshare_88_lcd_panel =3D { + .modes =3D &waveshare_88_lcd_mode, + .num_modes =3D 1, + .bpc =3D 8, + .size =3D { + .width =3D 56, + .height =3D 220, + }, + .bus_format =3D MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, + .connector_type =3D DRM_MODE_CONNECTOR_LVDS, +}; + +static const struct panel_desc waveshare_101_lcd_c_panel =3D { + .modes =3D &waveshare_80_lcd_c_mode, + .num_modes =3D 1, + .bpc =3D 8, + .size =3D { + .width =3D 217, + .height =3D 136, + }, + .bus_format =3D MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, + .connector_type =3D DRM_MODE_CONNECTOR_LVDS, +}; + +static const struct drm_display_mode waveshare_119_lcd_mode =3D { + .clock =3D 50000, + .hdisplay =3D 320, + .hsync_start =3D 320 + 60, + .hsync_end =3D 320 + 60 + 60, + .htotal =3D 320 + 60 + 60 + 60, + .vdisplay =3D 1480, + .vsync_start =3D 1480 + 60, + .vsync_end =3D 1480 + 60 + 60, + .vtotal =3D 1480 + 60 + 60 + 60, +}; + +static const struct panel_desc waveshare_119_lcd_panel =3D { + .modes =3D &waveshare_119_lcd_mode, + .num_modes =3D 1, + .bpc =3D 8, + .size =3D { + .width =3D 58, + .height =3D 268, + }, + .bus_format =3D MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, + .connector_type =3D DRM_MODE_CONNECTOR_LVDS, +}; + static const struct drm_display_mode waveshare_133inch_mode =3D { .clock =3D 148500, .hdisplay =3D 1920, @@ -5697,6 +6033,51 @@ static const struct of_device_id platform_of_match[]= =3D { }, { .compatible =3D "vxt,vl050-8048nt-c01", .data =3D &vl050_8048nt_c01, + }, { + .compatible =3D "waveshare,2.8inch-panel", + .data =3D &waveshare_28_lcd_panel + }, { + .compatible =3D "waveshare,3.4inch-c-panel", + .data =3D &waveshare_34_lcd_c_panel + }, { + .compatible =3D "waveshare,4.0inch-panel", + .data =3D &waveshare_40_lcd_panel + }, { + .compatible =3D "waveshare,4.0inch-c-panel", + .data =3D &waveshare_40_lcd_c_panel + }, { + .compatible =3D "waveshare,5.0inch-c-panel", + .data =3D &waveshare_50_lcd_c_panel + }, { + .compatible =3D "waveshare,5.0inch-d-panel", + .data =3D &waveshare_50_lcd_d_panel + }, { + .compatible =3D "waveshare,6.25inch-panel", + .data =3D &waveshare_625_lcd_panel + }, { + .compatible =3D "waveshare,7.0inch-c-panel", + .data =3D &waveshare_70_lcd_c_panel + }, { + .compatible =3D "waveshare,7.0inch-e-panel", + .data =3D &waveshare_70_lcd_e_panel + }, { + .compatible =3D "waveshare,7.0inch-h-panel", + .data =3D &waveshare_70_lcd_h_panel + }, { + .compatible =3D "waveshare,7.9inch-panel", + .data =3D &waveshare_79_lcd_panel + }, { + .compatible =3D "waveshare,8.0inch-c-panel", + .data =3D &waveshare_80_lcd_c_panel + }, { + .compatible =3D "waveshare,8.8inch-panel", + .data =3D &waveshare_88_lcd_panel + }, { + .compatible =3D "waveshare,10.1inch-c-panel", + .data =3D &waveshare_101_lcd_c_panel + }, { + .compatible =3D "waveshare,11.9inch-panel", + .data =3D &waveshare_119_lcd_panel }, { .compatible =3D "waveshare,13.3inch-panel", .data =3D &waveshare_133inch, --=20 2.47.3