From nobody Wed Apr 1 13:44:48 2026 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 55BD33C2773; Tue, 31 Mar 2026 07:31:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774942319; cv=none; b=CGvM+xBZ8mz1+m6gBafAOgzYYGrUFVdhM2gBCWe7R4hX3Bzc/eCEuNXUkwqJJx0/NOPVU2trryVQmA0WCYJojataKmmhUTf3ncBp18UBC7kINtR09X+iMUS4THVXX9xqH0rZVBxVxa+KRR1m3VFzd3X4in+0Jp+oTZKHDz7EThM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774942319; c=relaxed/simple; bh=bWZGEQzcis93YyG/nQE6y8IHuUh8wkmOSEqhb3z4vfk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=gqxidq5qBbCXeyhDbCcyx6WExGrnHUWvH9A9d9FV/yQjbWt4aMIRFBQ0iwrDc6HuugWOCinxkzpXzWpxT+dn0wnsnE7us+AFDWzi6Q9/QLAvUQSnEWAQ2lPk0rkatbIKOy6yOf+9L5dGKxsL07pB3ZA8s56THWe2bR3PKmtO7Ww= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Tue, 31 Mar 2026 15:31:46 +0800 Received: from [127.0.1.1] (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Tue, 31 Mar 2026 15:31:46 +0800 From: Billy Tsai Date: Tue, 31 Mar 2026 15:31:16 +0800 Subject: [PATCH v5 1/3] dt-bindings: pinctrl: Add aspeed,ast2700-soc0-pinctrl Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260331-upstream_pinctrl-v5-1-8994f59ff367@aspeedtech.com> References: <20260331-upstream_pinctrl-v5-0-8994f59ff367@aspeedtech.com> In-Reply-To: <20260331-upstream_pinctrl-v5-0-8994f59ff367@aspeedtech.com> To: Lee Jones , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , "Joel Stanley" , Andrew Jeffery , "Linus Walleij" , Billy Tsai , "Bartosz Golaszewski" , Ryan Chen CC: Andrew Jeffery , , , , , , , X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1774942306; l=4551; i=billy_tsai@aspeedtech.com; s=20251118; h=from:subject:message-id; bh=bWZGEQzcis93YyG/nQE6y8IHuUh8wkmOSEqhb3z4vfk=; b=EQ6XwXrEWYIZRVjFhEGY/pl4CxXxlSAhJ+JUgdapBUUC24eLxq4zkN+j404Nyya/EC4CI70C7 UyYXjt3SoajDGQTFI/s4J2IWc/FgxNGq1rvmPGWRHFZxmRoJMIMyuQT X-Developer-Key: i=billy_tsai@aspeedtech.com; a=ed25519; pk=/A8qvgZ6CPfnwKgT6/+k+nvXOkN477MshEGJvVdzeeQ= Add a device tree binding for the pin controller found in the ASPEED AST2700 SoC0. The controller manages various peripheral functions such as eMMC, USB, VGA DDC, JTAG, and PCIe root complex signals. Describe the AST2700 SoC0 pin controller using standard pin multiplexing and configuration properties. Signed-off-by: Billy Tsai --- .../pinctrl/aspeed,ast2700-soc0-pinctrl.yaml | 161 +++++++++++++++++= ++++ 1 file changed, 161 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc0-= pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc= 0-pinctrl.yaml new file mode 100644 index 000000000000..e43a658fe02b --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc0-pinctrl= .yaml @@ -0,0 +1,161 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2700-soc0-pinctrl.yam= l# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ASPEED AST2700 SoC0 Pin Controller + +maintainers: + - Billy Tsai + +description: + The AST2700 features a dual-SoC architecture with two interconnected SoC= s, + each having its own System Control Unit (SCU) for independent pin contro= l. + This pin controller manages the pin multiplexing for SoC0. + + The SoC0 pin controller manages pin functions including eMMC, VGA DDC, + dual USB3/USB2 ports (A and B), JTAG, and PCIe root complex interfaces. + +properties: + compatible: + const: aspeed,ast2700-soc0-pinctrl + reg: + maxItems: 1 + +patternProperties: + '-state$': + type: object + allOf: + - $ref: pinmux-node.yaml# + - $ref: pincfg-node.yaml# + additionalProperties: false + + properties: + function: + enum: + - EMMC + - JTAGDDR + - JTAGM0 + - JTAGPCIEA + - JTAGPCIEB + - JTAGPSP + - JTAGSSP + - JTAGTSP + - JTAGUSB3A + - JTAGUSB3B + - PCIERC0PERST + - PCIERC1PERST + - TSPRSTN + - UFSCLKI + - USB2AD0 + - USB2AD1 + - USB2AH + - USB2AHP + - USB2AHPD0 + - USB2AXH + - USB2AXH2B + - USB2AXHD1 + - USB2AXHP + - USB2AXHP2B + - USB2AXHPD1 + - USB2BD0 + - USB2BD1 + - USB2BH + - USB2BHP + - USB2BHPD0 + - USB2BXH + - USB2BXH2A + - USB2BXHD1 + - USB2BXHP + - USB2BXHP2A + - USB2BXHPD1 + - USB3AXH + - USB3AXH2B + - USB3AXHD + - USB3AXHP + - USB3AXHP2B + - USB3AXHPD + - USB3BXH + - USB3BXH2A + - USB3BXHD + - USB3BXHP + - USB3BXHP2A + - USB3BXHPD + - VB + - VGADDC + + groups: + enum: + - EMMCCDN + - EMMCG1 + - EMMCG4 + - EMMCG8 + - EMMCWPN + - JTAG0 + - PCIERC0PERST + - PCIERC1PERST + - TSPRSTN + - UFSCLKI + - USB2A + - USB2AAP + - USB2ABP + - USB2ADAP + - USB2AH + - USB2AHAP + - USB2B + - USB2BAP + - USB2BBP + - USB2BDBP + - USB2BH + - USB2BHBP + - USB3A + - USB3AAP + - USB3ABP + - USB3B + - USB3BAP + - USB3BBP + - VB0 + - VB1 + - VGADDC + pins: + enum: + - AB13 + - AB14 + - AC13 + - AC14 + - AD13 + - AD14 + - AE13 + - AE14 + - AE15 + - AF13 + - AF14 + - AF15 + + drive-strength: + enum: [3, 6, 8, 11, 16, 18, 20, 23, 30, 32, 33, 35, 37, 38, 39, 41] + + bias-disable: true + bias-pull-up: true + bias-pull-down: true + +required: + - compatible + - reg + +allOf: + - $ref: pinctrl.yaml# + +additionalProperties: false + +examples: + - | + pinctrl@400 { + compatible =3D "aspeed,ast2700-soc0-pinctrl"; + reg =3D <0x400 0x318>; + emmc-state { + function =3D "EMMC"; + groups =3D "EMMCG1"; + }; + }; --=20 2.34.1