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Tue, 31 Mar 2026 16:27:20 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 884057616769070951 EX-QQ-RecipientCnt: 20 From: Troy Mitchell Date: Tue, 31 Mar 2026 16:27:05 +0800 Subject: [PATCH v3 2/5] dmaengine: mmp_pdma: support variable extended DRCMR base Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260331-k3-pdma-v3-2-a4e60dd8b4b3@linux.spacemit.com> References: <20260331-k3-pdma-v3-0-a4e60dd8b4b3@linux.spacemit.com> In-Reply-To: <20260331-k3-pdma-v3-0-a4e60dd8b4b3@linux.spacemit.com> To: Vinod Koul , Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yixun Lan , Guodong Xu , Michael Turquette , Stephen Boyd , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Troy Mitchell X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; 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One such different PDMA implementation is found in SpacemiT's K3. In this patch is for preparation the adding of K3 PDMA support. Signed-off-by: Guodong Xu Signed-off-by: Troy Mitchell --- drivers/dma/mmp_pdma.c | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/drivers/dma/mmp_pdma.c b/drivers/dma/mmp_pdma.c index d12e729ee12c..6112369006ee 100644 --- a/drivers/dma/mmp_pdma.c +++ b/drivers/dma/mmp_pdma.c @@ -51,7 +51,9 @@ #define DCSR_CMPST BIT(10) /* The Descriptor Compare Status */ #define DCSR_EORINTR BIT(9) /* The end of Receive */ =20 -#define DRCMR(n) ((((n) < 64) ? 0x0100 : 0x1100) + (((n) & 0x3f) << 2)) +#define DRCMR_BASE 0x0100 +#define DRCMR_EXT_BASE_DEFAULT 0x1100 +#define DRCMR_REQ_LIMIT 64 #define DRCMR_MAPVLD BIT(7) /* Map Valid (read / write) */ #define DRCMR_CHLNUM 0x1f /* mask for Channel Number (read / write) */ =20 @@ -154,6 +156,7 @@ struct mmp_pdma_phy { * @run_bits: Control bits in DCSR register for channel start/stop * @dma_width: DMA addressing width in bits (32 or 64). Determines the * DMA mask capability of the controller hardware. + * @drcmr_ext_base: Base DRCMR address for extended requests */ struct mmp_pdma_ops { /* Hardware Register Operations */ @@ -174,6 +177,7 @@ struct mmp_pdma_ops { /* Controller Configuration */ u32 run_bits; u32 dma_width; + u32 drcmr_ext_base; }; =20 struct mmp_pdma_device { @@ -195,6 +199,13 @@ struct mmp_pdma_device { #define to_mmp_pdma_dev(dmadev) \ container_of(dmadev, struct mmp_pdma_device, device) =20 +static u32 mmp_pdma_get_drcmr(struct mmp_pdma_device *pdev, u32 drcmr) +{ + if (drcmr < DRCMR_REQ_LIMIT) + return DRCMR_BASE + (drcmr << 2); + return pdev->ops->drcmr_ext_base + ((drcmr - DRCMR_REQ_LIMIT) << 2); +} + /* For 32-bit PDMA */ static void write_next_addr_32(struct mmp_pdma_phy *phy, dma_addr_t addr) { @@ -301,7 +312,7 @@ static void enable_chan(struct mmp_pdma_phy *phy) =20 pdev =3D to_mmp_pdma_dev(phy->vchan->chan.device); =20 - reg =3D DRCMR(phy->vchan->drcmr); + reg =3D mmp_pdma_get_drcmr(pdev, phy->vchan->drcmr); writel(DRCMR_MAPVLD | phy->idx, phy->base + reg); =20 dalgn =3D readl(phy->base + DALGN); @@ -437,7 +448,7 @@ static void mmp_pdma_free_phy(struct mmp_pdma_chan *pch= an) return; =20 /* clear the channel mapping in DRCMR */ - reg =3D DRCMR(pchan->drcmr); + reg =3D mmp_pdma_get_drcmr(pdev, pchan->drcmr); writel(0, pchan->phy->base + reg); =20 spin_lock_irqsave(&pdev->phy_lock, flags); @@ -1179,6 +1190,7 @@ static const struct mmp_pdma_ops marvell_pdma_v1_ops = =3D { .get_desc_dst_addr =3D get_desc_dst_addr_32, .run_bits =3D (DCSR_RUN), .dma_width =3D 32, + .drcmr_ext_base =3D DRCMR_EXT_BASE_DEFAULT, }; =20 static const struct mmp_pdma_ops spacemit_k1_pdma_ops =3D { @@ -1192,6 +1204,7 @@ static const struct mmp_pdma_ops spacemit_k1_pdma_ops= =3D { .get_desc_dst_addr =3D get_desc_dst_addr_64, .run_bits =3D (DCSR_RUN | DCSR_LPAEEN), .dma_width =3D 64, + .drcmr_ext_base =3D DRCMR_EXT_BASE_DEFAULT, }; =20 static const struct of_device_id mmp_pdma_dt_ids[] =3D { --=20 2.53.0