From nobody Wed Apr 1 09:45:03 2026 Received: from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CD0802F0C45 for ; Mon, 30 Mar 2026 22:48:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.233.101.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774910899; cv=none; b=uuqMP148b9cGVy6fSEMUMkFZw7b2cBBlu17BBJz9E6rWXe1ff/jAiQJ58oDX31az6vzPgN/Os5dWnW60rF/YvecOlHcuLdiExjRVhj+0WfZvhO8+qNkRhi+RqAZG9lE+nZUSWPKAYR034JNBnU4WOG7PzRhMwFhPQgp7SIFC6Js= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774910899; c=relaxed/simple; bh=hz0htauuD8FNqdD/H+U8M595BtTnNOmnL+xsAPVuvlw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RFMnuW2nLUr3bmIZ7QP6bHAYUdKB/+UehYcbDNQUqZAGFLk+nwYNZex3msqtlMmOI1L8ZCEgdRNmOk79QpZ0D1GHVum/srFYJzf4hiQsu0p8I8UnPJw3nW0KRftl8x9ufF2nE0eWIxTyf0NBA9hiQtieB/8cKBxUaI99PtDZ0ns= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io; spf=pass smtp.mailfrom=sys-base.io; arc=none smtp.client-ip=185.233.101.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id CD9E01F80041 for ; Mon, 30 Mar 2026 22:48:14 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id 50C7EB2EBCB; Mon, 30 Mar 2026 22:48:14 +0000 (UTC) X-Spam-Level: * Received: from shepard (unknown [192.168.1.65]) by laika.paulk.fr (Postfix) with ESMTP id 81F1CB2EBC3; Mon, 30 Mar 2026 22:46:31 +0000 (UTC) From: Paul Kocialkowski To: dri-devel@lists.freedesktop.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Marek Vasut , Stefan Agner , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Lucas Stach , =?UTF-8?q?Krzysztof=20Ha=C5=82asa?= , Marco Felsch , Liu Ying , Paul Kocialkowski Subject: [PATCH 1/3] drm: lcdif: Set undocumented bit to clear FIFO at vsync Date: Tue, 31 Mar 2026 00:46:17 +0200 Message-ID: <20260330224619.2620782-2-paulk@sys-base.io> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260330224619.2620782-1-paulk@sys-base.io> References: <20260330224619.2620782-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" There is an undocumented bit used in the NXP BSP to clear the FIFO systematically at vsync. In normal operation, the FIFO should already be empty but it doesn't hurt to add it as an extra safety measure. Signed-off-by: Paul Kocialkowski Reviewed-by: Lucas Stach --- drivers/gpu/drm/mxsfb/lcdif_kms.c | 3 ++- drivers/gpu/drm/mxsfb/lcdif_regs.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mxsfb/lcdif_kms.c b/drivers/gpu/drm/mxsfb/lcdi= f_kms.c index ef3250a5c54f..a00c4f6d63f4 100644 --- a/drivers/gpu/drm/mxsfb/lcdif_kms.c +++ b/drivers/gpu/drm/mxsfb/lcdif_kms.c @@ -338,7 +338,8 @@ static void lcdif_set_mode(struct lcdif_drm_private *lc= dif, u32 bus_flags) * Downstream set it to 256B burst size to improve the memory * efficiency so set it here too. */ - ctrl =3D CTRLDESCL0_3_P_SIZE(2) | CTRLDESCL0_3_T_SIZE(2) | + ctrl =3D CTRLDESCL0_3_STATE_CLEAR_VSYNC | + CTRLDESCL0_3_P_SIZE(2) | CTRLDESCL0_3_T_SIZE(2) | CTRLDESCL0_3_PITCH(lcdif->crtc.primary->state->fb->pitches[0]); writel(ctrl, lcdif->base + LCDC_V8_CTRLDESCL0_3); } diff --git a/drivers/gpu/drm/mxsfb/lcdif_regs.h b/drivers/gpu/drm/mxsfb/lcd= if_regs.h index c55dfb236c1d..17882c593d27 100644 --- a/drivers/gpu/drm/mxsfb/lcdif_regs.h +++ b/drivers/gpu/drm/mxsfb/lcdif_regs.h @@ -190,6 +190,7 @@ #define CTRLDESCL0_1_WIDTH(n) ((n) & 0xffff) #define CTRLDESCL0_1_WIDTH_MASK GENMASK(15, 0) =20 +#define CTRLDESCL0_3_STATE_CLEAR_VSYNC BIT(23) #define CTRLDESCL0_3_P_SIZE(n) (((n) << 20) & CTRLDESCL0_3_P_SIZE_MASK) #define CTRLDESCL0_3_P_SIZE_MASK GENMASK(22, 20) #define CTRLDESCL0_3_T_SIZE(n) (((n) << 16) & CTRLDESCL0_3_T_SIZE_MASK) --=20 2.53.0 From nobody Wed Apr 1 09:45:03 2026 Received: from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DB0793A7F6F for ; Mon, 30 Mar 2026 22:49:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.233.101.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774910954; cv=none; b=pTRmaBfCKBOyxtkYi0IxhFf0okaI0ybEeSxIQSD/twxIBh0UdwWNv/+sDlXB3EVbz0NY//AdAyEUVy/BsoWyt44IbziHtQGHZO108sY679nCgWSlGIvRw4ZvwdkkuNLB4XNLNc1Q4rmDCHqDCnzmXKVxiyr09mnCGftAmujnqBA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774910954; c=relaxed/simple; bh=BDu8zVLRrmrMyI13kZXCcPD25JNJC+k3QXgHpDLucIQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=eBeWbkuz02veOKl9XKqDcaEFHaZOhwIB0Ig7h95POcWBmkH8symr8zWqnHKzgoBzqHCIPtcfj2AWzXJRjqXT0iE5Sv47RvtYinH8uvgG+YMEvFBpBHMUz4NwSKJmElm5Ecbg0RGyzob/2EIbcgy4FSj6jsCtgWTrkPca+6kNlcg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io; spf=pass smtp.mailfrom=sys-base.io; arc=none smtp.client-ip=185.233.101.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id C65BC1F80041 for ; Mon, 30 Mar 2026 22:49:09 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id 31C1CB2EBD2; Mon, 30 Mar 2026 22:49:05 +0000 (UTC) X-Spam-Level: * Received: from shepard (unknown [192.168.1.65]) by laika.paulk.fr (Postfix) with ESMTP id E60CAB2EBC4; Mon, 30 Mar 2026 22:46:31 +0000 (UTC) From: Paul Kocialkowski To: dri-devel@lists.freedesktop.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Marek Vasut , Stefan Agner , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Lucas Stach , =?UTF-8?q?Krzysztof=20Ha=C5=82asa?= , Marco Felsch , Liu Ying , Paul Kocialkowski Subject: [PATCH 2/3] drm: lcdif: Use dedicated set/clr registers for polarity/edge Date: Tue, 31 Mar 2026 00:46:18 +0200 Message-ID: <20260330224619.2620782-3-paulk@sys-base.io> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260330224619.2620782-1-paulk@sys-base.io> References: <20260330224619.2620782-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The lcdif v3 hardware comes with dedicated registers to set and clear polarity bits in the CTRL register. It is unclear if there is a difference with writing to the CTRL register directly. Follow the NXP BSP reference by using these registers, in case there is a subtle difference caused by using them. Signed-off-by: Paul Kocialkowski --- drivers/gpu/drm/mxsfb/lcdif_kms.c | 23 ++++++++++++++++------- 1 file changed, 16 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/mxsfb/lcdif_kms.c b/drivers/gpu/drm/mxsfb/lcdi= f_kms.c index a00c4f6d63f4..1aac354041c7 100644 --- a/drivers/gpu/drm/mxsfb/lcdif_kms.c +++ b/drivers/gpu/drm/mxsfb/lcdif_kms.c @@ -296,18 +296,27 @@ static void lcdif_set_formats(struct lcdif_drm_privat= e *lcdif, static void lcdif_set_mode(struct lcdif_drm_private *lcdif, u32 bus_flags) { struct drm_display_mode *m =3D &lcdif->crtc.state->adjusted_mode; - u32 ctrl =3D 0; + u32 ctrl; =20 if (m->flags & DRM_MODE_FLAG_NHSYNC) - ctrl |=3D CTRL_INV_HS; + writel(CTRL_INV_HS, lcdif->base + LCDC_V8_CTRL + REG_SET); + else + writel(CTRL_INV_HS, lcdif->base + LCDC_V8_CTRL + REG_CLR); + if (m->flags & DRM_MODE_FLAG_NVSYNC) - ctrl |=3D CTRL_INV_VS; + writel(CTRL_INV_VS, lcdif->base + LCDC_V8_CTRL + REG_SET); + else + writel(CTRL_INV_VS, lcdif->base + LCDC_V8_CTRL + REG_CLR); + if (bus_flags & DRM_BUS_FLAG_DE_LOW) - ctrl |=3D CTRL_INV_DE; - if (bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) - ctrl |=3D CTRL_INV_PXCK; + writel(CTRL_INV_DE, lcdif->base + LCDC_V8_CTRL + REG_SET); + else + writel(CTRL_INV_DE, lcdif->base + LCDC_V8_CTRL + REG_CLR); =20 - writel(ctrl, lcdif->base + LCDC_V8_CTRL); + if (bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) + writel(CTRL_INV_PXCK, lcdif->base + LCDC_V8_CTRL + REG_SET); + else + writel(CTRL_INV_PXCK, lcdif->base + LCDC_V8_CTRL + REG_CLR); =20 writel(DISP_SIZE_DELTA_Y(m->vdisplay) | DISP_SIZE_DELTA_X(m->hdisplay), --=20 2.53.0 From nobody Wed Apr 1 09:45:03 2026 Received: from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB3253EAC75 for ; Mon, 30 Mar 2026 22:49:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.233.101.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774911002; cv=none; b=Vbb98S+4GZRqSxD9EqXxOXGtv7diSZM2skhKnHLE2hl05RqwhUIQEC2O90+LDPd9YdsRMdOv7CP7IwP12JoaIxkabkmZEH3XGSyAjvhWnkxQdAvcWSygHTjJtUAwVIu73y8wJwWf0xE5Sm+gzvnT0fqEyS2OMg1hQqgfyYamvz8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774911002; c=relaxed/simple; bh=FxkX383IjFOFCfwB8qdVbxcnu/ydRLPuMlqZnnVp5kM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UvnTNC8ERXLwPWiumFPAmb3dlt2O3JDgqGkPhT/I61z1rkxvT+Shq2VpUvpRCHN6qndxac+i5fMgdTXYI5/FarocQRlriaWPC1CoWruXfezqI5I8xVsfOH+dmSjPco+N752Ce+52bqWVar3gYO/YvlaN9EphHUePLiE3UCKA3Ek= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io; spf=pass smtp.mailfrom=sys-base.io; arc=none smtp.client-ip=185.233.101.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id AB3111F80041 for ; Mon, 30 Mar 2026 22:49:56 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id 2A605B2EBD0; Mon, 30 Mar 2026 22:49:56 +0000 (UTC) X-Spam-Level: * Received: from shepard (unknown [192.168.1.65]) by laika.paulk.fr (Postfix) with ESMTP id 71E4FB2EBC5; Mon, 30 Mar 2026 22:46:32 +0000 (UTC) From: Paul Kocialkowski To: dri-devel@lists.freedesktop.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Marek Vasut , Stefan Agner , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Lucas Stach , =?UTF-8?q?Krzysztof=20Ha=C5=82asa?= , Marco Felsch , Liu Ying , Paul Kocialkowski Subject: [PATCH 3/3] drm: lcdif: Wait for vblank before disabling DMA Date: Tue, 31 Mar 2026 00:46:19 +0200 Message-ID: <20260330224619.2620782-4-paulk@sys-base.io> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260330224619.2620782-1-paulk@sys-base.io> References: <20260330224619.2620782-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" It is necessary to wait for the full frame to finish streaming through the DMA engine before we can safely disable it by removing the DISP_PARA_DISP_ON bit. Disabling it in-flight can leave the hardware confused and unable to resume streaming for the next frame. This causes the FIFO underrun and empty status bits to be set and a single solid color to be shown on the display, coming from one of the pixels of the previous frame. The issue occurs sporadically when a new mode is set, which triggers the crtc disable and enable paths. Setting the shadow load bit and waiting for it to be cleared by the DMA engine allows waiting for completion. The NXP BSP driver addresses this issue with a hardcoded 25 ms sleep. Fixes: 9db35bb349a0 ("drm: lcdif: Add support for i.MX8MP LCDIF variant") Signed-off-by: Paul Kocialkowski Co-developed-by: Lucas Stach --- drivers/gpu/drm/mxsfb/lcdif_kms.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/mxsfb/lcdif_kms.c b/drivers/gpu/drm/mxsfb/lcdi= f_kms.c index 1aac354041c7..7dce7f48d938 100644 --- a/drivers/gpu/drm/mxsfb/lcdif_kms.c +++ b/drivers/gpu/drm/mxsfb/lcdif_kms.c @@ -393,6 +393,22 @@ static void lcdif_disable_controller(struct lcdif_drm_= private *lcdif) if (ret) drm_err(lcdif->drm, "Failed to disable controller!\n"); =20 + /* + * It is necessary to wait for the full frame to finish streaming + * through the DMA engine before we can safely disable it by removing + * the DISP_PARA_DISP_ON bit. Disabling it in-flight can leave the + * hardware confused and unable to resume streaming for the next frame. + */ + reg =3D readl(lcdif->base + LCDC_V8_CTRLDESCL0_5); + reg |=3D CTRLDESCL0_5_SHADOW_LOAD_EN; + writel(reg, lcdif->base + LCDC_V8_CTRLDESCL0_5); + + ret =3D readl_poll_timeout(lcdif->base + LCDC_V8_CTRLDESCL0_5, + reg, !(reg & CTRLDESCL0_5_SHADOW_LOAD_EN), + 0, 36000); /* Wait ~2 frame times max */ + if (ret) + drm_err(lcdif->drm, "Failed to disable controller!\n"); + reg =3D readl(lcdif->base + LCDC_V8_DISP_PARA); reg &=3D ~DISP_PARA_DISP_ON; writel(reg, lcdif->base + LCDC_V8_DISP_PARA); --=20 2.53.0