From nobody Wed Apr 1 09:43:47 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8BC1337754B; Mon, 30 Mar 2026 21:33:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774906386; cv=none; b=P3OajUV+2Vwk3XIRWYVeUfDAL6Njy1iRvKNJSqkooQOC2MTSoUa+AYnKkshCAnVYdySYXx2+et19zt54rf+050HHPk3O+EqvouVQgZlorntQ5w9N/GqvBJXV5sEfJnTHtKhyPYqisbO5qWCtY7l4n6bf+Ks3G+BV8pX828iM+io= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774906386; c=relaxed/simple; bh=p07OTvs2s/16DR9y67MP/bu4X9ZuzXNW/US1NhrGGh0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=h+levIdtZ88mu764uHRo8usNI/TNRNNvNK39vz75PmhqwRfvmTXaE92N0T1gVVdB4rT6XKteHsKQbh0sxblRhJLSbXKzswsoYiaP+ZsxM9mb160X1pyyu1TvlN6Uqb9n8mCC7EoNG0ewwrUcZE6iVirtscfLhBNmDiI8NroOOw0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=S5eo/P8n; arc=none smtp.client-ip=192.198.163.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="S5eo/P8n" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774906386; x=1806442386; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=p07OTvs2s/16DR9y67MP/bu4X9ZuzXNW/US1NhrGGh0=; b=S5eo/P8nvngefJVYi+eVn/TOOlvhgKt/MLRBFo+O69M05D3OqKdux/Pw lUcdwNR7NdPInwEbplW7ACD8z1KIyYqQ/zXOPW9VG6i8AOK5CsxBTE5Au NpVTO4jmRgCLsg165/jIzDnWpG+25p8DzhBqYiLVo4IscmnSjsGuMTDoe m72QswlDmKESRTbLiQjxj5ArMQk6RiBxl/LyF8Z6U0Cot1rPBg7GIKP4s B5BC5HYsIQOvonOb+IsXYT2biXYjKbVteuEioe5BWtY0b1MhS5Axdp3Nv cVe/sYTniVQy0v6jEj6XdIq6CEMo1HE4hKX+N3PgRlaD455IukmQAFybU Q==; X-CSE-ConnectionGUID: lkyLFxdmRd6dS0T/VzoAcQ== X-CSE-MsgGUID: 7P+y+ICbQqamUGiC55pV2A== X-IronPort-AV: E=McAfee;i="6800,10657,11744"; a="101366812" X-IronPort-AV: E=Sophos;i="6.23,150,1770624000"; d="scan'208";a="101366812" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2026 14:33:05 -0700 X-CSE-ConnectionGUID: Cosff5diTnqe49d2IDKcjQ== X-CSE-MsgGUID: f7tcj/nnT96S4pecP0MzCQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,150,1770624000"; d="scan'208";a="227779534" Received: from 9cc2c43eec6b.jf.intel.com ([10.54.77.29]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2026 14:33:05 -0700 From: Zide Chen To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Alexander Shishkin , Andi Kleen , Eranian Stephane Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Dapeng Mi , Zide Chen , Steve Wahl , Chun-Tse Shao , Markus Elfring , kernel test robot Subject: [PATCH V6 1/5] perf/x86/intel/uncore: Fix iounmap() leak on global_init failure Date: Mon, 30 Mar 2026 14:24:40 -0700 Message-ID: <20260330212444.117325-2-zide.chen@intel.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260330212444.117325-1-zide.chen@intel.com> References: <20260330212444.117325-1-zide.chen@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Kernel test robot reported: Unverified Error/Warning (likely false positive, kindly check if interested): arch/x86/events/intel/uncore_discovery.c:293:2-8: ERROR: missing iounmap; ioremap on line 288 and execution via conditional on line 292 If domain->global_init() fails in __parse_discovery_table(), the ioremap'ed MMIO region is not released before returning, resulting in an MMIO mapping leak. Reported-by: kernel test robot Fixes: b575fc0e3357 ("perf/x86/intel/uncore: Add domain global init callbac= k") Reviewed-by: Dapeng Mi Signed-off-by: Zide Chen --- V2: - As suggested by Markus, add an `out` label and use goto-based error handling to reduce duplicated iounmap() code. - Add the original warning from the kernel test robot to the commit message. - Trivial rewording of the commit message. V3: - Add Reviewed-by tag. --- arch/x86/events/intel/uncore_discovery.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/arch/x86/events/intel/uncore_discovery.c b/arch/x86/events/int= el/uncore_discovery.c index 1b1a6b221048..6a4e892cd525 100644 --- a/arch/x86/events/intel/uncore_discovery.c +++ b/arch/x86/events/intel/uncore_discovery.c @@ -264,6 +264,7 @@ static int __parse_discovery_table(struct uncore_discov= ery_domain *domain, struct uncore_unit_discovery unit; void __iomem *io_addr; unsigned long size; + int ret =3D 0; int i; =20 size =3D UNCORE_DISCOVERY_GLOBAL_MAP_SIZE; @@ -273,21 +274,23 @@ static int __parse_discovery_table(struct uncore_disc= overy_domain *domain, =20 /* Read Global Discovery State */ memcpy_fromio(&global, io_addr, sizeof(struct uncore_global_discovery)); + iounmap(io_addr); + if (uncore_discovery_invalid_unit(global)) { pr_info("Invalid Global Discovery State: 0x%llx 0x%llx 0x%llx\n", global.table1, global.ctl, global.table3); - iounmap(io_addr); return -EINVAL; } - iounmap(io_addr); =20 size =3D (1 + global.max_units) * global.stride * 8; io_addr =3D ioremap(addr, size); if (!io_addr) return -ENOMEM; =20 - if (domain->global_init && domain->global_init(global.ctl)) - return -ENODEV; + if (domain->global_init && domain->global_init(global.ctl)) { + ret =3D -ENODEV; + goto out; + } =20 /* Parsing Unit Discovery State */ for (i =3D 0; i < global.max_units; i++) { @@ -307,8 +310,10 @@ static int __parse_discovery_table(struct uncore_disco= very_domain *domain, } =20 *parsed =3D true; + +out: iounmap(io_addr); - return 0; + return ret; } =20 static int parse_discovery_table(struct uncore_discovery_domain *domain, --=20 2.53.0 From nobody Wed Apr 1 09:43:47 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9A68B396B76; Mon, 30 Mar 2026 21:33:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" This warning can be triggered if NUMA is disabled and the system boots with fewer CPUs than the number of CPUs in die 0. WARNING: CPU: 9 PID: 7257 at uncore.c:1157 uncore_pci_pmu_register+0x136/0x= 160 [intel_uncore] Currently, the discovery table continues to be parsed even if all CPUs in the associated die are offline. This can lead to an array overflow at "pmu->boxes[die] =3D box" in uncore_pci_pmu_register(), which may trigger the warning above or cause other issues. Reported-by: Steve Wahl Tested-by: Steve Wahl Fixes: edae1f06c2cd ("perf/x86/intel/uncore: Parse uncore discovery tables") Reviewed-by: Dapeng Mi Signed-off-by: Zide Chen --- V2: - Add the Tested-by tag - Rebase onto perf/core (base commit: a491c02c2770) V3: - Remove the overly cautious WARN_ON() V4: - Add Reviewed-by tag. --- arch/x86/events/intel/uncore_discovery.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/events/intel/uncore_discovery.c b/arch/x86/events/int= el/uncore_discovery.c index 6a4e892cd525..749db3649f8f 100644 --- a/arch/x86/events/intel/uncore_discovery.c +++ b/arch/x86/events/intel/uncore_discovery.c @@ -371,7 +371,7 @@ static bool uncore_discovery_pci(struct uncore_discover= y_domain *domain) (val & UNCORE_DISCOVERY_DVSEC2_BIR_MASK) * UNCORE_DISCOVERY_BIR_S= TEP; =20 die =3D get_device_die_id(dev); - if (die < 0) + if ((die < 0) || (die >=3D uncore_max_dies())) continue; =20 parse_discovery_table(domain, dev, die, bar_offset, &parsed); --=20 2.53.0 From nobody Wed Apr 1 09:43:47 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F1E403A16A5; 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a="101366825" X-IronPort-AV: E=Sophos;i="6.23,150,1770624000"; d="scan'208";a="101366825" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2026 14:33:07 -0700 X-CSE-ConnectionGUID: 2EL/tTtlSteUtPfvcsXlbg== X-CSE-MsgGUID: BPBTC3oQTLeC+af8ddxfXw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,150,1770624000"; d="scan'208";a="227779540" Received: from 9cc2c43eec6b.jf.intel.com ([10.54.77.29]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2026 14:33:06 -0700 From: Zide Chen To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Alexander Shishkin , Andi Kleen , Eranian Stephane Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Dapeng Mi , Zide Chen , Steve Wahl , Chun-Tse Shao , Markus Elfring Subject: [PATCH V6 3/5] perf/x86/intel/uncore: Do not treat -1 die_id as error during UBOX scan Date: Mon, 30 Mar 2026 14:24:42 -0700 Message-ID: <20260330212444.117325-4-zide.chen@intel.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260330212444.117325-1-zide.chen@intel.com> References: <20260330212444.117325-1-zide.chen@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In snbep_pci2phy_map_init(), in the nr_node_ids > 8 path, uncore_device_to_die() may return -1 when all CPUs associated with the UBOX device are offline. Remove the WARN_ON_ONCE(die_id =3D=3D -1) check for two reasons: - The current code breaks out of the loop. This is incorrect because pci_get_device() does not guarantee iteration in domain or bus order, so additional UBOX devices may be skipped during the scan. - Returning -EINVAL is incorrect, since marking offline buses with die_id =3D=3D -1 is expected and should not be treated as an error. Fixes: 9a7832ce3d92 ("perf/x86/intel/uncore: With > 8 nodes, get pci bus di= e id from NUMA info") Signed-off-by: Zide Chen Reviewed-by: Dapeng Mi --- V2: - Fix the commit message to note that spr_update_device_location() is used by EMR, not GNR. - Rewrite the commit message for clarity. - Add a Tested-by tag. V5: - Removed unused die_id (Dapeng). V6: - Move the spr_update_device_location() change to a separate patch. - Update the comit message and title to reflect the reduced scope of this patch. - Remove Tested-by since the code has changed. --- arch/x86/events/intel/uncore_snbep.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/u= ncore_snbep.c index 9b51883fd6fd..8ee06d4659bb 100644 --- a/arch/x86/events/intel/uncore_snbep.c +++ b/arch/x86/events/intel/uncore_snbep.c @@ -1413,7 +1413,7 @@ static int topology_gidnid_map(int nodeid, u32 gidnid) static int snbep_pci2phy_map_init(int devid, int nodeid_loc, int idmap_loc= , bool reverse) { struct pci_dev *ubox_dev =3D NULL; - int i, bus, nodeid, segment, die_id; + int i, bus, nodeid, segment; struct pci2phy_map *map; int err =3D 0; u32 config =3D 0; @@ -1458,14 +1458,9 @@ static int snbep_pci2phy_map_init(int devid, int nod= eid_loc, int idmap_loc, bool break; } =20 - map->pbus_to_dieid[bus] =3D die_id =3D uncore_device_to_die(ubox_dev); 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30 Mar 2026 14:33:07 -0700 From: Zide Chen To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Alexander Shishkin , Andi Kleen , Eranian Stephane Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Dapeng Mi , Zide Chen , Steve Wahl , Chun-Tse Shao , Markus Elfring Subject: [PATCH V6 4/5] perf/x86/intel/uncore: Fix PMON enumeration with NUMA disabled Date: Mon, 30 Mar 2026 14:24:43 -0700 Message-ID: <20260330212444.117325-5-zide.chen@intel.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260330212444.117325-1-zide.chen@intel.com> References: <20260330212444.117325-1-zide.chen@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" When NUMA is disabled on a NUMA-capable platform, UPI and M3UPI PMON units are not enumerated. In this case, pcibus_to_node() always returns NUMA_NO_NODE, causing uncore_device_to_die() to return -1 for all PCI devices. As a result, the corresponding PMON units are not added to the RB tree. These PMON units are per-die resources, and their utility when NUMA is disabled is limited. The driver does not prohibit their use, and the enumeration should still work correctly. Fix this by using uncore_pcibus_to_dieid(), which works regardless of whether NUMA is enabled. This requires calling snbep_pci2phy_map_init() in spr_uncore_pci_init(). Since pci_init() is called before mmio_init(), remove the redundant snbep_pci2phy_map_init() call from spr_uncore_mmio_init(). If snbep_pci2phy_map_init() fails, uncore driver should be bailed out, so the fallback path in spr_uncore_mmio_init() can be removed. Signed-off-by: Zide Chen --- V6: - Split from patch v5 3/4. - Remove the redundant call in spr_uncore_mmio_init(). - Update commit messages. --- arch/x86/events/intel/uncore.c | 1 + arch/x86/events/intel/uncore_snbep.c | 26 +++++++++++--------------- 2 files changed, 12 insertions(+), 15 deletions(-) diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c index 786bd51a0d89..e9cc1ba921c5 100644 --- a/arch/x86/events/intel/uncore.c +++ b/arch/x86/events/intel/uncore.c @@ -67,6 +67,7 @@ int uncore_die_to_segment(int die) return bus ? pci_domain_nr(bus) : -EINVAL; } =20 +/* Note: This API can only be used when NUMA information is available. */ int uncore_device_to_die(struct pci_dev *dev) { int node =3D pcibus_to_node(dev->bus); diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/u= ncore_snbep.c index 8ee06d4659bb..73da1e88e286 100644 --- a/arch/x86/events/intel/uncore_snbep.c +++ b/arch/x86/events/intel/uncore_snbep.c @@ -6415,7 +6415,7 @@ static void spr_update_device_location(int type_id) =20 while ((dev =3D pci_get_device(PCI_VENDOR_ID_INTEL, device, dev)) !=3D NU= LL) { =20 - die =3D uncore_device_to_die(dev); + die =3D uncore_pcibus_to_dieid(dev->bus); if (die < 0) continue; =20 @@ -6439,6 +6439,10 @@ static void spr_update_device_location(int type_id) =20 int spr_uncore_pci_init(void) { + int ret =3D snbep_pci2phy_map_init(0x3250, SKX_CPUNODEID, SKX_GIDNIDMAP, = true); + if (ret) + return ret; + /* * The discovery table of UPI on some SPR variant is broken, * which impacts the detection of both UPI and M3UPI uncore PMON. @@ -6460,21 +6464,13 @@ int spr_uncore_pci_init(void) =20 void spr_uncore_mmio_init(void) { - int ret =3D snbep_pci2phy_map_init(0x3250, SKX_CPUNODEID, SKX_GIDNIDMAP, = true); + uncore_mmio_uncores =3D uncore_get_uncores(UNCORE_ACCESS_MMIO, + UNCORE_SPR_MMIO_EXTRA_UNCORES, + spr_mmio_uncores, + UNCORE_SPR_NUM_UNCORE_TYPES, + spr_uncores); =20 - if (ret) { - uncore_mmio_uncores =3D uncore_get_uncores(UNCORE_ACCESS_MMIO, 0, NULL, - UNCORE_SPR_NUM_UNCORE_TYPES, - spr_uncores); - } else { - uncore_mmio_uncores =3D uncore_get_uncores(UNCORE_ACCESS_MMIO, - UNCORE_SPR_MMIO_EXTRA_UNCORES, - spr_mmio_uncores, - UNCORE_SPR_NUM_UNCORE_TYPES, - spr_uncores); - - spr_uncore_imc_free_running.num_boxes =3D uncore_type_max_boxes(uncore_m= mio_uncores, UNCORE_SPR_IMC) / 2; - } + spr_uncore_imc_free_running.num_boxes =3D uncore_type_max_boxes(uncore_mm= io_uncores, UNCORE_SPR_IMC) / 2; } =20 /* end of SPR uncore support */ --=20 2.53.0 From nobody Wed Apr 1 09:43:47 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 729DC3A453B; Mon, 30 Mar 2026 21:33:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774906390; cv=none; b=nyHULrKzgjhWlyjpoTsbYJpNf7r1tg1kdp8N1EeQXWeeoSK2o6NdeYOhaFyqld4RmnKJcrI8qPE90webY6i4A3w6OfI2UOlkqQmq/xHh8ZufBuFyuEearVEbgaWYtl9oRGtHpmxT2jqSqnDICNzZyerFHOdpZCGBSh8WlcfUTmY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; 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d="scan'208";a="227779546" Received: from 9cc2c43eec6b.jf.intel.com ([10.54.77.29]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2026 14:33:08 -0700 From: Zide Chen To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Adrian Hunter , Alexander Shishkin , Andi Kleen , Eranian Stephane Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Dapeng Mi , Zide Chen , Steve Wahl , Chun-Tse Shao , Markus Elfring Subject: [PATCH V6 5/5] perf/x86/intel/uncore: Remove extra double quote mark Date: Mon, 30 Mar 2026 14:24:44 -0700 Message-ID: <20260330212444.117325-6-zide.chen@intel.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260330212444.117325-1-zide.chen@intel.com> References: <20260330212444.117325-1-zide.chen@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The third argument in INTEL_UNCORE_FR_EVENT_DESC() is subject to __stringify(), and the extra double quote marks can result in the expansion "3.814697266e-6" in the sysfs knobs, instead of 3.814697266e-6. This is incorrect, though it may still work for perf, e.g. perf stat -e uncore_iio_free_running_0/bw_in_port0/ Fixes: d8987048f665 ("perf/x86/intel/uncore: Support IIO free-running count= ers on DMR") Reported-by: Chun-Tse Shao Closes: https://lore.kernel.org/all/20251231224233.113839-1-zide.chen@intel= .com/ Reviewed-by: Chun-Tse Shao Reviewed-by: Dapeng Mi Signed-off-by: Zide Chen --- V2: Added Reviewed-by tags. --- arch/x86/events/intel/uncore_snbep.c | 48 ++++++++++++++-------------- 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/u= ncore_snbep.c index 73da1e88e286..fdbdabb5026e 100644 --- a/arch/x86/events/intel/uncore_snbep.c +++ b/arch/x86/events/intel/uncore_snbep.c @@ -6952,34 +6952,34 @@ static struct freerunning_counters dmr_iio_freerunn= ing[] =3D { =20 static struct uncore_event_desc dmr_uncore_iio_freerunning_events[] =3D { /* ITC Free Running Data BW counter for inbound traffic */ - INTEL_UNCORE_FR_EVENT_DESC(inb_data_port0, 0x10, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(inb_data_port1, 0x11, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(inb_data_port2, 0x12, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(inb_data_port3, 0x13, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(inb_data_port4, 0x14, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(inb_data_port5, 0x15, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(inb_data_port6, 0x16, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(inb_data_port7, 0x17, "3.814697266e-6"), + INTEL_UNCORE_FR_EVENT_DESC(inb_data_port0, 0x10, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(inb_data_port1, 0x11, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(inb_data_port2, 0x12, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(inb_data_port3, 0x13, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(inb_data_port4, 0x14, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(inb_data_port5, 0x15, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(inb_data_port6, 0x16, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(inb_data_port7, 0x17, 3.814697266e-6), =20 /* ITC Free Running BW IN counters */ - INTEL_UNCORE_FR_EVENT_DESC(bw_in_port0, 0x20, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_in_port1, 0x21, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_in_port2, 0x22, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_in_port3, 0x23, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_in_port4, 0x24, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_in_port5, 0x25, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_in_port6, 0x26, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_in_port7, 0x27, "3.814697266e-6"), + INTEL_UNCORE_FR_EVENT_DESC(bw_in_port0, 0x20, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_in_port1, 0x21, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_in_port2, 0x22, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_in_port3, 0x23, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_in_port4, 0x24, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_in_port5, 0x25, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_in_port6, 0x26, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_in_port7, 0x27, 3.814697266e-6), =20 /* ITC Free Running BW OUT counters */ - INTEL_UNCORE_FR_EVENT_DESC(bw_out_port0, 0x30, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_out_port1, 0x31, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_out_port2, 0x32, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_out_port3, 0x33, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_out_port4, 0x34, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_out_port5, 0x35, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_out_port6, 0x36, "3.814697266e-6"), - INTEL_UNCORE_FR_EVENT_DESC(bw_out_port7, 0x37, "3.814697266e-6"), + INTEL_UNCORE_FR_EVENT_DESC(bw_out_port0, 0x30, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_out_port1, 0x31, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_out_port2, 0x32, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_out_port3, 0x33, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_out_port4, 0x34, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_out_port5, 0x35, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_out_port6, 0x36, 3.814697266e-6), + INTEL_UNCORE_FR_EVENT_DESC(bw_out_port7, 0x37, 3.814697266e-6), =20 /* Free Running Clock Counter */ INTEL_UNCORE_EVENT_DESC(clockticks, "event=3D0xff,umask=3D0x40"), --=20 2.53.0