From nobody Mon Apr 6 09:13:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id D73A73A4537; Mon, 30 Mar 2026 14:24:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880655; cv=none; b=P2eyem1gcK4NFqCTbVEnfJ1qrwN4SK2PgqEkPq9izV++x0aXItmuhvw7vQC12l0CTY7CE9VxF9oR4u+vJuOmMMfK1jUKGnZDjVqYXz9JiIKKzVxDqnAdMUDDnEOY09/M/kpW0+zwsbZ3xuNdBSCgw1mfPmnd2me0zbdH+/2PSFE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880655; c=relaxed/simple; bh=v9TjnqFdk60+C8t/qKNrelNzJG6zoK6/zHQBa6IwvdM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=qfMCAYjKztMgIiYyRxxYjtyktpJJutNTlgx1OtEpSHhss6slBXx6Dt5W6njd1FqYq3uRczVjRnkQtPz/sHggyi6GPltK5DVcjiI7k0Xpu4B2eG4JixrIK/JNVjZvPdgQfYf6nlsnYWN00kIt+PUP4Ixpy5koxIQvJWiX4W3o3WQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=BX1ZmAao; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="BX1ZmAao" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 67B741D15; Mon, 30 Mar 2026 07:24:07 -0700 (PDT) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A35DD3F915; Mon, 30 Mar 2026 07:24:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1774880653; bh=v9TjnqFdk60+C8t/qKNrelNzJG6zoK6/zHQBa6IwvdM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BX1ZmAaoSL4Huo2adkdq7fo0Co0dS9tWwDjBh2NRe0BFZKstjwFqJdcjJHiWL3AJc Zcn3VpqXWYgSm3SlROqfNu8hMA0AfTZYjzWyPvfAgE79BJb3Y4AmZE5gQY3RCZNkWw wu+CMxyWdG3ee/CTwdpl50kfYbveRtmHU/qxPyLs= From: Suzuki K Poulose To: kvmarm@lists.linux.dev, will@kernel.org Cc: kvm@vger.kernel.org, alexandru.elisei@arm.com, oupton@kernel.org, maz@kernel.org, tabba@google.com, aneesh.kumar@kernel.org, linux-kernel@vger.kernel.org, Suzuki K Poulose , Anup Patel Subject: [PATCH v7 01/17] headers: Update linux/const.h from linux sources Date: Mon, 30 Mar 2026 15:23:18 +0100 Message-ID: <20260330142334.3309961-2-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260330142334.3309961-1-suzuki.poulose@arm.com> References: <20260330142334.3309961-1-suzuki.poulose@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Building kvmtool from scratch gives me the following errors with buildroot: In file included from include/kvm/pci.h:7, from include/kvm/vfio.h:6, from include/kvm/kvm-config.h:5, from include/kvm/kvm.h:6, from builtin-version.c:4: include/linux/virtio_pci.h:323:20: warning: implicit declaration of functio= n =E2=80=98__KERNEL_DIV_ROUND_UP=E2=80=99 [-Wimplicit-function-declaration] 323 | #define MAX_CAP_ID __KERNEL_DIV_ROUND_UP(VIRTIO_DEV_PARTS_CAP + 1, = 64) | ^~~~~~~~~~~~~~~~~~~~~ include/linux/virtio_pci.h:326:24: note: in expansion of macro =E2=80=98MAX= _CAP_ID=E2=80=99 326 | __le64 supported_caps[MAX_CAP_ID]; | ^~~~~~~~~~ include/linux/virtio_pci.h:326:9: error: variably modified =E2=80=98support= ed_caps=E2=80=99 at file scope 326 | __le64 supported_caps[MAX_CAP_ID]; We inherit linux/virtio_pci.h from the kernel sources and won't be good to = fix it by including linux/kernel.h. Instead, pick up up uapi/linux/const.h from= the kernel tree. This also removes the ifdefery linux/kernel.h To prevent a build warning for redefinition, update the headers from v6.19, remove the hack from linux.kernel.h in one shot. This was also discussed in the Link, in another context. Cc: Anup Patel Cc: Will Deacon Link: https://lore.kernel.org/all/20250211114018.GB8965@willie-the-truck/ Signed-off-by: Suzuki K Poulose --- include/linux/const.h | 53 ++++++++++++++++++++++++++++++++++++++++++ include/linux/kernel.h | 3 --- 2 files changed, 53 insertions(+), 3 deletions(-) create mode 100644 include/linux/const.h diff --git a/include/linux/const.h b/include/linux/const.h new file mode 100644 index 00000000..b8f629ef --- /dev/null +++ b/include/linux/const.h @@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* const.h: Macros for dealing with constants. */ + +#ifndef _UAPI_LINUX_CONST_H +#define _UAPI_LINUX_CONST_H + +/* Some constant macros are used in both assembler and + * C code. Therefore we cannot annotate them always with + * 'UL' and other type specifiers unilaterally. We + * use the following macros to deal with this. + * + * Similarly, _AT() will cast an expression with a type in C, but + * leave it unchanged in asm. + */ + +#ifdef __ASSEMBLY__ +#define _AC(X,Y) X +#define _AT(T,X) X +#else +#define __AC(X,Y) (X##Y) +#define _AC(X,Y) __AC(X,Y) +#define _AT(T,X) ((T)(X)) +#endif + +#define _UL(x) (_AC(x, UL)) +#define _ULL(x) (_AC(x, ULL)) + +#define _BITUL(x) (_UL(1) << (x)) +#define _BITULL(x) (_ULL(1) << (x)) + +#if !defined(__ASSEMBLY__) +/* + * Missing asm support + * + * __BIT128() would not work in the asm code, as it shifts an + * 'unsigned __int128' data type as direct representation of + * 128 bit constants is not supported in the gcc compiler, as + * they get silently truncated. + * + * TODO: Please revisit this implementation when gcc compiler + * starts representing 128 bit constants directly like long + * and unsigned long etc. Subsequently drop the comment for + * GENMASK_U128() which would then start supporting asm code. + */ +#define _BIT128(x) ((unsigned __int128)(1) << (x)) +#endif + +#define __ALIGN_KERNEL(x, a) __ALIGN_KERNEL_MASK(x, (__typeof__(x))(a) - = 1) +#define __ALIGN_KERNEL_MASK(x, mask) (((x) + (mask)) & ~(mask)) + +#define __KERNEL_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) + +#endif /* _UAPI_LINUX_CONST_H */ diff --git a/include/linux/kernel.h b/include/linux/kernel.h index df42d63a..6c22f1c0 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -8,9 +8,6 @@ #define round_down(x, y) ((x) & ~__round_mask(x, y)) =20 #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) -#ifndef __KERNEL_DIV_ROUND_UP -#define __KERNEL_DIV_ROUND_UP(n,d) DIV_ROUND_UP(n,d) -#endif =20 #define ALIGN(x,a) __ALIGN_MASK(x,(typeof(x))(a)-1) #define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask)) --=20 2.43.0 From nobody Mon Apr 6 09:13:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 991C23D9044; Mon, 30 Mar 2026 14:24:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880657; cv=none; b=cBHKL9Vvhriu2xTRjlt/6CAwo/ouNMDhyoFyiMij7SUmRsvMypCniDgxb2MVEByvl5Kclm2xc+/7uN9sX+5YsSe+wDmVIOr+w/tDk4vm/uyVVANFofmzFgVP27QYdgYoc/fmwXucPumXHEHInzz111zAF80pNUBrIAQkdO6WLuk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880657; c=relaxed/simple; bh=7X/UQORjTe0Fzi/AdU6GU+4kh3/A+t/fVz3dIspZI1w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UcdPrBrDXlfItS8d4hlyBGyiDkQJEb6a6VU3fEb6W2v4vvahiBnFUV61QfP8gYWSX1mohiDUXmbfOGUu6A7SPWpcl3W9a1W44LBGrR65ytyuCl/eZQ1CbdE51DKPtyk5qf7q8NkzjwGSAVVLKSoaMrn3sO1j1yCL2x7VEOEC3WA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=Rn+zfFKz; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="Rn+zfFKz" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3AF6A1A2D; Mon, 30 Mar 2026 07:24:09 -0700 (PDT) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 948DF3F915; Mon, 30 Mar 2026 07:24:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1774880655; bh=7X/UQORjTe0Fzi/AdU6GU+4kh3/A+t/fVz3dIspZI1w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Rn+zfFKz8bJsL7gDA7U7lfvfLGPU802moFnx5InYjDrHXNdCy0GmDaRcP2Ero5pCE whbCQqRzMbuvsyb52Sqg5dvvsm4e1uDUGn3oscW500FTQ3Kd+m7/eevNx0cV71X3Yj jXrkV7+qwjL3N9XMKde6pgtmgN6aFNeIXV6X5MfU= From: Suzuki K Poulose To: kvmarm@lists.linux.dev, will@kernel.org Cc: kvm@vger.kernel.org, alexandru.elisei@arm.com, oupton@kernel.org, maz@kernel.org, tabba@google.com, aneesh.kumar@kernel.org, linux-kernel@vger.kernel.org, Suzuki K Poulose Subject: [PATCH v7 02/17] util/update_headers: Clean up header copying Date: Mon, 30 Mar 2026 15:23:19 +0100 Message-ID: <20260330142334.3309961-3-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260330142334.3309961-1-suzuki.poulose@arm.com> References: <20260330142334.3309961-1-suzuki.poulose@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" We copy two kinds of headers. Generic Linux UAPI headers and the ASM UAPI h= eaders for arch specific targets. Introduce helper functions for each and centrali= se the copy process Signed-off-by: Suzuki K Poulose --- util/update_headers.sh | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/util/update_headers.sh b/util/update_headers.sh index af75ca36..7902dddb 100755 --- a/util/update_headers.sh +++ b/util/update_headers.sh @@ -28,17 +28,19 @@ then exit 1 fi =20 -cp -- "$LINUX_ROOT/include/uapi/linux/kvm.h" include/linux +copy_uapi_linux_header () { + cp -- "$LINUX_ROOT/include/uapi/linux/$1" include/linux +} =20 -for header in $VIRTIO_LIST +for header in kvm.h $VIRTIO_LIST do - cp -- "$LINUX_ROOT/include/uapi/linux/$header" include/linux + copy_uapi_linux_header $header done =20 unset KVMTOOL_PATH =20 -copy_optional_arch () { - local src=3D"$LINUX_ROOT/arch/$arch/include/uapi/$1" +copy_uapi_asm_header () { + local src=3D"$LINUX_ROOT/arch/$arch/include/uapi/asm/$1" =20 if [ -r "$src" ] then @@ -51,8 +53,9 @@ do KVMTOOL_PATH=3D$arch =20 case $arch in - arm64) copy_optional_arch asm/sve_context.h ;; + arm64) + copy_uapi_asm_header sve_context.h + ;; esac - cp -- "$LINUX_ROOT/arch/$arch/include/uapi/asm/kvm.h" \ - "$KVMTOOL_PATH/include/asm" + copy_uapi_asm_header kvm.h done --=20 2.43.0 From nobody Mon Apr 6 09:13:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 758953DA5B7; Mon, 30 Mar 2026 14:24:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880659; cv=none; b=mjWpVhyoYgijymlpVCbqAvwR+wnWTl4zGQGA84X6QecQawBm3r63+BAn9k4csGbbdWf4xZN3JXjrlauFTcbrQlbjSN7dwMkO5YHNqkNNxBOkZe+XbEDx7h0z/t/PItmuLQFJsDlTbZBWYF8bth3iJmm5fNw6gf2oFVdviHAJM1U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880659; c=relaxed/simple; bh=fwjLbSUCVBKp2+5ehukf18tkFtjg9ytsRTv5sZMnrL8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sCHSiesCAbaEWEMsIY9xEPlTO1CVf1N1Im7Wp8eg+B7XYd4FkH1aZo3amrBwLUhwbhBkQE243BVMW2/T5Iw31MPNL5e7C96QNm+jEXt4RUJSPVMBp8g+JPVacoPcy+KimUC9PUfBtFWxZqMzyjdPeXLHgzJOCykWr1nNLRdpuj0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=VBbvGlrn; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="VBbvGlrn" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 163C61D15; Mon, 30 Mar 2026 07:24:11 -0700 (PDT) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 66B753F915; Mon, 30 Mar 2026 07:24:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1774880656; bh=fwjLbSUCVBKp2+5ehukf18tkFtjg9ytsRTv5sZMnrL8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VBbvGlrnK4+zQf2F6UvXQIBUv1L8yMQwGP9hgn9sgIWC1XQ/yJ6KCXqXVtiZG/m+s kK4EdtOTcZR2O3mULTeFCccHKGI9yYgfgDgSoebJ2D2xLnwQg/p5s9Fku9kKDqYG4z MnytV7AdUWLGQTJg+JC6qepDYdOeYeDknALtrspg= From: Suzuki K Poulose To: kvmarm@lists.linux.dev, will@kernel.org Cc: kvm@vger.kernel.org, alexandru.elisei@arm.com, oupton@kernel.org, maz@kernel.org, tabba@google.com, aneesh.kumar@kernel.org, linux-kernel@vger.kernel.org, Suzuki K Poulose Subject: [PATCH v7 03/17] util/update_headers: Warn about missing header files Date: Mon, 30 Mar 2026 15:23:20 +0100 Message-ID: <20260330142334.3309961-4-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260330142334.3309961-1-suzuki.poulose@arm.com> References: <20260330142334.3309961-1-suzuki.poulose@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Warn about missing header files, rather than silently ignoring. Cc: Will Deacon Link: https://lore.kernel.org/all/aYoCiXg8pSC_bwIv@willie-the-truck/ Signed-off-by: Suzuki K Poulose --- util/update_headers.sh | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/util/update_headers.sh b/util/update_headers.sh index 7902dddb..2f981ca3 100755 --- a/util/update_headers.sh +++ b/util/update_headers.sh @@ -40,11 +40,14 @@ done unset KVMTOOL_PATH =20 copy_uapi_asm_header () { - local src=3D"$LINUX_ROOT/arch/$arch/include/uapi/asm/$1" + local file=3D"arch/$arch/include/uapi/asm/$1" + local src=3D"$LINUX_ROOT/$file" =20 if [ -r "$src" ] then cp -- "$src" "$KVMTOOL_PATH/include/asm/" + else + echo "Warning: Unable to find $file, skipping..." fi } =20 --=20 2.43.0 From nobody Mon Apr 6 09:13:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 28A7C3DA7E9; Mon, 30 Mar 2026 14:24:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880660; cv=none; b=Sx/6kzZ3o3vDVoVXK3fKXxJWne786yUEx7h1qf2mbNs2lyFNv0va2iuwTw4tUJbagkCaOsxEB0wetREOL8maWKyU/WbiEbXrTy1FgGRuy2Lk70CEczA96P69ljSMyM+GX3u5qX1wsgrBZey0WDUN016Lj2SEKW11SjjcR7S26aM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880660; c=relaxed/simple; bh=bOky3nvsc6ldPQ7fAYvJH6clsPbllPsLi+u9F3fXEC8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=LhWwdAbA+auo1ZtSD4tbjMeT3N1aFrFv7AtycNfdhPugcdtyv7apy8HkFg1ntFg3GOqHSeVfzoauPm9d6I9beax6PuB35blYG+vZ7ro40/hSB3f3Do5EiGJZPs1owPP8tJJfHz/X22Twcpdo8pnQ+hfV+OlcBLnKO4LQLerFj+c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=hocopP9W; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="hocopP9W" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E465F1A2D; Mon, 30 Mar 2026 07:24:12 -0700 (PDT) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 41B103F915; Mon, 30 Mar 2026 07:24:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1774880658; bh=bOky3nvsc6ldPQ7fAYvJH6clsPbllPsLi+u9F3fXEC8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hocopP9W1LJuVkba2ZaZ+71Ix5Rwuh2u/sHWwntgeihC5o3wzb7AffIDdClGrqX+q 1JFV0RWRwOBVY159XZv90VveGh7F/UWFfxp06fwFqiUrVDlRw+Me2m9nYfhncyP9U3 I787LyAyes7FtOHGs6V81GStEJjPiKQHMtS+ANPA= From: Suzuki K Poulose To: kvmarm@lists.linux.dev, will@kernel.org Cc: kvm@vger.kernel.org, alexandru.elisei@arm.com, oupton@kernel.org, maz@kernel.org, tabba@google.com, aneesh.kumar@kernel.org, linux-kernel@vger.kernel.org, Suzuki K Poulose Subject: [PATCH v7 04/17] update_headers: arm64: Track uapi/linux/psci.h for PSCI definitions Date: Mon, 30 Mar 2026 15:23:21 +0100 Message-ID: <20260330142334.3309961-5-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260330142334.3309961-1-suzuki.poulose@arm.com> References: <20260330142334.3309961-1-suzuki.poulose@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In preparation for adding PSCI support in userspace, fetch the headers from the kernel. Reviewed-by: Marc Zyngier Signed-off-by: Suzuki K Poulose --- util/update_headers.sh | 1 + 1 file changed, 1 insertion(+) diff --git a/util/update_headers.sh b/util/update_headers.sh index 2f981ca3..054397bf 100755 --- a/util/update_headers.sh +++ b/util/update_headers.sh @@ -58,6 +58,7 @@ do case $arch in arm64) copy_uapi_asm_header sve_context.h + copy_uapi_linux_header psci.h ;; esac copy_uapi_asm_header kvm.h --=20 2.43.0 From nobody Mon Apr 6 09:13:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 29B463DBD7F; Mon, 30 Mar 2026 14:24:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880662; cv=none; b=f1jZ6SjYXywJQOTvP5EDPl5s0Fi7oT4tqHGCwgtlEahZh5S6Aeg5ZYRtkvqOuW9+lFq3PEdC/2wTkpJx9s1G18dYJ1SoT64K1/fl2aZfEHXyHvSYhWQpNrxvgFzNPXNl+aElKqW48PaRyR8vpirTEMFgdvoG6SjO7uBg1jyfuvM= ARC-Message-Signature: i=1; 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Mon, 30 Mar 2026 07:24:14 -0700 (PDT) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 1CBED3F915; Mon, 30 Mar 2026 07:24:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1774880660; bh=OCfOi3YUX4a2/GxBNM+Exfvx0QRZUDYfs9dG8gcGRE8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SiM95+ai6in21jKHqSyIJnzj4+uYzo/mvUdvR8O69bbFHJCdiF+DwrJbIy7KWKOyb 3ZWE/XiQelmkn5ceYlBjIhDk48D4z8yumN6qNTWpkZ67hXeOA5waGcqYPTtHvOQzmP QjjRg0YmVUED3jXBigusvCqx8aTEc1RDw5ms1fMY= From: Suzuki K Poulose To: kvmarm@lists.linux.dev, will@kernel.org Cc: kvm@vger.kernel.org, alexandru.elisei@arm.com, oupton@kernel.org, maz@kernel.org, tabba@google.com, aneesh.kumar@kernel.org, linux-kernel@vger.kernel.org, Suzuki K Poulose Subject: [PATCH v7 05/17] arm64: Sync headers from Linux v6.19 for psci.h Date: Mon, 30 Mar 2026 15:23:22 +0100 Message-ID: <20260330142334.3309961-6-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260330142334.3309961-1-suzuki.poulose@arm.com> References: <20260330142334.3309961-1-suzuki.poulose@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update headers to sync the newly added psci.h for arm64 Signed-off-by: Suzuki K Poulose --- include/linux/psci.h | 52 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/include/linux/psci.h b/include/linux/psci.h index 310d83e0..81759ff3 100644 --- a/include/linux/psci.h +++ b/include/linux/psci.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * ARM Power State and Coordination Interface (PSCI) header * @@ -46,6 +47,30 @@ #define PSCI_0_2_FN64_MIGRATE PSCI_0_2_FN64(5) #define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU PSCI_0_2_FN64(7) =20 +#define PSCI_1_0_FN_PSCI_FEATURES PSCI_0_2_FN(10) +#define PSCI_1_0_FN_CPU_FREEZE PSCI_0_2_FN(11) +#define PSCI_1_0_FN_CPU_DEFAULT_SUSPEND PSCI_0_2_FN(12) +#define PSCI_1_0_FN_NODE_HW_STATE PSCI_0_2_FN(13) +#define PSCI_1_0_FN_SYSTEM_SUSPEND PSCI_0_2_FN(14) +#define PSCI_1_0_FN_SET_SUSPEND_MODE PSCI_0_2_FN(15) +#define PSCI_1_0_FN_STAT_RESIDENCY PSCI_0_2_FN(16) +#define PSCI_1_0_FN_STAT_COUNT PSCI_0_2_FN(17) + +#define PSCI_1_1_FN_SYSTEM_RESET2 PSCI_0_2_FN(18) +#define PSCI_1_1_FN_MEM_PROTECT PSCI_0_2_FN(19) +#define PSCI_1_1_FN_MEM_PROTECT_CHECK_RANGE PSCI_0_2_FN(20) +#define PSCI_1_3_FN_SYSTEM_OFF2 PSCI_0_2_FN(21) + +#define PSCI_1_0_FN64_CPU_DEFAULT_SUSPEND PSCI_0_2_FN64(12) +#define PSCI_1_0_FN64_NODE_HW_STATE PSCI_0_2_FN64(13) +#define PSCI_1_0_FN64_SYSTEM_SUSPEND PSCI_0_2_FN64(14) +#define PSCI_1_0_FN64_STAT_RESIDENCY PSCI_0_2_FN64(16) +#define PSCI_1_0_FN64_STAT_COUNT PSCI_0_2_FN64(17) + +#define PSCI_1_1_FN64_SYSTEM_RESET2 PSCI_0_2_FN64(18) +#define PSCI_1_1_FN64_MEM_PROTECT_CHECK_RANGE PSCI_0_2_FN64(20) +#define PSCI_1_3_FN64_SYSTEM_OFF2 PSCI_0_2_FN64(21) + /* PSCI v0.2 power state encoding for CPU_SUSPEND function */ #define PSCI_0_2_POWER_STATE_ID_MASK 0xffff #define PSCI_0_2_POWER_STATE_ID_SHIFT 0 @@ -56,6 +81,13 @@ #define PSCI_0_2_POWER_STATE_AFFL_MASK \ (0x3 << PSCI_0_2_POWER_STATE_AFFL_SHIFT) =20 +/* PSCI extended power state encoding for CPU_SUSPEND function */ +#define PSCI_1_0_EXT_POWER_STATE_ID_MASK 0xfffffff +#define PSCI_1_0_EXT_POWER_STATE_ID_SHIFT 0 +#define PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT 30 +#define PSCI_1_0_EXT_POWER_STATE_TYPE_MASK \ + (0x1 << PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT) + /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */ #define PSCI_0_2_AFFINITY_LEVEL_ON 0 #define PSCI_0_2_AFFINITY_LEVEL_OFF 1 @@ -66,6 +98,13 @@ #define PSCI_0_2_TOS_UP_NO_MIGRATE 1 #define PSCI_0_2_TOS_MP 2 =20 +/* PSCI v1.1 reset type encoding for SYSTEM_RESET2 */ +#define PSCI_1_1_RESET_TYPE_SYSTEM_WARM_RESET 0 +#define PSCI_1_1_RESET_TYPE_VENDOR_START 0x80000000U + +/* PSCI v1.3 hibernate type for SYSTEM_OFF2 */ +#define PSCI_1_3_OFF_TYPE_HIBERNATE_OFF BIT(0) + /* PSCI version decoding (independent of PSCI version) */ #define PSCI_VERSION_MAJOR_SHIFT 16 #define PSCI_VERSION_MINOR_MASK \ @@ -75,6 +114,18 @@ (((ver) & PSCI_VERSION_MAJOR_MASK) >> PSCI_VERSION_MAJOR_SHIFT) #define PSCI_VERSION_MINOR(ver) \ ((ver) & PSCI_VERSION_MINOR_MASK) +#define PSCI_VERSION(maj, min) \ + ((((maj) << PSCI_VERSION_MAJOR_SHIFT) & PSCI_VERSION_MAJOR_MASK) | \ + ((min) & PSCI_VERSION_MINOR_MASK)) + +/* PSCI features decoding (>=3D1.0) */ +#define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT 1 +#define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK \ + (0x1 << PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT) + +#define PSCI_1_0_OS_INITIATED BIT(0) +#define PSCI_1_0_SUSPEND_MODE_PC 0 +#define PSCI_1_0_SUSPEND_MODE_OSI 1 =20 /* PSCI return values (inclusive of all PSCI versions) */ #define PSCI_RET_SUCCESS 0 @@ -86,5 +137,6 @@ #define PSCI_RET_INTERNAL_FAILURE -6 #define PSCI_RET_NOT_PRESENT -7 #define PSCI_RET_DISABLED -8 +#define PSCI_RET_INVALID_ADDRESS -9 =20 #endif /* _UAPI_LINUX_PSCI_H */ --=20 2.43.0 From nobody Mon Apr 6 09:13:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 213A13DCDA1; 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arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="b+K745Qe" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A52761A2D; Mon, 30 Mar 2026 07:24:16 -0700 (PDT) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E26B73F915; Mon, 30 Mar 2026 07:24:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1774880662; bh=6b0zJDeQI/mbOPSyGjHdpqic3c0brlYOlSZEyHUzqMg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=b+K745QehyBUo6uGQaMzgV2yJXxcRYJMxknRZPxjMQrAWsHRphj6O6qAeTHwO8T2Y 9M2KguUivuboZr1p++Mdv72boV0FcKeLcB/h3pzuLRNyl7zCUDlb7YxDthHvN/aZvZ bzvDJSpyuiZlEXkeIF1hDN6W2CpD1P887LhfD8I8= From: Suzuki K Poulose To: kvmarm@lists.linux.dev, will@kernel.org Cc: kvm@vger.kernel.org, alexandru.elisei@arm.com, oupton@kernel.org, maz@kernel.org, tabba@google.com, aneesh.kumar@kernel.org, linux-kernel@vger.kernel.org, Oliver Upton , Suzuki K Poulose Subject: [PATCH v7 06/17] Import arm-smccc.h from Linux v6.19 Date: Mon, 30 Mar 2026 15:23:23 +0100 Message-ID: <20260330142334.3309961-7-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260330142334.3309961-1-suzuki.poulose@arm.com> References: <20260330142334.3309961-1-suzuki.poulose@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Oliver Upton Copy in the SMCCC definitions from the kernel, which will be used to implement SMCCC handling in userspace. Strip off unnecessary kernel specific bits (thus we can't add it to the update_headers script). Reviewed-by: Marc Zyngier Signed-off-by: Oliver Upton Signed-off-by: Suzuki K Poulose --- include/linux/arm-smccc.h | 305 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 305 insertions(+) create mode 100644 include/linux/arm-smccc.h diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h new file mode 100644 index 00000000..121a9608 --- /dev/null +++ b/include/linux/arm-smccc.h @@ -0,0 +1,305 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2015, Linaro Limited + * Copied from $linux/include/linux/arm-smccc.h + */ +#ifndef __LINUX_ARM_SMCCC_H +#define __LINUX_ARM_SMCCC_H + +#include + +/* + * This file provides common defines for ARM SMC Calling Convention as + * specified in + * https://developer.arm.com/docs/den0028/latest + * + * This code is up-to-date with version DEN 0028 C + */ + +#define ARM_SMCCC_STD_CALL _AC(0,U) +#define ARM_SMCCC_FAST_CALL _AC(1,U) +#define ARM_SMCCC_TYPE_SHIFT 31 + +#define ARM_SMCCC_SMC_32 0 +#define ARM_SMCCC_SMC_64 1 +#define ARM_SMCCC_CALL_CONV_SHIFT 30 + +#define ARM_SMCCC_OWNER_MASK 0x3F +#define ARM_SMCCC_OWNER_SHIFT 24 + +#define ARM_SMCCC_FUNC_MASK 0xFFFF + +#define ARM_SMCCC_IS_FAST_CALL(smc_val) \ + ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT)) +#define ARM_SMCCC_IS_64(smc_val) \ + ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT)) +#define ARM_SMCCC_FUNC_NUM(smc_val) ((smc_val) & ARM_SMCCC_FUNC_MASK) +#define ARM_SMCCC_OWNER_NUM(smc_val) \ + (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK) + +#define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \ + (((type) << ARM_SMCCC_TYPE_SHIFT) | \ + ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \ + (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \ + ((func_num) & ARM_SMCCC_FUNC_MASK)) + +#define ARM_SMCCC_OWNER_ARCH 0 +#define ARM_SMCCC_OWNER_CPU 1 +#define ARM_SMCCC_OWNER_SIP 2 +#define ARM_SMCCC_OWNER_OEM 3 +#define ARM_SMCCC_OWNER_STANDARD 4 +#define ARM_SMCCC_OWNER_STANDARD_HYP 5 +#define ARM_SMCCC_OWNER_VENDOR_HYP 6 +#define ARM_SMCCC_OWNER_TRUSTED_APP 48 +#define ARM_SMCCC_OWNER_TRUSTED_APP_END 49 +#define ARM_SMCCC_OWNER_TRUSTED_OS 50 +#define ARM_SMCCC_OWNER_TRUSTED_OS_END 63 + +#define ARM_SMCCC_FUNC_QUERY_CALL_UID 0xff01 + +#define ARM_SMCCC_QUIRK_NONE 0 +#define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */ + +#define ARM_SMCCC_VERSION_1_0 0x10000 +#define ARM_SMCCC_VERSION_1_1 0x10001 +#define ARM_SMCCC_VERSION_1_2 0x10002 +#define ARM_SMCCC_VERSION_1_3 0x10003 + +#define ARM_SMCCC_1_3_SVE_HINT 0x10000 +#define ARM_SMCCC_CALL_HINTS ARM_SMCCC_1_3_SVE_HINT + + +#define ARM_SMCCC_VERSION_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + 0, 0) + +#define ARM_SMCCC_ARCH_FEATURES_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + 0, 1) + +#define ARM_SMCCC_ARCH_SOC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + 0, 2) + +#define ARM_SMCCC_ARCH_WORKAROUND_1 \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + 0, 0x8000) + +#define ARM_SMCCC_ARCH_WORKAROUND_2 \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + 0, 0x7fff) + +#define ARM_SMCCC_ARCH_WORKAROUND_3 \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + 0, 0x3fff) + +#define ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + ARM_SMCCC_OWNER_VENDOR_HYP, \ + ARM_SMCCC_FUNC_QUERY_CALL_UID) + + +/* KVM "vendor specific" services */ +#define ARM_SMCCC_KVM_FUNC_FEATURES 0 +#define ARM_SMCCC_KVM_FUNC_PTP 1 +/* Start of pKVM hypercall range */ +#define ARM_SMCCC_KVM_FUNC_HYP_MEMINFO 2 +#define ARM_SMCCC_KVM_FUNC_MEM_SHARE 3 +#define ARM_SMCCC_KVM_FUNC_MEM_UNSHARE 4 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_5 5 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_6 6 +#define ARM_SMCCC_KVM_FUNC_MMIO_GUARD 7 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_8 8 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_9 9 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_10 10 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_11 11 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_12 12 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_13 13 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_14 14 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_15 15 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_16 16 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_17 17 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_18 18 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_19 19 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_20 20 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_21 21 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_22 22 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_23 23 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_24 24 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_25 25 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_26 26 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_27 27 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_28 28 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_29 29 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_30 30 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_31 31 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_32 32 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_33 33 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_34 34 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_35 35 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_36 36 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_37 37 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_38 38 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_39 39 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_40 40 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_41 41 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_42 42 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_43 43 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_44 44 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_45 45 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_46 46 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_47 47 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_48 48 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_49 49 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_50 50 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_51 51 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_52 52 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_53 53 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_54 54 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_55 55 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_56 56 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_57 57 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_58 58 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_59 59 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_60 60 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_61 61 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_62 62 +#define ARM_SMCCC_KVM_FUNC_PKVM_RESV_63 63 +/* End of pKVM hypercall range */ +#define ARM_SMCCC_KVM_FUNC_DISCOVER_IMPL_VER 64 +#define ARM_SMCCC_KVM_FUNC_DISCOVER_IMPL_CPUS 65 + +#define ARM_SMCCC_KVM_FUNC_FEATURES_2 127 +#define ARM_SMCCC_KVM_NUM_FUNCS 128 + +#define ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + ARM_SMCCC_OWNER_VENDOR_HYP, \ + ARM_SMCCC_KVM_FUNC_FEATURES) + +#define SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED 1 + +/* + * ptp_kvm is a feature used for time sync between vm and host. + * ptp_kvm module in guest kernel will get service from host using + * this hypercall ID. + */ +#define ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + ARM_SMCCC_OWNER_VENDOR_HYP, \ + ARM_SMCCC_KVM_FUNC_PTP) + +#define ARM_SMCCC_VENDOR_HYP_KVM_HYP_MEMINFO_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_64, \ + ARM_SMCCC_OWNER_VENDOR_HYP, \ + ARM_SMCCC_KVM_FUNC_HYP_MEMINFO) + +#define ARM_SMCCC_VENDOR_HYP_KVM_MEM_SHARE_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_64, \ + ARM_SMCCC_OWNER_VENDOR_HYP, \ + ARM_SMCCC_KVM_FUNC_MEM_SHARE) + +#define ARM_SMCCC_VENDOR_HYP_KVM_MEM_UNSHARE_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_64, \ + ARM_SMCCC_OWNER_VENDOR_HYP, \ + ARM_SMCCC_KVM_FUNC_MEM_UNSHARE) + +#define ARM_SMCCC_VENDOR_HYP_KVM_MMIO_GUARD_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_64, \ + ARM_SMCCC_OWNER_VENDOR_HYP, \ + ARM_SMCCC_KVM_FUNC_MMIO_GUARD) + +#define ARM_SMCCC_VENDOR_HYP_KVM_DISCOVER_IMPL_VER_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_64, \ + ARM_SMCCC_OWNER_VENDOR_HYP, \ + ARM_SMCCC_KVM_FUNC_DISCOVER_IMPL_VER) + +#define ARM_SMCCC_VENDOR_HYP_KVM_DISCOVER_IMPL_CPUS_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_64, \ + ARM_SMCCC_OWNER_VENDOR_HYP, \ + ARM_SMCCC_KVM_FUNC_DISCOVER_IMPL_CPUS) + +/* ptp_kvm counter type ID */ +#define KVM_PTP_VIRT_COUNTER 0 +#define KVM_PTP_PHYS_COUNTER 1 + +/* Paravirtualised time calls (defined by ARM DEN0057A) */ +#define ARM_SMCCC_HV_PV_TIME_FEATURES \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_64, \ + ARM_SMCCC_OWNER_STANDARD_HYP, \ + 0x20) + +#define ARM_SMCCC_HV_PV_TIME_ST \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_64, \ + ARM_SMCCC_OWNER_STANDARD_HYP, \ + 0x21) + +/* TRNG entropy source calls (defined by ARM DEN0098) */ +#define ARM_SMCCC_TRNG_VERSION \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + ARM_SMCCC_OWNER_STANDARD, \ + 0x50) + +#define ARM_SMCCC_TRNG_FEATURES \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + ARM_SMCCC_OWNER_STANDARD, \ + 0x51) + +#define ARM_SMCCC_TRNG_GET_UUID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + ARM_SMCCC_OWNER_STANDARD, \ + 0x52) + +#define ARM_SMCCC_TRNG_RND32 \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + ARM_SMCCC_OWNER_STANDARD, \ + 0x53) + +#define ARM_SMCCC_TRNG_RND64 \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_64, \ + ARM_SMCCC_OWNER_STANDARD, \ + 0x53) + +/* + * Return codes defined in ARM DEN 0070A + * ARM DEN 0070A is now merged/consolidated into ARM DEN 0028 C + */ +#define SMCCC_RET_SUCCESS 0 +#define SMCCC_RET_NOT_SUPPORTED -1 +#define SMCCC_RET_NOT_REQUIRED -2 +#define SMCCC_RET_INVALID_PARAMETER -3 + +/** + * struct arm_smccc_res - Result from SMC/HVC call + * @a0-a3 result values from registers 0 to 3 + */ +struct arm_smccc_res { + unsigned long a0; + unsigned long a1; + unsigned long a2; + unsigned long a3; +}; + +#endif /*__LINUX_ARM_SMCCC_H*/ --=20 2.43.0 From nobody Mon Apr 6 09:13:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id DD7FF3DD518; Mon, 30 Mar 2026 14:24:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880666; cv=none; b=gNUjTuDE9QnYlPVDKgoDhnezYbyk0IO/mTCuNLasH6sJPmeJ3C0b6fpVvT1TyyukLdH9wj5DH+UYcrKyibMPgm5K0oR3Yo8eGishpezaq4jHMk5ooA/HMRb7rh11dPc42sS9fkNn4U7+cwnupuDBwoSAgDca1jsxqgz/8iTDRa8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880666; c=relaxed/simple; bh=Jy09jgbBZ0NtLoWAppmx87IBHL6F4I7aPwJ9L2m2ZNY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; 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[10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D27E93F915; Mon, 30 Mar 2026 07:24:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1774880664; bh=Jy09jgbBZ0NtLoWAppmx87IBHL6F4I7aPwJ9L2m2ZNY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lLoSujvWdjcdeVH3MJFwEQNZF1GmFbwmlM9sV3xN/JwuBWQlY2ZT1KYYT6u6ax79Q 0Pzf215xeQkKISQt2wrudzaeHnhEQf9rPTKekU9wphV2QaVXVqkl8lB0s8y9/ewTPm HIoqLK1/7+Q6wMQy3i8rl9vYvxJdZfuKAbeEA0cM= From: Suzuki K Poulose To: kvmarm@lists.linux.dev, will@kernel.org Cc: kvm@vger.kernel.org, alexandru.elisei@arm.com, oupton@kernel.org, maz@kernel.org, tabba@google.com, aneesh.kumar@kernel.org, linux-kernel@vger.kernel.org, Oliver Upton , Suzuki K Poulose Subject: [PATCH v7 07/17] arm64: Stash kvm_vcpu_init for later use Date: Mon, 30 Mar 2026 15:23:24 +0100 Message-ID: <20260330142334.3309961-8-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260330142334.3309961-1-suzuki.poulose@arm.com> References: <20260330142334.3309961-1-suzuki.poulose@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Oliver Upton A subsequent change will add support for resetting a vCPU, which requires reissuing the KVM_ARM_VCPU_INIT ioctl. Save the kvm_vcpu_init worked out for later use. Reviewed-by: Marc Zyngier Signed-off-by: Oliver Upton Signed-off-by: Suzuki K Poulose --- arm64/include/kvm/kvm-cpu-arch.h | 2 +- arm64/kvm-cpu.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arm64/include/kvm/kvm-cpu-arch.h b/arm64/include/kvm/kvm-cpu-a= rch.h index 1af394aa..2f189abc 100644 --- a/arm64/include/kvm/kvm-cpu-arch.h +++ b/arm64/include/kvm/kvm-cpu-arch.h @@ -17,7 +17,7 @@ struct kvm_cpu { pthread_t thread; =20 unsigned long cpu_id; - unsigned long cpu_type; + struct kvm_vcpu_init init; const char *cpu_compatible; =20 struct kvm *kvm; diff --git a/arm64/kvm-cpu.c b/arm64/kvm-cpu.c index 94c08a4d..3d914112 100644 --- a/arm64/kvm-cpu.c +++ b/arm64/kvm-cpu.c @@ -194,7 +194,7 @@ struct kvm_cpu *kvm_cpu__arch_init(struct kvm *kvm, uns= igned long cpu_id) /* Populate the vcpu structure. */ vcpu->kvm =3D kvm; vcpu->cpu_id =3D cpu_id; - vcpu->cpu_type =3D vcpu_init.target; + vcpu->init =3D vcpu_init; vcpu->cpu_compatible =3D target->compatible; vcpu->is_running =3D true; =20 --=20 2.43.0 From nobody Mon Apr 6 09:13:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E65ED3D9DA0; Mon, 30 Mar 2026 14:24:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880668; cv=none; b=nYTcpIljllj34n5f75oWS+MoKSWpp9q2w01FIU1OYHv2SkfAoqaci8h5qeQh/IIZJzuQFk4dv/ZUWS+ilHgOVqlM8IGGBPaEI+hjjJ5xlfZ4S2yQ/XRSeDDz63HjYyulAD4tdq3ONe3TgBwAn+HJkLkvA/3+1SFEz39tkKAzvqM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880668; c=relaxed/simple; bh=qGLvB00ZHRhBLyIPTlP+4u3c9g38wfqMl89bfux33vo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=gqeEewOzObu9y7B+FxhkthM499m2tqxBqc/5HTX+w04odin8XF11c59ImdZZKVkCxmkno7IFSM7VLBdQ9blKF6+2bNBBiOzzqF11gn8H1lVJJOmMGoiBWvNIlumXOTrZCPeoQ4/XJiiLob6QaNYzkmce2R/bZnxMoqniK0hZSwE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=bHFQ7URq; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="bHFQ7URq" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 86C971E7D; Mon, 30 Mar 2026 07:24:20 -0700 (PDT) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C521A3F915; Mon, 30 Mar 2026 07:24:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1774880666; bh=qGLvB00ZHRhBLyIPTlP+4u3c9g38wfqMl89bfux33vo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bHFQ7URqfWWfaTZMCwV/J++ssPsLmXIonQD1zZFZAjrgQb8YRudd0ZOWvfL1dw7oH VXcOffFdVyZM6QgXqRcd936ZGDnTRDtbHAVgmQiehRHpSdyPsJA+A1MyWpBgoYhECF RorYs1QimIy3YF9qTogzQF88YEQCOytWl+EK5VD4= From: Suzuki K Poulose To: kvmarm@lists.linux.dev, will@kernel.org Cc: kvm@vger.kernel.org, alexandru.elisei@arm.com, oupton@kernel.org, maz@kernel.org, tabba@google.com, aneesh.kumar@kernel.org, linux-kernel@vger.kernel.org, Oliver Upton , Suzuki K Poulose Subject: [PATCH v7 08/17] arm64: Use KVM_SET_MP_STATE ioctl to power off non-boot vCPUs Date: Mon, 30 Mar 2026 15:23:25 +0100 Message-ID: <20260330142334.3309961-9-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260330142334.3309961-1-suzuki.poulose@arm.com> References: <20260330142334.3309961-1-suzuki.poulose@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Oliver Upton Using the POWER_OFF flag in kvm_vcpu_init gets in the way of resetting a vCPU in response to a PSCI CPU_ON call, for obvious reasons. Drop the flag in favor of using the KVM_SET_MP_STATE call for non-boot vCPUs. Reviewed-by: Marc Zyngier Signed-off-by: Oliver Upton Signed-off-by: Suzuki K Poulose --- arm64/kvm-cpu.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/arm64/kvm-cpu.c b/arm64/kvm-cpu.c index 3d914112..c7286484 100644 --- a/arm64/kvm-cpu.c +++ b/arm64/kvm-cpu.c @@ -143,10 +143,6 @@ struct kvm_cpu *kvm_cpu__arch_init(struct kvm *kvm, un= signed long cpu_id) if (vcpu->kvm_run =3D=3D MAP_FAILED) die("unable to mmap vcpu fd"); =20 - /* VCPU 0 is the boot CPU, the others start in a poweroff state. */ - if (cpu_id > 0) - vcpu_init.features[0] |=3D (1UL << KVM_ARM_VCPU_POWER_OFF); - /* Set KVM_ARM_VCPU_PSCI_0_2 if available */ if (kvm__supports_extension(kvm, KVM_CAP_ARM_PSCI_0_2)) { vcpu_init.features[0] |=3D (1UL << KVM_ARM_VCPU_PSCI_0_2); @@ -201,6 +197,16 @@ struct kvm_cpu *kvm_cpu__arch_init(struct kvm *kvm, un= signed long cpu_id) if (err || target->init(vcpu)) die("Unable to initialise vcpu"); =20 + /* VCPU 0 is the boot CPU, the others start in a poweroff state. */ + if (cpu_id > 0) { + struct kvm_mp_state mp_state =3D { + .mp_state =3D KVM_MP_STATE_STOPPED, + }; + + if (ioctl(vcpu->vcpu_fd, KVM_SET_MP_STATE, &mp_state)) + die_perror("KVM_SET_MP_STATE failed"); + } + coalesced_offset =3D ioctl(kvm->sys_fd, KVM_CHECK_EXTENSION, KVM_CAP_COALESCED_MMIO); if (coalesced_offset) --=20 2.43.0 From nobody Mon Apr 6 09:13:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 108A33DD507; Mon, 30 Mar 2026 14:24:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880671; cv=none; b=HPoeVHEsXkO7tQUQk36Nnq9c6gY8CrGjeCLkcQJJfYjTVIPfCGgHzYf31Jk/C0/u4PmKquwTFspQumT2fm/pzs1fGmo+BI/zW/+xXpVewMTzGxkmwQHf5vSLUEqD9f53BAZtU1R8V2U4b4lHtTi69E9R9HbZUhb7fIl11f60dnc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880671; c=relaxed/simple; bh=BJTh6DKRdNRnnZiU+awboJjKpWQvo2Ulr87xVd5p0Eo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=uboXxZz32A1w0jfXpGO6kNIJjtWbezkrIBQ73Aoj8ZwM7so7I++21UVs76Tg1Zpji4GwmlwWLUXyWC4hQHxXtMe080742LYyj7fl/oyzgIrYUTrhHwX7pio8Buzvw3zW+p0utxPhEKLGupYXnnmi8YZZXlXVAjOfLWMiLdB0Fso= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=op6uGJcs; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="op6uGJcs" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 781271D15; Mon, 30 Mar 2026 07:24:22 -0700 (PDT) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B65CE3F915; Mon, 30 Mar 2026 07:24:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1774880668; bh=BJTh6DKRdNRnnZiU+awboJjKpWQvo2Ulr87xVd5p0Eo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=op6uGJcsCoC+oexn5V0m+uTLCRQqw7yP4VUkBkN6C1vnxaNIQUcBWnb506UyTS6bZ WnhkcrYS7SvZofhPBZafYlt3scuHrxnwCLPeqVRthhLMGMp1Qd2OFTOA9b7WAGFRGW lZ+AOTEg7blf6tzP9ItgmKOBTpHbp/TLSevtiNbo= From: Suzuki K Poulose To: kvmarm@lists.linux.dev, will@kernel.org Cc: kvm@vger.kernel.org, alexandru.elisei@arm.com, oupton@kernel.org, maz@kernel.org, tabba@google.com, aneesh.kumar@kernel.org, linux-kernel@vger.kernel.org, Oliver Upton , Suzuki K Poulose Subject: [PATCH v7 09/17] arm64: Expose ARM64_CORE_REG() for general use Date: Mon, 30 Mar 2026 15:23:26 +0100 Message-ID: <20260330142334.3309961-10-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260330142334.3309961-1-suzuki.poulose@arm.com> References: <20260330142334.3309961-1-suzuki.poulose@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Oliver Upton Expose the macro such that it may be used to get SMCCC arguments in a future change. Reviewed-by: Marc Zyngier Signed-off-by: Oliver Upton Signed-off-by: Suzuki K Poulose --- arm64/include/kvm/kvm-cpu-arch.h | 16 ++++++++++++++++ arm64/kvm-cpu.c | 16 ---------------- 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/arm64/include/kvm/kvm-cpu-arch.h b/arm64/include/kvm/kvm-cpu-a= rch.h index 2f189abc..dbd90647 100644 --- a/arm64/include/kvm/kvm-cpu-arch.h +++ b/arm64/include/kvm/kvm-cpu-arch.h @@ -67,4 +67,20 @@ unsigned long kvm_cpu__get_vcpu_mpidr(struct kvm_cpu *vc= pu); int kvm_cpu__setup_pvtime(struct kvm_cpu *vcpu); int kvm_cpu__teardown_pvtime(struct kvm *kvm); =20 +static inline __u64 __core_reg_id(__u64 offset) +{ + __u64 id =3D KVM_REG_ARM64 | KVM_REG_ARM_CORE | offset; + + if (offset < KVM_REG_ARM_CORE_REG(fp_regs)) + id |=3D KVM_REG_SIZE_U64; + else if (offset < KVM_REG_ARM_CORE_REG(fp_regs.fpsr)) + id |=3D KVM_REG_SIZE_U128; + else + id |=3D KVM_REG_SIZE_U32; + + return id; +} + +#define ARM64_CORE_REG(x) __core_reg_id(KVM_REG_ARM_CORE_REG(x)) + #endif /* ARM_COMMON__KVM_CPU_ARCH_H */ diff --git a/arm64/kvm-cpu.c b/arm64/kvm-cpu.c index c7286484..f8e08b5d 100644 --- a/arm64/kvm-cpu.c +++ b/arm64/kvm-cpu.c @@ -238,22 +238,6 @@ void kvm_cpu__show_page_tables(struct kvm_cpu *vcpu) { } =20 -static __u64 __core_reg_id(__u64 offset) -{ - __u64 id =3D KVM_REG_ARM64 | KVM_REG_ARM_CORE | offset; - - if (offset < KVM_REG_ARM_CORE_REG(fp_regs)) - id |=3D KVM_REG_SIZE_U64; - else if (offset < KVM_REG_ARM_CORE_REG(fp_regs.fpsr)) - id |=3D KVM_REG_SIZE_U128; - else - id |=3D KVM_REG_SIZE_U32; - - return id; -} - -#define ARM64_CORE_REG(x) __core_reg_id(KVM_REG_ARM_CORE_REG(x)) - unsigned long kvm_cpu__get_vcpu_mpidr(struct kvm_cpu *vcpu) { struct kvm_one_reg reg; --=20 2.43.0 From nobody Mon Apr 6 09:13:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B8CFC3A3806; Mon, 30 Mar 2026 14:24:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880672; cv=none; b=i0cClXt3liDVIF1UNoG0NzIlL5fAoZ+iiQfxD62sL4hFhg2qLWZlJZRKtoa8j5jqvGdARoldvws//WIk/hcwOVHO+MnToqhYYKKnKAn0lGSWf4tf4ObSrfNSgy9UKYwp0suO+TmuH6MLrfwx5188UI8mab+sa1sZ/5QJoAZ7FdQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880672; c=relaxed/simple; bh=btyywYT33i0Lf9IQcTmns7XcT2/j2rYyQM4kWBIrhUg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JQYZFqB1SlpDcEQiMSzYl14MR8sqHiEYz1AwxVr4nZ16kngLXHDFouRALSTSIpWvuqVag1x81/pDb+AvYjT1w88oB8P/pqrRpm07mJyHplLRQe1cBxUsJ/hlyFOb6mBJavfEvp2AMi3eA3RSL2dNryFvZClGbiC41xxb353YrQs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=EAA36QMk; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="EAA36QMk" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6AA8D4515; Mon, 30 Mar 2026 07:24:24 -0700 (PDT) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A80303F915; Mon, 30 Mar 2026 07:24:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1774880670; bh=btyywYT33i0Lf9IQcTmns7XcT2/j2rYyQM4kWBIrhUg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EAA36QMk5sjUmxsRfM8VyYonNIzqXtESdGFDdyGD4vJ2wcAGVpMOe4XPopd3B6Anc /nmqbCaSgDwJgFNQTq2oCv0PWNiCwupIPMHyyXPKvJt1y8N9mUb53ak447aSmMD2I6 TP5x2cnIyhxAr4RGdwKAUSwWTQtSHvnz4sMQ5tvA= From: Suzuki K Poulose To: kvmarm@lists.linux.dev, will@kernel.org Cc: kvm@vger.kernel.org, alexandru.elisei@arm.com, oupton@kernel.org, maz@kernel.org, tabba@google.com, aneesh.kumar@kernel.org, linux-kernel@vger.kernel.org, Oliver Upton , Suzuki K Poulose Subject: [PATCH v7 10/17] arm64: Add support for finding vCPU for given MPIDR Date: Mon, 30 Mar 2026 15:23:27 +0100 Message-ID: <20260330142334.3309961-11-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260330142334.3309961-1-suzuki.poulose@arm.com> References: <20260330142334.3309961-1-suzuki.poulose@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Oliver Upton Some PSCI calls take an MPIDR affinity as an argument. Add a helper to get the vCPU that matches an MPIDR so we can find the intended recipient. Reviewed-by: Marc Zyngier Signed-off-by: Oliver Upton Signed-off-by: Suzuki K Poulose --- arm64/include/kvm/kvm-arch.h | 2 ++ arm64/kvm.c | 17 +++++++++++++++++ 2 files changed, 19 insertions(+) diff --git a/arm64/include/kvm/kvm-arch.h b/arm64/include/kvm/kvm-arch.h index 8f508ef8..a50e6a4f 100644 --- a/arm64/include/kvm/kvm-arch.h +++ b/arm64/include/kvm/kvm-arch.h @@ -114,4 +114,6 @@ struct kvm_arch { cpu_set_t *vcpu_affinity_cpuset; }; =20 +struct kvm_cpu *kvm__arch_mpidr_to_vcpu(struct kvm *kvm, u64 target_mpidr); + #endif /* ARM_COMMON__KVM_ARCH_H */ diff --git a/arm64/kvm.c b/arm64/kvm.c index 23b4dab1..41c47b13 100644 --- a/arm64/kvm.c +++ b/arm64/kvm.c @@ -5,6 +5,7 @@ #include "kvm/virtio-console.h" #include "kvm/fdt.h" #include "kvm/gic.h" +#include "kvm/kvm-cpu.h" =20 #include #include @@ -128,6 +129,22 @@ void kvm__arch_init(struct kvm *kvm) kvm__arch_enable_mte(kvm); } =20 + +struct kvm_cpu *kvm__arch_mpidr_to_vcpu(struct kvm *kvm, u64 target_mpidr) +{ + int i; + + for (i =3D 0; i < kvm->nrcpus; i++) { + struct kvm_cpu *tmp =3D kvm->cpus[i]; + u64 mpidr =3D kvm_cpu__get_vcpu_mpidr(tmp) & ARM_MPIDR_HWID_BITMASK; + + if (mpidr =3D=3D target_mpidr) + return tmp; + } + + return NULL; +} + static u64 kvm__arch_get_payload_region_size(struct kvm *kvm) { if (kvm->cfg.arch.aarch32_guest) --=20 2.43.0 From nobody Mon Apr 6 09:13:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id BE0043DEFF0; Mon, 30 Mar 2026 14:24:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880675; cv=none; b=m9asprYEYoSJFZ1TGhSFOpI6eYJ817EQiN+RiUfPpSTfE4tM2v3FbeLk09SGhXGNm37+44Vb+bsbJug2t6sgF/P844p6oOFryuepECeKldxDfhob3EXWAoqYvfVUvoAyPdw0iy9WBIB5wMnOeAKdaZDoXDoJgeJP7HWcB7WBcRo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880675; c=relaxed/simple; bh=BvzGUje05ZB+KN1UmGEoAnRfJHb/w/1zL4rddFo/53g=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=L3MU3DxE6VkYFE/1BHkQK7OjnjYdHXWD2F0bPTwZz6aicb8X6gg8aXaNYaNmklJ8XISAhLVFbMHOYvomHIxomrlyDQdQ37vkLuirubIjkGqQ7Yui6aGMReicqA4oORELZkLNmOyygLHXU2dKV9IYK5Va3n7+L0Cv8ZWVL1vfw+8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=dtAtRg0d; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="dtAtRg0d" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6032B3562; Mon, 30 Mar 2026 07:24:26 -0700 (PDT) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 9AC903F915; Mon, 30 Mar 2026 07:24:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1774880672; bh=BvzGUje05ZB+KN1UmGEoAnRfJHb/w/1zL4rddFo/53g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dtAtRg0dz8Wr6LM+lxN1iF5PNC66Tijp1kTTB8iCQwSXYzPfaRckbmzcew/fMxBd+ sJobSZswFheNjKI52zPrXsUIa4tPgOJ2bBVIT4pdg55Qvf9dugXKw6ddLwPy12sIll PWKaz+Q/kpktra+RIAp3KWtvIkvTYpN/6yvNfrwE= From: Suzuki K Poulose To: kvmarm@lists.linux.dev, will@kernel.org Cc: kvm@vger.kernel.org, alexandru.elisei@arm.com, oupton@kernel.org, maz@kernel.org, tabba@google.com, aneesh.kumar@kernel.org, linux-kernel@vger.kernel.org, Oliver Upton , Suzuki K Poulose Subject: [PATCH v7 11/17] arm64: Add skeleton implementation for PSCI Date: Mon, 30 Mar 2026 15:23:28 +0100 Message-ID: <20260330142334.3309961-12-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260330142334.3309961-1-suzuki.poulose@arm.com> References: <20260330142334.3309961-1-suzuki.poulose@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Oliver Upton Add an extremely barebones implementation for handling PSCI, where the only supported call is PSCI_VERSION. Reviewed-by: Marc Zyngier Signed-off-by: Oliver Upton Signed-off-by: Suzuki K Poulose --- Makefile | 2 ++ arm64/include/asm/smccc.h | 65 ++++++++++++++++++++++++++++++++++++ arm64/kvm-cpu.c | 19 ++++++++--- arm64/kvm.c | 3 ++ arm64/psci.c | 69 +++++++++++++++++++++++++++++++++++++++ arm64/smccc.c | 44 +++++++++++++++++++++++++ 6 files changed, 197 insertions(+), 5 deletions(-) create mode 100644 arm64/include/asm/smccc.h create mode 100644 arm64/psci.c create mode 100644 arm64/smccc.c diff --git a/Makefile b/Makefile index 60e551fd..1c0e7f55 100644 --- a/Makefile +++ b/Makefile @@ -181,6 +181,8 @@ ifeq ($(ARCH), arm64) OBJS +=3D arm64/arm-cpu.o OBJS +=3D arm64/pvtime.o OBJS +=3D arm64/pmu.o + OBJS +=3D arm64/psci.o + OBJS +=3D arm64/smccc.o ARCH_INCLUDE :=3D arm64/include =20 ARCH_WANT_LIBFDT :=3D y diff --git a/arm64/include/asm/smccc.h b/arm64/include/asm/smccc.h new file mode 100644 index 00000000..c1be21a7 --- /dev/null +++ b/arm64/include/asm/smccc.h @@ -0,0 +1,65 @@ +#ifndef __ARM_SMCCC_H__ +#define __ARM_SMCCC_H__ + +#include "kvm/kvm-cpu.h" + +#include +#include + +static inline bool smccc_is_64bit(struct kvm_cpu *vcpu) +{ + return ARM_SMCCC_IS_64(vcpu->kvm_run->hypercall.nr); +} + +static inline bool smccc_calling_conv_allowed(struct kvm_cpu *vcpu, u32 fn) +{ + return !(vcpu->kvm->cfg.arch.aarch32_guest && ARM_SMCCC_IS_64(fn)); +} + +static inline u64 smccc_get_arg(struct kvm_cpu *vcpu, u8 arg) +{ + u64 val; + struct kvm_one_reg reg =3D { + .id =3D ARM64_CORE_REG(regs.regs[arg]), + .addr =3D (u64)&val, + }; + + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®)) + die_perror("KVM_GET_ONE_REG failed"); + + if (!smccc_is_64bit(vcpu)) + val =3D (u32)val; + + return val; +} + +static inline void smccc_return_result(struct kvm_cpu *vcpu, struct arm_sm= ccc_res *res) +{ + unsigned long *vals =3D (unsigned long *)res; + unsigned long i; + + /* + * The author was lazy and chose to abuse the layout of struct + * arm_smccc_res to write a loop set the retvals. + */ + for (i =3D 0; i < sizeof(*res) / sizeof(unsigned long); i++) { + u64 val =3D vals[i]; + struct kvm_one_reg reg =3D { + .id =3D ARM64_CORE_REG(regs.regs[i]), + .addr =3D (u64)&val, + }; + + if (!smccc_is_64bit(vcpu)) + val =3D (u32)val; + + if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®)) + die_perror("KVM_SET_ONE_REG failed"); + } +} + +bool handle_hypercall(struct kvm_cpu *vcpu); +void handle_psci(struct kvm_cpu *vcpu, struct arm_smccc_res *res); + +void kvm__setup_smccc(struct kvm *kvm); + +#endif /* __ARM_SMCCC_H__ */ diff --git a/arm64/kvm-cpu.c b/arm64/kvm-cpu.c index f8e08b5d..6cd058fa 100644 --- a/arm64/kvm-cpu.c +++ b/arm64/kvm-cpu.c @@ -1,6 +1,7 @@ #include "kvm/kvm.h" #include "kvm/kvm-cpu.h" #include "kvm/virtio.h" +#include "asm/smccc.h" =20 #include #include @@ -229,11 +230,6 @@ void kvm_cpu__delete(struct kvm_cpu *vcpu) free(vcpu); } =20 -bool kvm_cpu__handle_exit(struct kvm_cpu *vcpu) -{ - return false; -} - void kvm_cpu__show_page_tables(struct kvm_cpu *vcpu) { } @@ -469,3 +465,16 @@ void kvm_cpu__show_registers(struct kvm_cpu *vcpu) die("KVM_GET_ONE_REG failed (lr)"); dprintf(debug_fd, " LR: 0x%lx\n", data); } + +bool kvm_cpu__handle_exit(struct kvm_cpu *vcpu) +{ + struct kvm_run *run =3D vcpu->kvm_run; + + switch (run->exit_reason) { + case KVM_EXIT_HYPERCALL: + handle_hypercall(vcpu); + return true; + default: + return false; + } +} diff --git a/arm64/kvm.c b/arm64/kvm.c index 41c47b13..56e4f149 100644 --- a/arm64/kvm.c +++ b/arm64/kvm.c @@ -7,6 +7,8 @@ #include "kvm/gic.h" #include "kvm/kvm-cpu.h" =20 +#include "asm/smccc.h" + #include #include #include @@ -127,6 +129,7 @@ void kvm__arch_init(struct kvm *kvm) die("Failed to create virtual GIC"); =20 kvm__arch_enable_mte(kvm); + kvm__setup_smccc(kvm); } =20 =20 diff --git a/arm64/psci.c b/arm64/psci.c new file mode 100644 index 00000000..72429b36 --- /dev/null +++ b/arm64/psci.c @@ -0,0 +1,69 @@ +#include "asm/smccc.h" +#include "kvm/kvm.h" +#include "kvm/kvm-cpu.h" +#include "kvm/util.h" + +#include +#include + +static void psci_features(struct kvm_cpu *vcpu, struct arm_smccc_res *res) +{ + u32 arg =3D smccc_get_arg(vcpu, 1); + + res->a0 =3D PSCI_RET_NOT_SUPPORTED; + if (!smccc_calling_conv_allowed(vcpu, arg)) + return; + + switch (arg) { + case PSCI_0_2_FN_CPU_SUSPEND: + case PSCI_0_2_FN64_CPU_SUSPEND: + case PSCI_0_2_FN_CPU_OFF: + case ARM_SMCCC_VERSION_FUNC_ID: + res->a0 =3D PSCI_RET_SUCCESS; + break; + } +} + +static void cpu_suspend(struct kvm_cpu *vcpu, struct arm_smccc_res *res) +{ + struct kvm_mp_state mp_state =3D { + .mp_state =3D KVM_MP_STATE_SUSPENDED, + }; + + /* Rely on in-kernel emulation of a 'suspended' (i.e. WFI) state. */ + if (ioctl(vcpu->vcpu_fd, KVM_SET_MP_STATE, &mp_state)) + die_perror("KVM_SET_MP_STATE failed"); + + res->a0 =3D PSCI_RET_SUCCESS; +} + +static void cpu_off(struct kvm_cpu *vcpu, struct arm_smccc_res *res) +{ + struct kvm_mp_state mp_state =3D { + .mp_state =3D KVM_MP_STATE_STOPPED, + }; + + if (ioctl(vcpu->vcpu_fd, KVM_SET_MP_STATE, &mp_state)) + die_perror("KVM_SET_MP_STATE failed"); +} + +void handle_psci(struct kvm_cpu *vcpu, struct arm_smccc_res *res) +{ + switch (vcpu->kvm_run->hypercall.nr) { + case PSCI_0_2_FN_PSCI_VERSION: + res->a0 =3D PSCI_VERSION(1, 0); + break; + case PSCI_1_0_FN_PSCI_FEATURES: + psci_features(vcpu, res); + break; + case PSCI_0_2_FN_CPU_SUSPEND: + case PSCI_0_2_FN64_CPU_SUSPEND: + cpu_suspend(vcpu, res); + break; + case PSCI_0_2_FN_CPU_OFF: + cpu_off(vcpu, res); + break; + default: + res->a0 =3D PSCI_RET_NOT_SUPPORTED; + } +} diff --git a/arm64/smccc.c b/arm64/smccc.c new file mode 100644 index 00000000..ef986d8c --- /dev/null +++ b/arm64/smccc.c @@ -0,0 +1,44 @@ +#include "asm/smccc.h" +#include "kvm/kvm.h" +#include "kvm/kvm-cpu.h" +#include "kvm/util.h" + +#include + +static void handle_std_call(struct kvm_cpu *vcpu, struct arm_smccc_res *re= s) +{ + u32 fn =3D vcpu->kvm_run->hypercall.nr; + + switch (ARM_SMCCC_FUNC_NUM(fn)) { + /* PSCI */ + case 0x00 ... 0x1F: + handle_psci(vcpu, res); + break; + } +} + +bool handle_hypercall(struct kvm_cpu *vcpu) +{ + u32 fn =3D vcpu->kvm_run->hypercall.nr; + struct arm_smccc_res res =3D { + .a0 =3D SMCCC_RET_NOT_SUPPORTED, + }; + + if (!smccc_calling_conv_allowed(vcpu, fn)) + goto out; + + switch (ARM_SMCCC_OWNER_NUM(fn)) { + case ARM_SMCCC_OWNER_STANDARD: + handle_std_call(vcpu, &res); + break; + } + +out: + smccc_return_result(vcpu, &res); + return true; +} + +void kvm__setup_smccc(struct kvm *kvm) +{ + +} --=20 2.43.0 From nobody Mon Apr 6 09:13:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id CC47E3DFC81; Mon, 30 Mar 2026 14:24:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880677; cv=none; b=IkIyUv5g1bhuQWHsGmrtxaBpMUH3ZfsFL1wuW+2UaG9QLlnOK3ofT5W+a6y+LSQHlgSr9VoALPNAmdnykmPdVnWJBJnLTIQHO8ggXDfVJI2eiIduvPbHl9c+DsIXeXVWb/qao5PTnGkoWhv5YqPB4S98kLkGoTXnmYSDLdoixXA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880677; c=relaxed/simple; bh=nM7LKJkevkOMctRsGY6BgPVCW4ki3JK1AoyQ7rAkiQE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=QhAbVLI8YJoyPCQ6NSO+HP0tB6mfkBpmhhLCSqBq5fY2aN6sWawYTza+zI374IUoURh2vTz660e6vK5dB4unCTCLmQk68JgG7KiuAjlrrtA7ZZRF5yRju7Bc1Pa8Y7H+khbkmEVO2J89JCZbbPSRrwQDfgfxZ4T7f+tT4PObOQQ= ARC-Authentication-Results: i=1; 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h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ssqi/RZT5qzBhnQW2m1UhNFLk4Btv3Ezi9/3LlIiqIt7myD+H6fHFlMWf+u9m+Eg0 wOa0W3S79Z1HPWw241rJhWLVk8PzWOCRvsCVEjy7NdEsSkaeP1VkrWGqdF4ducxo9v gAjuB8xndVjRuyjZ80sbl7tVaJSqs5MAgsdwqKsQ= From: Suzuki K Poulose To: kvmarm@lists.linux.dev, will@kernel.org Cc: kvm@vger.kernel.org, alexandru.elisei@arm.com, oupton@kernel.org, maz@kernel.org, tabba@google.com, aneesh.kumar@kernel.org, linux-kernel@vger.kernel.org, Oliver Upton , Suzuki K Poulose Subject: [PATCH v7 12/17] arm64: psci: Implement CPU_SUSPEND Date: Mon, 30 Mar 2026 15:23:29 +0100 Message-ID: <20260330142334.3309961-13-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260330142334.3309961-1-suzuki.poulose@arm.com> References: <20260330142334.3309961-1-suzuki.poulose@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Oliver Upton Implement support for PSCI CPU_SUSPEND, leveraging in-kernel suspend emulation (i.e. a WFI state). Eagerly resume the vCPU for any wakeup event. Reviewed-by: Marc Zyngier Signed-off-by: Oliver Upton Signed-off-by: Suzuki K Poulose --- kvm-cpu.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/kvm-cpu.c b/kvm-cpu.c index 7362f2e9..d718ef60 100644 --- a/kvm-cpu.c +++ b/kvm-cpu.c @@ -143,6 +143,16 @@ void kvm_cpu__run_on_all_cpus(struct kvm *kvm, struct = kvm_cpu_task *task) mutex_unlock(&task_lock); } =20 +static void handle_wakeup(struct kvm_cpu *vcpu) +{ + struct kvm_mp_state mp_state =3D { + .mp_state =3D KVM_MP_STATE_RUNNABLE, + }; + + if (ioctl(vcpu->vcpu_fd, KVM_SET_MP_STATE, &mp_state)) + die_perror("KVM_SET_MP_STATE failed"); +} + int kvm_cpu__start(struct kvm_cpu *cpu) { sigset_t sigset; @@ -236,6 +246,9 @@ int kvm_cpu__start(struct kvm_cpu *cpu) */ kvm__reboot(cpu->kvm); goto exit_kvm; + case KVM_SYSTEM_EVENT_WAKEUP: + handle_wakeup(cpu); + break; }; break; default: { --=20 2.43.0 From nobody Mon Apr 6 09:13:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id BAAF73DFC8E; Mon, 30 Mar 2026 14:24:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880678; cv=none; b=l7QxSoX4jGcliz8Sjm5hzFl1ztkX2CEdmOhrRjJovC3SZ3fjlWZmwAw16zPagRmngQmq03awMLbDyxw7SUjt+O/dYQPefbklDjW8Qp9l4ffrZILVOR+aMm3KfVXe2/7oPR6gWpe8g5YEpHivwTBdzXTJeL1ah/Z/ZdatzZsGrRY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880678; c=relaxed/simple; bh=0wb/UP6K5ikFmLshj6PNreIcmQ3EuRsKvxwe6jyPGMQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OAv6gvzfi20TxwhVhtQKq4LmSiIb/o7hzvwYQYJ4Q8AiRo6qsrEPtmra8PkSyva8TcTvi6I+mvD2s5jZOSNjVzCku9wiS1+EyGPb0gZqjr8SyrPmfsWLdQlwcanV9DsuQXPkDveVO/+pzX26yh7xVy9UYUKFoypV6kvOohKixCA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=GDuQsqaL; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="GDuQsqaL" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 46BDF1E7D; Mon, 30 Mar 2026 07:24:30 -0700 (PDT) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 855023F915; Mon, 30 Mar 2026 07:24:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1774880676; bh=0wb/UP6K5ikFmLshj6PNreIcmQ3EuRsKvxwe6jyPGMQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GDuQsqaLNSKZT0qt/E3z/vZHAUI+d3hMr7S5ojNrShnsdE686HFAfnvwN8kgOW8ut 7H9itu21+RaUBOW/OVHb56T/kkYfzMscsrNcAK8lPLz3RJ6UanUEbITsCOSMayFwqx DARwqwyPNg/k00rE1r96jy1I8ANFjrXQFnVO9oxA= From: Suzuki K Poulose To: kvmarm@lists.linux.dev, will@kernel.org Cc: kvm@vger.kernel.org, alexandru.elisei@arm.com, oupton@kernel.org, maz@kernel.org, tabba@google.com, aneesh.kumar@kernel.org, linux-kernel@vger.kernel.org, Oliver Upton , Suzuki K Poulose Subject: [PATCH v7 13/17] arm64: psci: Implement CPU_ON Date: Mon, 30 Mar 2026 15:23:30 +0100 Message-ID: <20260330142334.3309961-14-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260330142334.3309961-1-suzuki.poulose@arm.com> References: <20260330142334.3309961-1-suzuki.poulose@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Oliver Upton Add support for the PSCI CPU_ON call, wherein a caller can power on a targeted CPU and reset it with the provided context (i.e. entrypoint and context id). Rely on the KVM_ARM_VCPU_INIT ioctl, which has the effect of an architectural warm reset, to do the heavy lifting. Reviewed-by: Marc Zyngier Signed-off-by: Oliver Upton Signed-off-by: Suzuki K Poulose --- arm64/psci.c | 68 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arm64/psci.c b/arm64/psci.c index 72429b36..14c98639 100644 --- a/arm64/psci.c +++ b/arm64/psci.c @@ -18,6 +18,8 @@ static void psci_features(struct kvm_cpu *vcpu, struct ar= m_smccc_res *res) case PSCI_0_2_FN_CPU_SUSPEND: case PSCI_0_2_FN64_CPU_SUSPEND: case PSCI_0_2_FN_CPU_OFF: + case PSCI_0_2_FN_CPU_ON: + case PSCI_0_2_FN64_CPU_ON: case ARM_SMCCC_VERSION_FUNC_ID: res->a0 =3D PSCI_RET_SUCCESS; break; @@ -47,6 +49,68 @@ static void cpu_off(struct kvm_cpu *vcpu, struct arm_smc= cc_res *res) die_perror("KVM_SET_MP_STATE failed"); } =20 +static void reset_cpu_with_context(struct kvm_cpu *vcpu, u64 entry_addr, u= 64 ctx_id) +{ + struct kvm_one_reg reg; + + if (ioctl(vcpu->vcpu_fd, KVM_ARM_VCPU_INIT, &vcpu->init)) + die_perror("KVM_ARM_VCPU_INIT failed"); + + reg =3D (struct kvm_one_reg) { + .id =3D ARM64_CORE_REG(regs.pc), + .addr =3D (u64)&entry_addr, + }; + if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®)) + die_perror("KVM_SET_ONE_REG failed"); + + reg =3D (struct kvm_one_reg) { + .id =3D ARM64_CORE_REG(regs.regs[0]), + .addr =3D (u64)&ctx_id, + }; + if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®)) + die_perror("KVM_SET_ONE_REG failed"); +} + +static bool psci_valid_affinity(u64 affinity) +{ + return !(affinity & ~ARM_MPIDR_HWID_BITMASK); +} + +static void cpu_on(struct kvm_cpu *vcpu, struct arm_smccc_res *res) +{ + u64 target_mpidr =3D smccc_get_arg(vcpu, 1); + u64 entry_addr =3D smccc_get_arg(vcpu, 2); + u64 ctx_id =3D smccc_get_arg(vcpu, 3); + struct kvm_mp_state mp_state; + struct kvm_cpu *target; + + if (!psci_valid_affinity(target_mpidr)) { + res->a0 =3D PSCI_RET_INVALID_PARAMS; + return; + } + + kvm__pause(vcpu->kvm); + + target =3D kvm__arch_mpidr_to_vcpu(vcpu->kvm, target_mpidr); + if (!target) { + res->a0 =3D PSCI_RET_INVALID_PARAMS; + goto out_continue; + } + + if (ioctl(target->vcpu_fd, KVM_GET_MP_STATE, &mp_state)) + die_perror("KVM_GET_MP_STATE failed"); + + if (mp_state.mp_state !=3D KVM_MP_STATE_STOPPED) { + res->a0 =3D PSCI_RET_ALREADY_ON; + goto out_continue; + } + + reset_cpu_with_context(target, entry_addr, ctx_id); + res->a0 =3D PSCI_RET_SUCCESS; +out_continue: + kvm__continue(vcpu->kvm); +} + void handle_psci(struct kvm_cpu *vcpu, struct arm_smccc_res *res) { switch (vcpu->kvm_run->hypercall.nr) { @@ -63,6 +127,10 @@ void handle_psci(struct kvm_cpu *vcpu, struct arm_smccc= _res *res) case PSCI_0_2_FN_CPU_OFF: cpu_off(vcpu, res); break; + case PSCI_0_2_FN_CPU_ON: + case PSCI_0_2_FN64_CPU_ON: + cpu_on(vcpu, res); + break; default: res->a0 =3D PSCI_RET_NOT_SUPPORTED; } --=20 2.43.0 From nobody Mon Apr 6 09:13:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A364E3E025B; Mon, 30 Mar 2026 14:24:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="AWXAlNk9" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 364E04515; Mon, 30 Mar 2026 07:24:32 -0700 (PDT) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 74C563F915; Mon, 30 Mar 2026 07:24:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1774880678; bh=buXKF6E8KWZCWobkkDmt7c176g0HkmhdztV5Okvm7jE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AWXAlNk9RpQYMvxEgqQiH6PeqndN4aGUPrdEoPLgmvzqpfl4m81e2QbfEFo1b4uzq Bi2kM5xjWzrpdYHhzSqPAbbdidY8a8j4lOwEG3Q578gNLOM4y48D/Kj0LaKT3e64AM +XPQwvuiErWIsgY6Kws+Qn8isJ1xRvDwkmG64Qpk= From: Suzuki K Poulose To: kvmarm@lists.linux.dev, will@kernel.org Cc: kvm@vger.kernel.org, alexandru.elisei@arm.com, oupton@kernel.org, maz@kernel.org, tabba@google.com, aneesh.kumar@kernel.org, linux-kernel@vger.kernel.org, Oliver Upton , Suzuki K Poulose Subject: [PATCH v7 14/17] arm64: psci: Implement AFFINITY_INFO Date: Mon, 30 Mar 2026 15:23:31 +0100 Message-ID: <20260330142334.3309961-15-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260330142334.3309961-1-suzuki.poulose@arm.com> References: <20260330142334.3309961-1-suzuki.poulose@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Oliver Upton Implement support for PSCI AFFINITY_INFO by iteratively searching all of the vCPUs in a VM for those that match the specified affinity. Pause the VM to avoid racing against other PSCI calls in the system that might change the power state of the vCPUs. Reviewed-by: Marc Zyngier Signed-off-by: Oliver Upton Signed-off-by: Suzuki K Poulose --- arm64/include/kvm/kvm-cpu-arch.h | 12 ++++++- arm64/psci.c | 59 ++++++++++++++++++++++++++++++++ 2 files changed, 70 insertions(+), 1 deletion(-) diff --git a/arm64/include/kvm/kvm-cpu-arch.h b/arm64/include/kvm/kvm-cpu-a= rch.h index dbd90647..d9eb5f0e 100644 --- a/arm64/include/kvm/kvm-cpu-arch.h +++ b/arm64/include/kvm/kvm-cpu-arch.h @@ -7,7 +7,6 @@ #include #include =20 -#define ARM_MPIDR_HWID_BITMASK 0xFF00FFFFFFUL #define ARM_CPU_ID 3, 0, 0, 0 #define ARM_CPU_ID_MPIDR 5 #define ARM_CPU_CTRL 3, 0, 1, 0 @@ -67,6 +66,17 @@ unsigned long kvm_cpu__get_vcpu_mpidr(struct kvm_cpu *vc= pu); int kvm_cpu__setup_pvtime(struct kvm_cpu *vcpu); int kvm_cpu__teardown_pvtime(struct kvm *kvm); =20 +#define ARM_MPIDR_HWID_BITMASK 0xFF00FFFFFFUL +#define ARM_MPIDR_LEVEL_BITS_SHIFT 3 +#define ARM_MPIDR_LEVEL_BITS (1 << ARM_MPIDR_LEVEL_BITS_SHIFT) +#define ARM_MPIDR_LEVEL_MASK ((1 << ARM_MPIDR_LEVEL_BITS) - 1) + +#define ARM_MPIDR_LEVEL_SHIFT(level) \ + (((1 << level) >> 1) << ARM_MPIDR_LEVEL_BITS_SHIFT) + +#define ARM_MPIDR_AFFINITY_LEVEL(mpidr, level) \ + ((mpidr >> ARM_MPIDR_LEVEL_SHIFT(level)) & ARM_MPIDR_LEVEL_MASK) + static inline __u64 __core_reg_id(__u64 offset) { __u64 id =3D KVM_REG_ARM64 | KVM_REG_ARM_CORE | offset; diff --git a/arm64/psci.c b/arm64/psci.c index 14c98639..94e39d40 100644 --- a/arm64/psci.c +++ b/arm64/psci.c @@ -6,6 +6,16 @@ #include #include =20 +#define AFFINITY_MASK(level) ~((0x1UL << ((level) * ARM_MPIDR_LEVEL_BITS))= - 1) + +static unsigned long psci_affinity_mask(unsigned long affinity_level) +{ + if (affinity_level <=3D 3) + return ARM_MPIDR_HWID_BITMASK & AFFINITY_MASK(affinity_level); + + return 0; +} + static void psci_features(struct kvm_cpu *vcpu, struct arm_smccc_res *res) { u32 arg =3D smccc_get_arg(vcpu, 1); @@ -20,6 +30,8 @@ static void psci_features(struct kvm_cpu *vcpu, struct ar= m_smccc_res *res) case PSCI_0_2_FN_CPU_OFF: case PSCI_0_2_FN_CPU_ON: case PSCI_0_2_FN64_CPU_ON: + case PSCI_0_2_FN_AFFINITY_INFO: + case PSCI_0_2_FN64_AFFINITY_INFO: case ARM_SMCCC_VERSION_FUNC_ID: res->a0 =3D PSCI_RET_SUCCESS; break; @@ -111,6 +123,49 @@ out_continue: kvm__continue(vcpu->kvm); } =20 +static void affinity_info(struct kvm_cpu *vcpu, struct arm_smccc_res *res) +{ + u64 target_affinity =3D smccc_get_arg(vcpu, 1); + u64 lowest_level =3D smccc_get_arg(vcpu, 2); + u64 mpidr_mask =3D psci_affinity_mask(lowest_level); + struct kvm *kvm =3D vcpu->kvm; + bool matched =3D false; + int i; + + if (!psci_valid_affinity(target_affinity) || lowest_level > 3) { + res->a0 =3D PSCI_RET_INVALID_PARAMS; + return; + } + + kvm__pause(vcpu->kvm); + + for (i =3D 0; i < kvm->nrcpus; i++) { + struct kvm_cpu *tmp =3D kvm->cpus[i]; + u64 mpidr =3D kvm_cpu__get_vcpu_mpidr(tmp); + struct kvm_mp_state mp_state; + + if ((mpidr & mpidr_mask) !=3D target_affinity) + continue; + + if (ioctl(tmp->vcpu_fd, KVM_GET_MP_STATE, &mp_state)) + die_perror("KVM_GET_MP_STATE failed"); + + if (mp_state.mp_state !=3D KVM_MP_STATE_STOPPED) { + res->a0 =3D PSCI_0_2_AFFINITY_LEVEL_ON; + goto out_continue; + } + + matched =3D true; + } + + if (matched) + res->a0 =3D PSCI_0_2_AFFINITY_LEVEL_OFF; + else + res->a0 =3D PSCI_RET_INVALID_PARAMS; +out_continue: + kvm__continue(vcpu->kvm); +} + void handle_psci(struct kvm_cpu *vcpu, struct arm_smccc_res *res) { switch (vcpu->kvm_run->hypercall.nr) { @@ -131,6 +186,10 @@ void handle_psci(struct kvm_cpu *vcpu, struct arm_smcc= c_res *res) case PSCI_0_2_FN64_CPU_ON: cpu_on(vcpu, res); break; + case PSCI_0_2_FN_AFFINITY_INFO: + case PSCI_0_2_FN64_AFFINITY_INFO: + affinity_info(vcpu, res); + break; default: res->a0 =3D PSCI_RET_NOT_SUPPORTED; } --=20 2.43.0 From nobody Mon Apr 6 09:13:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A0EC23E120F; Mon, 30 Mar 2026 14:24:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880682; cv=none; b=SnwSXyISzJkH1zyrkO93maB7X4Mbg+JWsFs+OiUzRzFC+sqCAWQUAPMSzOY44jFueL07fefiVyyuR6wmY5IxMb7hkgTzi+ZrN6ID1cR38tMmMT4pLRAZQCOSYukicSprnGMXQnNi8g2Gwb/2EkpaRtKE0W/uLadCnJLtWezUmMo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880682; c=relaxed/simple; bh=sx1ccfpOH3rIlBXTgrOC+8Y/h/QBr758sug6lz7re9g=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=T2oSyKCQ2HG6LkG+UneMto7xLT5VY7Zo86N8I4deqbsHv8vwNL00/DqyhzNm2YQaHQ+XJuwKzHgrbyF8lA6MYdoDTIne5MNFAYv2a4Htyl8xH1jkSWAKBRNjdQ+kAkqzl0D+JUEvQNWViyXmF/4cwP6cOs2tI2ORAz05NjGk7fE= ARC-Authentication-Results: i=1; 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h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CorUkqcYFNhwDskus+lBA4Zd/V8uZPFP3+rBCj63cJtIH3C0veAkdr40WJvDIhaOA Un5gtkO2Phhg8RBS+hzikQDu0dDx2Riwg2a9PGtBfcoH/cbMi5RRdgV5NAFtMErj+2 fVWuJ5QwqrJEG2jUgkBfGxZn3VXdzz0mTN0GwdZk= From: Suzuki K Poulose To: kvmarm@lists.linux.dev, will@kernel.org Cc: kvm@vger.kernel.org, alexandru.elisei@arm.com, oupton@kernel.org, maz@kernel.org, tabba@google.com, aneesh.kumar@kernel.org, linux-kernel@vger.kernel.org, Oliver Upton , Suzuki K Poulose Subject: [PATCH v7 15/17] arm64: psci: Implement MIGRATE_INFO_TYPE Date: Mon, 30 Mar 2026 15:23:32 +0100 Message-ID: <20260330142334.3309961-16-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260330142334.3309961-1-suzuki.poulose@arm.com> References: <20260330142334.3309961-1-suzuki.poulose@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Oliver Upton Let the guest know that our PSCI implementation is entirely oblivious to the existence of a Trusted OS, and thus shouldn't care about it. Reviewed-by: Marc Zyngier Signed-off-by: Oliver Upton Signed-off-by: Suzuki K Poulose --- arm64/psci.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arm64/psci.c b/arm64/psci.c index 94e39d40..3deb672e 100644 --- a/arm64/psci.c +++ b/arm64/psci.c @@ -32,6 +32,7 @@ static void psci_features(struct kvm_cpu *vcpu, struct ar= m_smccc_res *res) case PSCI_0_2_FN64_CPU_ON: case PSCI_0_2_FN_AFFINITY_INFO: case PSCI_0_2_FN64_AFFINITY_INFO: + case PSCI_0_2_FN_MIGRATE_INFO_TYPE: case ARM_SMCCC_VERSION_FUNC_ID: res->a0 =3D PSCI_RET_SUCCESS; break; @@ -190,6 +191,10 @@ void handle_psci(struct kvm_cpu *vcpu, struct arm_smcc= c_res *res) case PSCI_0_2_FN64_AFFINITY_INFO: affinity_info(vcpu, res); break; + case PSCI_0_2_FN_MIGRATE_INFO_TYPE: + /* Trusted OS not present */ + res->a0 =3D PSCI_0_2_TOS_MP; + break; default: res->a0 =3D PSCI_RET_NOT_SUPPORTED; } --=20 2.43.0 From nobody Mon Apr 6 09:13:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B1CEA3E1210; Mon, 30 Mar 2026 14:24:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880683; cv=none; b=qEqAB+dSTVXyFGQbjpE/ILURgKY8aJDieNXydvI+wTudS/WSzmmw7ZD8Up8+2hlAxlqD/quRZDz4sW92IN2PaM84/rfMBuX8QFl1kDZFbM16jqBWqUZLJZVy7A9q5uJUtSyWhXaP0arQUo0Gb2auWMU0qunY6NjCHvM87lCupy0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880683; c=relaxed/simple; bh=hpDfcXJ0ERxD9QdxSdOFTgn2JgPNfhZudvBW4grrPzs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=BB//CQ9a6e3UVsmPQBrQgfZz67wOBTPn01vGiVBcH3ys9K89hWIOGNkff7pu6Swpo24LvvzWur50iBFbSG5emplWIV+mdmyS540i/0r/4+rqp/Db6N6tUFRUzJ4otRofPNLvpzfpNtrZw6CJQx3nswCfhv0IC9ChpoK5k5/I3Kw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=QCwo9GUg; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="QCwo9GUg" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3DE7E4515; Mon, 30 Mar 2026 07:24:36 -0700 (PDT) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 603D23F915; Mon, 30 Mar 2026 07:24:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1774880682; bh=hpDfcXJ0ERxD9QdxSdOFTgn2JgPNfhZudvBW4grrPzs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QCwo9GUggPZUgT2mTOwHXvj0JMJuYKgQ9sLZmll3d/fHBwKNdKBxpvZarhW7UUSwq AcrwHsAlEwfmFUASCnRxU8DsUGGtrPqDli1O/HktA5oxQ9fKzPhinQztKAMiMQ8WPt UIALdy03FavOb/RVD+xuPLpqB6aqrFlgxL/JCIQ8= From: Suzuki K Poulose To: kvmarm@lists.linux.dev, will@kernel.org Cc: kvm@vger.kernel.org, alexandru.elisei@arm.com, oupton@kernel.org, maz@kernel.org, tabba@google.com, aneesh.kumar@kernel.org, linux-kernel@vger.kernel.org, Oliver Upton , Suzuki K Poulose Subject: [PATCH v7 16/17] arm64: psci: Implement SYSTEM_{OFF,RESET} Date: Mon, 30 Mar 2026 15:23:33 +0100 Message-ID: <20260330142334.3309961-17-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260330142334.3309961-1-suzuki.poulose@arm.com> References: <20260330142334.3309961-1-suzuki.poulose@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Oliver Upton Add support for the PSCI SYSTEM_{OFF,RESET} calls. Match the behavior of the SYSTEM_EVENT based implementation and just terminate the VM. Reviewed-by: Marc Zyngier Signed-off-by: Oliver Upton Signed-off-by: Suzuki K Poulose --- arm64/psci.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arm64/psci.c b/arm64/psci.c index 3deb672e..874ad141 100644 --- a/arm64/psci.c +++ b/arm64/psci.c @@ -33,6 +33,8 @@ static void psci_features(struct kvm_cpu *vcpu, struct ar= m_smccc_res *res) case PSCI_0_2_FN_AFFINITY_INFO: case PSCI_0_2_FN64_AFFINITY_INFO: case PSCI_0_2_FN_MIGRATE_INFO_TYPE: + case PSCI_0_2_FN_SYSTEM_OFF: + case PSCI_0_2_FN_SYSTEM_RESET: case ARM_SMCCC_VERSION_FUNC_ID: res->a0 =3D PSCI_RET_SUCCESS; break; @@ -195,6 +197,10 @@ void handle_psci(struct kvm_cpu *vcpu, struct arm_smcc= c_res *res) /* Trusted OS not present */ res->a0 =3D PSCI_0_2_TOS_MP; break; + case PSCI_0_2_FN_SYSTEM_OFF: + case PSCI_0_2_FN_SYSTEM_RESET: + kvm__reboot(vcpu->kvm); + break; default: res->a0 =3D PSCI_RET_NOT_SUPPORTED; } --=20 2.43.0 From nobody Mon Apr 6 09:13:14 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 620863E1D11; Mon, 30 Mar 2026 14:24:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880685; cv=none; b=O3HaHLd9gPLHuZp7c7cLVQTh0KTQLTaKWZZ9Dd18QuxAGf86hYWgNJEmFrye/zdoTW3luPxepYnoVKOKubVIWLYfzTyNpxG7QDm+Vw4cCEgT+9BjP5gunCcUX+F8TJTew3XXnw3OFB3zwuPUWNwYNbQ1wT265FeejLXq1ss8SLo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774880685; c=relaxed/simple; bh=1qd9jKKkciPMBnCtIYoZky5yLvK/08oE+llkGM6J0zQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mIZR2OfG2HZryQkW09GmrCLC1gcxjZvglFtMoav6GAhtHAt6jP6OsGOyT9BTi60tOsMiNJnZVk5O4yO9Aq2zunyjSYqEGis3i+Sh11SGgvf0bzaZfdBPfsW6GC3FYIT6ITjgz+6AzzV/QwURLNhaa6B6nkeigagb5JvrUudgZeo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=r0j5P5cT; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="r0j5P5cT" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1D1294515; Mon, 30 Mar 2026 07:24:38 -0700 (PDT) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 5A9B03F915; Mon, 30 Mar 2026 07:24:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1774880684; bh=1qd9jKKkciPMBnCtIYoZky5yLvK/08oE+llkGM6J0zQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=r0j5P5cTyW50r4Nyj0vMQBx88DHP0/h9N3CMNXSA8MeZkZc8pZUiw5Xr79SKEscIZ heig4GEMRnwktBh7VEJ8Wu13D1nmIRKnf6iNKywdzzHn2BxceidRai2A4YK7wsI3y4 NF3A1Oh62g4dcJxZokoUJsZiuEu9a/Y1CWIPWN6A= From: Suzuki K Poulose To: kvmarm@lists.linux.dev, will@kernel.org Cc: kvm@vger.kernel.org, alexandru.elisei@arm.com, oupton@kernel.org, maz@kernel.org, tabba@google.com, aneesh.kumar@kernel.org, linux-kernel@vger.kernel.org, Oliver Upton , Suzuki K Poulose Subject: [PATCH v7 17/17] arm64: smccc: Start sending PSCI to userspace Date: Mon, 30 Mar 2026 15:23:34 +0100 Message-ID: <20260330142334.3309961-18-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260330142334.3309961-1-suzuki.poulose@arm.com> References: <20260330142334.3309961-1-suzuki.poulose@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Oliver Upton kvmtool now has a PSCI implementation that complies with v1.0 of the specification. Use the SMCCC filter to start sending these calls out to userspace for further handling. While at it, shut the door on the legacy, KVM-specific v0.1 functions. Reviewed-by: Marc Zyngier Signed-off-by: Oliver Upton Signed-off-by: Suzuki K Poulose --- Changes since v4: - Switch to default in-kernel PSCI --- arm64/include/kvm/kvm-config-arch.h | 8 +++++-- arm64/smccc.c | 37 +++++++++++++++++++++++++++++ 2 files changed, 43 insertions(+), 2 deletions(-) diff --git a/arm64/include/kvm/kvm-config-arch.h b/arm64/include/kvm/kvm-co= nfig-arch.h index ee031f01..f8dd088d 100644 --- a/arm64/include/kvm/kvm-config-arch.h +++ b/arm64/include/kvm/kvm-config-arch.h @@ -15,6 +15,7 @@ struct kvm_config_arch { u64 fw_addr; unsigned int sve_max_vq; bool no_pvtime; + bool psci; }; =20 int irqchip_parser(const struct option *opt, const char *arg, int unset); @@ -52,11 +53,14 @@ int sve_vl_parser(const struct option *opt, const char = *arg, int unset); "Force virtio devices to use PCI as their default " \ "transport (Deprecated: Use --virtio-transport " \ "option instead)", virtio_transport_parser, kvm), \ - OPT_CALLBACK('\0', "irqchip", &(cfg)->irqchip, \ + OPT_CALLBACK('\0', "irqchip", &(cfg)->irqchip, \ "[gicv2|gicv2m|gicv3|gicv3-its]", \ "Type of interrupt controller to emulate in the guest", \ irqchip_parser, NULL), \ OPT_U64('\0', "firmware-address", &(cfg)->fw_addr, \ - "Address where firmware should be loaded"), + "Address where firmware should be loaded"), \ + OPT_BOOLEAN('\0', "psci", &(cfg)->psci, \ + "Request userspace handling of PSCI, instead of" \ + " relying on the in-kernel implementation"), =20 #endif /* ARM_COMMON__KVM_CONFIG_ARCH_H */ diff --git a/arm64/smccc.c b/arm64/smccc.c index ef986d8c..47310a04 100644 --- a/arm64/smccc.c +++ b/arm64/smccc.c @@ -38,7 +38,44 @@ out: return true; } =20 +static struct kvm_smccc_filter filter_ranges[] =3D { + { + .base =3D KVM_PSCI_FN_BASE, + .nr_functions =3D 4, + .action =3D KVM_SMCCC_FILTER_DENY, + }, + { + .base =3D PSCI_0_2_FN_BASE, + .nr_functions =3D 0x20, + .action =3D KVM_SMCCC_FILTER_FWD_TO_USER, + }, + { + .base =3D PSCI_0_2_FN64_BASE, + .nr_functions =3D 0x20, + .action =3D KVM_SMCCC_FILTER_FWD_TO_USER, + }, +}; + void kvm__setup_smccc(struct kvm *kvm) { + struct kvm_device_attr attr =3D { + .group =3D KVM_ARM_VM_SMCCC_CTRL, + .attr =3D KVM_ARM_VM_SMCCC_FILTER, + }; + unsigned int i; =20 + if (!kvm->cfg.arch.psci) + return; + + if (ioctl(kvm->vm_fd, KVM_HAS_DEVICE_ATTR, &attr)) { + pr_debug("KVM SMCCC filter not supported"); + return; + } + + for (i =3D 0; i < ARRAY_SIZE(filter_ranges); i++) { + attr.addr =3D (u64)&filter_ranges[i]; + + if (ioctl(kvm->vm_fd, KVM_SET_DEVICE_ATTR, &attr)) + die_perror("KVM_SET_DEVICE_ATTR failed"); + } } --=20 2.43.0