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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82ca843e1desm6776896b3a.4.2026.03.29.21.51.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 29 Mar 2026 21:51:13 -0700 (PDT) From: Kathiravan Thirumoorthy Date: Mon, 30 Mar 2026 10:21:04 +0530 Subject: [PATCH v4 1/2] dt-bindings: pinctrl: qcom: add IPQ5210 pinctrl Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260330-ipq5210_tlmm-v4-1-b7c40c5429e5@oss.qualcomm.com> References: <20260330-ipq5210_tlmm-v4-0-b7c40c5429e5@oss.qualcomm.com> In-Reply-To: <20260330-ipq5210_tlmm-v4-0-b7c40c5429e5@oss.qualcomm.com> To: Bjorn Andersson , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kathiravan Thirumoorthy , Krzysztof Kozlowski X-Mailer: b4 0.15.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1774846266; l=5049; i=kathiravan.thirumoorthy@oss.qualcomm.com; s=20230906; h=from:subject:message-id; bh=tLchpEgPCkvPm7qfKOSp9d2qNwRW0ilNuzY7CLoJBY4=; b=vKQzpV8Lorvo3wND4UgxNl1t6Zc8Sb55B66wm7YsURVzoZGmsjHs08+NNK1Gcq89sDLZZdRYF LKoYKUiymbTCuhQMprP8tFJe/hoHLIiC3+VaNh52pVIGwWNleLpZptC X-Developer-Key: i=kathiravan.thirumoorthy@oss.qualcomm.com; a=ed25519; pk=xWsR7pL6ch+vdZ9MoFGEaP61JUaRf0XaZYWztbQsIiM= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzMwMDAzNSBTYWx0ZWRfX956TdD1t1BnS g+OFllPq8h9bYGZXUJhr9w0FguBNAIV/H8oS/2nIDrEk8aTC+e1rD4BHyXz2FdWhH6JNPSIYTbH BfMcwq2R7cP7iWWQZfs7aiy5u1gohDOHb3jdT/lofOvnhgXsfF4BLImYliwPs2sfNNyPgobn/2D IZlogO7xzpQNNrPTfKYxZA6HyooiiK0LuQboKsCqZKLh/zkEl+Vd3rRgdUjBw7gZmq8otBy61mq mjPU/6F+PurppP5+hw5ooNqFfuvOYjWYiU2tukXBlcXbRtVFVbBhnyGGYgOsQsGj0C31ylmioSu cil37LM7pesRhGf1y5b2KQjnUWhy6Ize3Gtnq+Rwps7HR+M+KIupcURFPcIySaixnqckVqzRrPZ XWmurLPFbbIcL8dlwFk4JyvluT7Rk4kEiOekK8o8fEPD3Kblot+i2CCZMd/GThpDC8HLIgT1ssD capnS6iQDzQx9knVKfA== X-Authority-Analysis: v=2.4 cv=aOT9aL9m c=1 sm=1 tr=0 ts=69ca0143 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=gEfo2CItAAAA:8 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=oSdKyVnxDMwtS7CNbvIA:9 a=QEXdDO2ut3YA:10 a=3WC7DwWrALyhR5TkjVHa:22 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-ORIG-GUID: Wiyh81o3_xRF8XeZ9XoJcrNAvr48dFLM X-Proofpoint-GUID: Wiyh81o3_xRF8XeZ9XoJcrNAvr48dFLM X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-29_05,2026-03-28_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 bulkscore=0 spamscore=0 lowpriorityscore=0 clxscore=1015 suspectscore=0 adultscore=0 malwarescore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603300035 Add device tree bindings for IPQ5210 TLMM block. Reviewed-by: Bjorn Andersson Reviewed-by: Krzysztof Kozlowski Signed-off-by: Kathiravan Thirumoorthy --- .../bindings/pinctrl/qcom,ipq5210-tlmm.yaml | 123 +++++++++++++++++= ++++ 1 file changed, 123 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5210-tlmm.ya= ml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5210-tlmm.yaml new file mode 100644 index 000000000000..12c5e76235a3 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5210-tlmm.yaml @@ -0,0 +1,123 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,ipq5210-tlmm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ5210 TLMM pin controller + +maintainers: + - Bjorn Andersson + - Kathiravan Thirumoorthy + +description: + Top Level Mode Multiplexer pin controller in Qualcomm IPQ5210 SoC. + +allOf: + - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# + +properties: + compatible: + const: qcom,ipq5210-tlmm + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + gpio-reserved-ranges: + minItems: 1 + maxItems: 27 + + gpio-line-names: + maxItems: 54 + +patternProperties: + "-state$": + oneOf: + - $ref: "#/$defs/qcom-ipq5210-tlmm-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-ipq5210-tlmm-state" + additionalProperties: false + +$defs: + qcom-ipq5210-tlmm-state: + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configura= tion. + Client device subnodes use below standard properties. + $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state + unevaluatedProperties: false + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + pattern: "^gpio([0-9]|[1-4][0-9]|5[0-3])$" + minItems: 1 + maxItems: 36 + + function: + description: + Specify the alternative function to be configured for the specif= ied + pins. + + enum: [ atest_char_start, atest_char_status0, atest_char_status1, + atest_char_status2, atest_char_status3, atest_tic_en, audi= o_pri, + audio_pri_mclk_out0, audio_pri_mclk_in0, audio_pri_mclk_ou= t1, + audio_pri_mclk_in1, audio_pri_mclk_out2, audio_pri_mclk_in= 2, + audio_pri_mclk_out3, audio_pri_mclk_in3, audio_sec, + audio_sec_mclk_out0, audio_sec_mclk_in0, audio_sec_mclk_ou= t1, + audio_sec_mclk_in1, audio_sec_mclk_out2, audio_sec_mclk_in= 2, + audio_sec_mclk_out3, audio_sec_mclk_in3, core_voltage_0, + cri_trng0, cri_trng1, cri_trng2, cri_trng3, dbg_out_clk, d= g_out, + gcc_plltest_bypassnl, gcc_plltest_resetn, gcc_tlmm, gpio, = led0, + led1, led2, mdc_mst, mdc_slv0, mdc_slv1, mdc_slv2, mdio_ms= t, + mdio_slv0, mdio_slv1, mdio_slv2, mux_tod_out, pcie0_clk_re= q_n, + pcie0_wake, pcie1_clk_req_n, pcie1_wake, pll_test, + pon_active_led, pon_mux_sel, pon_rx, pon_rx_los, pon_tx, + pon_tx_burst, pon_tx_dis, pon_tx_fault, pon_tx_sd, gpn_rx_= los, + gpn_tx_burst, gpn_tx_dis, gpn_tx_fault, gpn_tx_sd, pps, pw= m0, + pwm1, pwm2, pwm3, qdss_cti_trig_in_a0, qdss_cti_trig_in_a1, + qdss_cti_trig_in_b0, qdss_cti_trig_in_b1, qdss_cti_trig_ou= t_a0, + qdss_cti_trig_out_a1, qdss_cti_trig_out_b0, + qdss_cti_trig_out_b1, qdss_traceclk_a, qdss_tracectl_a, + qdss_tracedata_a, qrng_rosc0, qrng_rosc1, qrng_rosc2, + qspi_data, qspi_clk, qspi_cs_n, qup_se0, qup_se1, qup_se2, + qup_se3, qup_se4, qup_se5, qup_se5_l1, resout, rx_los0, rx= _los1, + rx_los2, sdc_clk, sdc_cmd, sdc_data, tsens_max ] + + required: + - pins + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include + + tlmm: pinctrl@1000000 { + compatible =3D "qcom,ipq5210-tlmm"; + reg =3D <0x01000000 0x300000>; + gpio-controller; + #gpio-cells =3D <0x2>; + gpio-ranges =3D <&tlmm 0 0 54>; + interrupts =3D ; + interrupt-controller; + #interrupt-cells =3D <0x2>; + + qup-uart1-default-state { + pins =3D "gpio38", "gpio39"; + function =3D "qup_se1"; + drive-strength =3D <6>; + bias-pull-down; + }; + }; --=20 2.34.1