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[2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-38c83892035sm7024731fa.22.2026.03.28.17.33.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Mar 2026 17:33:23 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 29 Mar 2026 02:33:03 +0200 Subject: [PATCH v11 02/11] media: qcom: iris: use common set_preset_registers function Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260329-iris-platform-data-v11-2-eea672b03a95@oss.qualcomm.com> References: <20260329-iris-platform-data-v11-0-eea672b03a95@oss.qualcomm.com> In-Reply-To: <20260329-iris-platform-data-v11-0-eea672b03a95@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=6562; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=UnGlccQOyrgjPF037WTnCf6++MPZK2sCDOcuFmLrNnQ=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBpyHNHKb4i7aMgav2rqUCMle2rb3eWzrcfiWoLm VEC12ClpAmJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCachzRwAKCRCLPIo+Aiko 1WHPB/90WB4nVrtBSggkNkGFRyjttpcc9DS7gCXQnU/JSo3WCT0UFxuGlwElHNcUkwXRRwqD72K VYqhCf5VqOW0M7CGuj5PyXz3mtcJtsCSba2tC9F/+bRM+faVAxp1bA/Rp2jYnQx1ddVFr/jGNxr JoKCucJKV0FlFrUK2fLHZWfjsjO7C25Kq+K6H5nKq/Dpdx6JCHpCJA6CXA4yDhHFVP/l7sLRPrg ei78WsCcBrd5TXEjg4MlbejnxTnibfE31X7Vwy/T0B6BrA5G/3OWzqpj/C7nAGHvtFNOnwdU5zq nSTiHGuDWZYp+QkKsF2iFTnygtxE6eDvHMS90JWLNU3L5xo4 X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Authority-Analysis: v=2.4 cv=csKWUl4i c=1 sm=1 tr=0 ts=69c87357 cx=c_pps a=wEM5vcRIz55oU/E2lInRtA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=LmgrmXmU8fDMlo1BKrQA:9 a=QEXdDO2ut3YA:10 a=OIgjcC2v60KrkQgK7BGD:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI5MDAwMiBTYWx0ZWRfXwDD7wSh/pYPb M9RlS/ZYND8hD5bfIBZUERDWJaV1wCsx0FKC4zo/6I8wohZL7qaUHU1eb9WXMK1nOyPAZWf9Wqo hxkqoGfuqQqhT7Rawcx0DDlR0Znhz6rf0geTVCN0dUkWdbcafhO99s0i1zKYfwrRoyp17tIL/Qe Z9sbZsQEMqNfR9lBv20zKiEFq/JAB9t8sV71ngXFeN5RG7FzrFs6EgNnaRLrfkEoG/h4FnJbJ7Z InD9Vgf6SAHOUsia4327whsaaGOO24NNkyH/1XDSZrYNDZFIO4ZterzMAuJ9LH+N0yvZUgi7PnP F2MRwtKjhul46LHbjaWi2KiZt2pLTCF2aHZG57gnERx0AKYZhOtXCopps+O5qwIaovT1V9k6Ut+ caqf3qIwu1LSO1LUBOlOHVezDw0iWug8YazyhnhmsL5+pegtcUE3G4Qhdui/7+NVyKYjAbPyxIx 4j7153OlBjVFdVWfOoQ== X-Proofpoint-ORIG-GUID: NkGogfgeHdaMnYYa8HQWJmvlIuSp6K3s X-Proofpoint-GUID: NkGogfgeHdaMnYYa8HQWJmvlIuSp6K3s X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-28_03,2026-03-28_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 clxscore=1015 adultscore=0 impostorscore=0 priorityscore=1501 bulkscore=0 lowpriorityscore=0 suspectscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603290002 The set_preset_registers is (currently) common to all supported devices. Extract it to a iris_vpu_common.c and call it directly from iris_vpu_power_on(). Later, if any of the devices requires special handling, it can be sorted out separately. Reviewed-by: Dikshita Agarwal Reviewed-by: Vikash Garodia Signed-off-by: Dmitry Baryshkov --- drivers/media/platform/qcom/iris/iris_platform_common.h | 1 - drivers/media/platform/qcom/iris/iris_platform_gen1.c | 7 ------- drivers/media/platform/qcom/iris/iris_platform_gen2.c | 9 --------- drivers/media/platform/qcom/iris/iris_vpu_common.c | 7 ++++++- drivers/media/platform/qcom/iris/iris_vpu_common.h | 2 ++ 5 files changed, 8 insertions(+), 18 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index e4eefc646c7f..d7106902698c 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -207,7 +207,6 @@ struct iris_platform_data { struct iris_inst *(*get_instance)(void); u32 (*get_vpu_buffer_size)(struct iris_inst *inst, enum iris_buffer_type = buffer_type); const struct vpu_ops *vpu_ops; - void (*set_preset_registers)(struct iris_core *core); const struct icc_info *icc_tbl; unsigned int icc_tbl_size; const struct bw_info *bw_tbl_dec; diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen1.c b/driver= s/media/platform/qcom/iris/iris_platform_gen1.c index 07ed572e895b..ed07d1b00e43 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen1.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen1.c @@ -260,11 +260,6 @@ static struct platform_inst_caps platform_inst_cap_sm8= 250 =3D { .max_operating_rate =3D MAXIMUM_FPS, }; =20 -static void iris_set_sm8250_preset_registers(struct iris_core *core) -{ - writel(0x0, core->reg_base + 0xB0088); -} - static const struct icc_info sm8250_icc_table[] =3D { { "cpu-cfg", 1000, 1000 }, { "video-mem", 1000, 15000000 }, @@ -343,7 +338,6 @@ const struct iris_platform_data sm8250_data =3D { .init_hfi_response_ops =3D iris_hfi_gen1_response_ops_init, .get_vpu_buffer_size =3D iris_vpu_buf_size, .vpu_ops =3D &iris_vpu2_ops, - .set_preset_registers =3D iris_set_sm8250_preset_registers, .icc_tbl =3D sm8250_icc_table, .icc_tbl_size =3D ARRAY_SIZE(sm8250_icc_table), .clk_rst_tbl =3D sm8250_clk_reset_table, @@ -397,7 +391,6 @@ const struct iris_platform_data sc7280_data =3D { .init_hfi_response_ops =3D iris_hfi_gen1_response_ops_init, .get_vpu_buffer_size =3D iris_vpu_buf_size, .vpu_ops =3D &iris_vpu2_ops, - .set_preset_registers =3D iris_set_sm8250_preset_registers, .icc_tbl =3D sm8250_icc_table, .icc_tbl_size =3D ARRAY_SIZE(sm8250_icc_table), .bw_tbl_dec =3D sc7280_bw_table_dec, diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/driver= s/media/platform/qcom/iris/iris_platform_gen2.c index 1f23ddb972f0..c84d4399f84d 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -756,11 +756,6 @@ static struct platform_inst_caps platform_inst_cap_sm8= 550 =3D { .max_operating_rate =3D MAXIMUM_FPS, }; =20 -static void iris_set_sm8550_preset_registers(struct iris_core *core) -{ - writel(0x0, core->reg_base + 0xB0088); -} - static const struct icc_info sm8550_icc_table[] =3D { { "cpu-cfg", 1000, 1000 }, { "video-mem", 1000, 15000000 }, @@ -917,7 +912,6 @@ const struct iris_platform_data sm8550_data =3D { .init_hfi_response_ops =3D iris_hfi_gen2_response_ops_init, .get_vpu_buffer_size =3D iris_vpu_buf_size, .vpu_ops =3D &iris_vpu3_ops, - .set_preset_registers =3D iris_set_sm8550_preset_registers, .icc_tbl =3D sm8550_icc_table, .icc_tbl_size =3D ARRAY_SIZE(sm8550_icc_table), .clk_rst_tbl =3D sm8550_clk_reset_table, @@ -1018,7 +1012,6 @@ const struct iris_platform_data sm8650_data =3D { .init_hfi_response_ops =3D iris_hfi_gen2_response_ops_init, .get_vpu_buffer_size =3D iris_vpu33_buf_size, .vpu_ops =3D &iris_vpu33_ops, - .set_preset_registers =3D iris_set_sm8550_preset_registers, .icc_tbl =3D sm8550_icc_table, .icc_tbl_size =3D ARRAY_SIZE(sm8550_icc_table), .clk_rst_tbl =3D sm8650_clk_reset_table, @@ -1114,7 +1107,6 @@ const struct iris_platform_data sm8750_data =3D { .init_hfi_response_ops =3D iris_hfi_gen2_response_ops_init, .get_vpu_buffer_size =3D iris_vpu33_buf_size, .vpu_ops =3D &iris_vpu35_ops, - .set_preset_registers =3D iris_set_sm8550_preset_registers, .icc_tbl =3D sm8550_icc_table, .icc_tbl_size =3D ARRAY_SIZE(sm8550_icc_table), .clk_rst_tbl =3D sm8750_clk_reset_table, @@ -1212,7 +1204,6 @@ const struct iris_platform_data qcs8300_data =3D { .init_hfi_response_ops =3D iris_hfi_gen2_response_ops_init, .get_vpu_buffer_size =3D iris_vpu_buf_size, .vpu_ops =3D &iris_vpu3_ops, - .set_preset_registers =3D iris_set_sm8550_preset_registers, .icc_tbl =3D sm8550_icc_table, .icc_tbl_size =3D ARRAY_SIZE(sm8550_icc_table), .clk_rst_tbl =3D sm8550_clk_reset_table, diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.c b/drivers/m= edia/platform/qcom/iris/iris_vpu_common.c index 548e5f1727fd..faabf53126f3 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_common.c +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.c @@ -468,7 +468,7 @@ int iris_vpu_power_on(struct iris_core *core) =20 iris_opp_set_rate(core->dev, freq); =20 - core->iris_platform_data->set_preset_registers(core); + iris_vpu_set_preset_registers(core); =20 iris_vpu_interrupt_init(core); core->intr_status =3D 0; @@ -485,3 +485,8 @@ int iris_vpu_power_on(struct iris_core *core) =20 return ret; } + +void iris_vpu_set_preset_registers(struct iris_core *core) +{ + writel(0x0, core->reg_base + 0xb0088); +} diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.h b/drivers/m= edia/platform/qcom/iris/iris_vpu_common.h index f6dffc613b82..07728c4c72b6 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_common.h +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.h @@ -39,4 +39,6 @@ int iris_vpu35_vpu4x_power_on_controller(struct iris_core= *core); void iris_vpu35_vpu4x_program_bootup_registers(struct iris_core *core); u64 iris_vpu3x_vpu4x_calculate_frequency(struct iris_inst *inst, size_t da= ta_size); =20 +void iris_vpu_set_preset_registers(struct iris_core *core); + #endif --=20 2.47.3