From nobody Thu Apr 2 15:37:28 2026 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 347D0345CA5; Sat, 28 Mar 2026 05:16:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774675013; cv=none; b=tZnNCmCTXuEMpCx++0ip74QN/YfMxbDVddsbpVIPRAI9rI8eiH8Nbtq2AlqEsL5wDqLBYyJHQVMkxKU8B9x+XeX4hnxDisQfdva9oOe4yQCyaQxv/mIAKw4EFwayul9CvvIP669IhT0hzEb7jG0kV7BZruKwVKpQjNHKa8/9U+w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774675013; c=relaxed/simple; bh=ZjIDFnIVYm3hY1hsMt7iaINGKvj9McOC/hCV2vBEcts=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=N4bDO3Vi8G2riF/NftKujWObU0hsj4cZIctqmgWvBciPiuMO9unmfUEfyFGWmA562kp6jJIhCXnA1ZHAMSKkk+GirM+PE/HeznofLAWoTgSwKgk2rfNxQG57yHwLnMtTzg7WPqe5z4YuI3JKCgON4zJO5V7xjbU9pRVoeeafjWI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=NRa3Ii8u; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="NRa3Ii8u" X-UUID: 4cce21b42a6511f19a16598d5ca7f8ec-20260328 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=fboU0It6ToyJiyGzCLDiK2SnVMilY387Mkvchhg7tVs=; b=NRa3Ii8uir7WRGugwq2zzL9udquWSwkP9mq8R6RTXqzghSCOulrolgEF3STfMR8EmftckvBj1fB0syiV+a2hGgwl9KGbZd42S9NmshCBD27mcHGNX/HtXKhCoR3vMKts/CCgddxYBIDA+owIW4RQuiM57A4mHKG0K16wzavIMMU=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.12,REQID:4da414f3-3540-41ad-93f5-55afdfe0ecdb,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:e7bac3a,CLOUDID:c2c039d5-060f-4ecc-9ee0-121eeeb4a682,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|888|898,TC:-5,Content: 0|15|50,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL:0,OSI :0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 4cce21b42a6511f19a16598d5ca7f8ec-20260328 Received: from mtkmbs13n2.mediatek.inc [(172.21.101.108)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 497821303; Sat, 28 Mar 2026 13:16:39 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Sat, 28 Mar 2026 13:16:38 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Sat, 28 Mar 2026 13:16:37 +0800 From: Yunfei Dong To: =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , Sebastian Fricke , Nicolas Dufresne , Hans Verkuil , AngeloGioacchino Del Regno , Benjamin Gaignard , Nathan Hebert , Daniel Almeida CC: Hsin-Yi Wang , Fritz Koenig , Daniel Vetter , Steve Cho , Yunfei Dong , , , , , , Subject: [PATCH v4 05/14] media: mediatek: vcodec: define MT8196 vcodec levels. Date: Sat, 28 Mar 2026 13:16:15 +0800 Message-ID: <20260328051630.7937-6-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20260328051630.7937-1-yunfei.dong@mediatek.com> References: <20260328051630.7937-1-yunfei.dong@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" The supported level and profile are not the same for different codecs and architecture. Select the correct one. Signed-off-by: Yunfei Dong Reviewed-by: Nicolas Dufresne --- .../mediatek/vcodec/decoder/mtk_vcodec_dec_stateless.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_= stateless.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec= _stateless.c index ab1894fba0d9..472ece5713a5 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_statele= ss.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_statele= ss.c @@ -577,6 +577,7 @@ static void mtk_vcodec_dec_fill_h264_level(struct v4l2_= ctrl_config *cfg, cfg->max =3D V4L2_MPEG_VIDEO_H264_LEVEL_5_2; break; case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_H264_LEVEL_6_0; break; case MTK_VDEC_MT8183: @@ -595,6 +596,7 @@ static void mtk_vcodec_dec_fill_h264_profile(struct v4l= 2_ctrl_config *cfg, switch (ctx->dev->chip_name) { case MTK_VDEC_MT8188: case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10; break; default: @@ -611,6 +613,7 @@ static void mtk_vcodec_dec_fill_h265_level(struct v4l2_= ctrl_config *cfg, cfg->max =3D V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1; break; case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2; break; default: @@ -625,6 +628,7 @@ static void mtk_vcodec_dec_fill_h265_profile(struct v4l= 2_ctrl_config *cfg, switch (ctx->dev->chip_name) { case MTK_VDEC_MT8188: case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10; break; default: @@ -642,6 +646,7 @@ static void mtk_vcodec_dec_fill_vp9_level(struct v4l2_c= trl_config *cfg, cfg->max =3D V4L2_MPEG_VIDEO_VP9_LEVEL_5_1; break; case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_VP9_LEVEL_5_2; break; case MTK_VDEC_MT8186: @@ -659,6 +664,7 @@ static void mtk_vcodec_dec_fill_vp9_profile(struct v4l2= _ctrl_config *cfg, switch (ctx->dev->chip_name) { case MTK_VDEC_MT8188: case MTK_VDEC_MT8195: + case MTK_VDEC_MT8196: cfg->max =3D V4L2_MPEG_VIDEO_VP9_PROFILE_2; break; default: --=20 2.45.2