From nobody Thu Apr 2 15:36:11 2026 Received: from mail-pl1-f172.google.com (mail-pl1-f172.google.com [209.85.214.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B904C35F174 for ; Sat, 28 Mar 2026 02:57:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774666637; cv=none; b=loXY3xc/a952KuhmchX26+XhWNs/SwDUtTB2NYQZGCPcDUOPspjdf/VZRoaqVkt1Fe86NeoOJOIk4zOjOuJopaKsaZZkMYHUDHp6EwkOPIed1uufjAlF+Y7dPVG0F/wF7EHqrIQ+vg/TdwzXkq65Yv6sO3iCQJlkPsYsXqxUbW8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774666637; c=relaxed/simple; bh=NvEtr+90tB0qd5+OHRXT3Y17wsy8kcUj03stEOobNUI=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=G8MdbmOfMYiVd8QW3wHq5w49MM5KvLXrP/zVMr3PtXNw5KGa5N5gU8wJvluwnjIR3KZcwtgrQrntR9NZLmRz9VLBelcuKfAYs2q4iipNkyaSp+huDKbWLRje8MdYLqZJP96Be84kd3MAL1XdZdupJY+Qq5rf9LPP135KgpPjjrM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=czpNJrrL; arc=none smtp.client-ip=209.85.214.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="czpNJrrL" Received: by mail-pl1-f172.google.com with SMTP id d9443c01a7336-2a7a9b8ed69so26766875ad.2 for ; Fri, 27 Mar 2026 19:57:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1774666635; x=1775271435; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=xyXGUv9qxBwGD2kiWjCxiVzNXgplzS5mmRBmtQ+eUqY=; b=czpNJrrLL6DiKWw74/NkJ7YSroCE05uANVK/F63I5EGgSbfnF7tTx40eBMJS+kplaH nG5hebW7rqNk85AL8+J/RinHPrVV614fRO2Xz6bl7/F3m2EEtkSir6T+xJcFBjiqQS/J VllA9XnEhsYoMh4u9yBugV9ro1sAU8Rn+ZJFjRj0JJz/Pfgz49ShWlWO9DIqQiDEN8Zq D7zdzt5aJgoVEXXuR/+ZkLOfPCjNvpPEdr/qzCFIi4ZrKXU7ZAaLD8rNhU9LRvM8XLEk 7yqwaFa7okZuvTFx8PPfpkpJdzsbyF18NVihJ6UceJaYUaFLLZmOfUmk9vH2nPpm5OVf sHgQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1774666635; x=1775271435; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=xyXGUv9qxBwGD2kiWjCxiVzNXgplzS5mmRBmtQ+eUqY=; b=G7sK45HKZK/wztP5hypNxLwQU02iBwY7p9D4dd3zWcuDkGdttsprZwlMk02EQWaswu pf8FOPpf6P235TVYwWL5LZaQHVw/RWzg2shUZ+E7NTIrnZMgJuRA0+Xz5oAmF6510Pyh irieI5U4u/h/qvDmLkJ7E2nYNYz5oHqG7J8hpoUy6emmb7CWR8DnQHgiu6I+tUhcrSMb leuJxzSJvEI8IV2gj1/oSuw487msBsK+Mwla++R/WHG97HRWEiSkphCZJJHMx2lUWsAX 6JprKn/nK8Vd59dOs0/wTrSB/SZQnZ69daILR1Sx/eUx/kto+lbJDFtQYvTuikFNTO0W 0KwA== X-Forwarded-Encrypted: i=1; AJvYcCXYr/gYxaCs064nkDBk8EBgpxEtrKHpY2u4kJ7ZO/b0XeaP80U6jUVT6Z5r9mTf/u3j6LzXt/8AOghg7oc=@vger.kernel.org X-Gm-Message-State: AOJu0YzRKZW2Fda0o0fucY2KOy6ZKG/TbiiXHchnxdEvucATYxLf3W4l n9LTeahFrYDSYrWXgCB27BCuDFQvotxa2jOXtJMWK1YP6HALGq25zHhP X-Gm-Gg: ATEYQzxiVAl7+H0MUHX97x6Qmrkvjh1j6UN01CVsGEBLdHZ07W4GgQSBB8aQj3g8vYj VhnR6wMVgZ1Zs121+23d14bs11QPOJ47hgd/XIHoXwyX4TsQPGNevcs5JAGj6OujD30SEqTkgza mAGFQwIm3PXmhRJj3Z8m9ZScUYQlkJIEs3NAe+4B/vg8I3m6kzBV4PGe0NUEOOSzEbHJgpwyku1 3T0wFOC4Na7ehWjj2oIphzBoWGJ0iB9BhAvMDf+HdDjW1p2ORi44MmIYOTosY5eInj6nq3Qc1md anbKjHm60Faxt/M2or6Mb+Lxxq/WXq5klGAKUzeA84K/e8NnBhZnSV+zXAoodGllr+DkyCUyH+J B0SEkaPSvOn9u0kbTNlMRltRHOz4wyw6ihnOb3oMHFTXx6XPhsRbAMZcDz542BxzfCf8g+ua6XS tpXVzOKV4bb050hqj+wExHfq0Db2iLd0Uy9ESS2fbVeFn7WE/sA5eRnJ0Hug== X-Received: by 2002:a17:902:f650:b0:2ae:cda1:1d2b with SMTP id d9443c01a7336-2b0cdcbaed6mr54657745ad.29.1774666634962; Fri, 27 Mar 2026 19:57:14 -0700 (PDT) Received: from localhost.localdomain ([60.49.20.42]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b24277fb50sm7194835ad.56.2026.03.27.19.57.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Mar 2026 19:57:14 -0700 (PDT) From: Khairul Anuar Romli To: Lars-Peter Clausen , Vinod Koul , Frank Li , dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, Markus.Elfring@web.de, Khairul Anuar Romli Subject: [PATCH 1/3] dmaengine: dw-axi-dmac: fix Alignment should match open parenthesis Date: Sat, 28 Mar 2026 10:56:55 +0800 Message-ID: <20260328025706.52722-2-karom.9560@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260328025706.52722-1-karom.9560@gmail.com> References: <20260328025706.52722-1-karom.9560@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" checkpatch.pl --strict reports a CHECK warning in dw-axi-dmac.c: CHECK: Alignment should match open parenthesis This warning occurs when multi-line function calls or expressions have continuation lines that don't properly align with the opening parenthesis position. Fixes all instances in dw-axi-dmac.c where continuation lines were indented with an inconsistent number of spaces/tabs that neither matched the parenthesis column nor followed a standard indent pattern. Proper alignment improves code readability and maintainability by making parameter lists visually consistent across the kernel codebase. Fixes: 0e3b67b348b8 ("dmaengine: Add support for the Analog Devices AXI-DMA= C DMA controller") Fixes: e3923592f80b ("dmaengine: axi-dmac: populate residue info for comple= ted xfers") Fixes: 3f8fd25936ee ("dmaengine: axi-dmac: Allocate hardware descriptors") Fixes: 921234e0c5d7 ("dmaengine: axi-dmac: Split too large segments") Fixes: a5b982af953b ("dmaengine: axi-dmac: add a check for devm_regmap_init= _mmio") Signed-off-by: Khairul Anuar Romli --- drivers/dma/dma-axi-dmac.c | 28 +++++++++++++++------------- 1 file changed, 15 insertions(+), 13 deletions(-) diff --git a/drivers/dma/dma-axi-dmac.c b/drivers/dma/dma-axi-dmac.c index 45c2c8e4bc45..0017f4dc6dcc 100644 --- a/drivers/dma/dma-axi-dmac.c +++ b/drivers/dma/dma-axi-dmac.c @@ -193,7 +193,7 @@ static struct axi_dmac_desc *to_axi_dmac_desc(struct vi= rt_dma_desc *vdesc) } =20 static void axi_dmac_write(struct axi_dmac *axi_dmac, unsigned int reg, - unsigned int val) + unsigned int val) { writel(val, axi_dmac->base + reg); } @@ -382,7 +382,7 @@ static void axi_dmac_start_transfer(struct axi_dmac_cha= n *chan) } =20 static inline unsigned int axi_dmac_total_sg_bytes(struct axi_dmac_chan *c= han, - struct axi_dmac_sg *sg) + struct axi_dmac_sg *sg) { if (chan->hw_2d) return (sg->hw->x_len + 1) * (sg->hw->y_len + 1); @@ -437,7 +437,7 @@ static void axi_dmac_dequeue_partial_xfers(struct axi_d= mac_chan *chan) } =20 static void axi_dmac_compute_residue(struct axi_dmac_chan *chan, - struct axi_dmac_desc *active) + struct axi_dmac_desc *active) { struct dmaengine_result *rslt =3D &active->vdesc.tx_result; unsigned int start =3D active->num_completed - 1; @@ -517,7 +517,7 @@ static bool axi_dmac_handle_cyclic_eot(struct axi_dmac_= chan *chan, } =20 static bool axi_dmac_transfer_done(struct axi_dmac_chan *chan, - unsigned int completed_transfers) + unsigned int completed_transfers) { struct axi_dmac_desc *active; struct axi_dmac_sg *sg; @@ -667,7 +667,7 @@ axi_dmac_alloc_desc(struct axi_dmac_chan *chan, unsigne= d int num_sgs) desc->chan =3D chan; =20 hws =3D dma_alloc_coherent(dev, PAGE_ALIGN(num_sgs * sizeof(*hws)), - &hw_phys, GFP_ATOMIC); + &hw_phys, GFP_ATOMIC); if (!hws) { kfree(desc); return NULL; @@ -703,9 +703,11 @@ static void axi_dmac_free_desc(struct axi_dmac_desc *d= esc) } =20 static struct axi_dmac_sg *axi_dmac_fill_linear_sg(struct axi_dmac_chan *c= han, - enum dma_transfer_direction direction, dma_addr_t addr, - unsigned int num_periods, unsigned int period_len, - struct axi_dmac_sg *sg) + enum dma_transfer_direction direction, + dma_addr_t addr, + unsigned int num_periods, + unsigned int period_len, + struct axi_dmac_sg *sg) { unsigned int num_segments, i; unsigned int segment_size; @@ -817,7 +819,7 @@ static struct dma_async_tx_descriptor *axi_dmac_prep_sl= ave_sg( } =20 dsg =3D axi_dmac_fill_linear_sg(chan, direction, sg_dma_address(sg), 1, - sg_dma_len(sg), dsg); + sg_dma_len(sg), dsg); } =20 desc->cyclic =3D false; @@ -857,7 +859,7 @@ static struct dma_async_tx_descriptor *axi_dmac_prep_dm= a_cyclic( desc->sg[num_sgs - 1].hw->flags &=3D ~AXI_DMAC_HW_FLAG_LAST; =20 axi_dmac_fill_linear_sg(chan, direction, buf_addr, num_periods, - period_len, desc->sg); + period_len, desc->sg); =20 desc->cyclic =3D true; =20 @@ -1006,7 +1008,7 @@ static void axi_dmac_adjust_chan_params(struct axi_dm= ac_chan *chan) * features are implemented and how it should behave. */ static int axi_dmac_parse_chan_dt(struct device_node *of_chan, - struct axi_dmac_chan *chan) + struct axi_dmac_chan *chan) { u32 val; int ret; @@ -1295,7 +1297,7 @@ static int axi_dmac_probe(struct platform_device *pde= v) return ret; =20 ret =3D of_dma_controller_register(pdev->dev.of_node, - of_dma_xlate_by_chan_id, dma_dev); + of_dma_xlate_by_chan_id, dma_dev); if (ret) return ret; =20 @@ -1310,7 +1312,7 @@ static int axi_dmac_probe(struct platform_device *pde= v) return ret; =20 regmap =3D devm_regmap_init_mmio(&pdev->dev, dmac->base, - &axi_dmac_regmap_config); + &axi_dmac_regmap_config); =20 return PTR_ERR_OR_ZERO(regmap); } --=20 2.43.0