From nobody Thu Apr 2 15:41:19 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D5F1B3A0B1C for ; Fri, 27 Mar 2026 23:29:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774654166; cv=none; b=OCTZOSw7vGymizUUSfCJs8OSHpuIHdN5IhJbD6/MEVjHwG3voK8zl6e6wUjOq/c94TMWkoLruSCXrQpl53G1Kov2ZYE5yunY3yQSEoK4zvVJZZ/9unY2eNQAUjxUipFvs3+lpWrVofZscVpMzCjXWkcZmN0kYKG49UOsKEMZIPQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774654166; c=relaxed/simple; bh=tosnyhh8DtswMdbD6EGU7YTtdFXnAzWlifAthWRXRV0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=QSQxM+youeNzKE5WLNC9noH2tNtkD/8apFaJSUGMOw3C3MA9D4i5nX6pXVLCJhFcWrJ5As6WDaAUGYUuZTUNly6OQFEON3r7LQUbzo7hH4ed67BJZfnUUi0/WUuS/IPLKRDIX8DQDq7Mc7WNqpEgUChh4uG5eOAwGrxHGXMye+U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=ZF7LbMiw; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=TJwDfu9K; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="ZF7LbMiw"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="TJwDfu9K" Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 62RN42ep102913 for ; Fri, 27 Mar 2026 23:29:22 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= zAAZ9np3vSaZuqX49z75F1UXFOFKtBEtrhQT2MwCAZg=; b=ZF7LbMiwEIWTAXC4 uET66UTjd2FfQFN/f+6QfhVeZPv7kCAqT6INm2CKzgWS2aAfHPbjEh9gLvH6u5rz SqeXeW/oJR/q/SSON3wifZ49R8pQZSdBZpBBsKA25UB8G740nViSgYEiLwKR3Ajw TGvDPTUfaZlpr+v1rvbhRVLZWCeAJkB1OWs+spT5PwUIiIYZH0atPAhbOnBtAL9n Ioe8RTrERxNqYUDbv7DZfgXQ0zmCtbnlItjacixof2f4FIsmhk9iD3oeOQdnxi/L OSr3m8TOCEQ1cyxqr88svMCM/oHvsTt5lO0wbUme+noo5kvg0tLvNM+O35C5/4dj e0rEqA== Received: from mail-qt1-f197.google.com (mail-qt1-f197.google.com [209.85.160.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4d5mn1388u-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 27 Mar 2026 23:29:21 +0000 (GMT) Received: by mail-qt1-f197.google.com with SMTP id d75a77b69052e-50917996cfaso27589501cf.0 for ; Fri, 27 Mar 2026 16:29:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1774654161; x=1775258961; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=zAAZ9np3vSaZuqX49z75F1UXFOFKtBEtrhQT2MwCAZg=; b=TJwDfu9KPXSjtT9tamYHnk05IMovnBONh6z1Bn09ZnUUD5E5Px/QtOk0muSvlopOuw bY1pypVSiAweKilINQlN+cG3OOIhhZ93H1iuE25DFgHT8c+mURcY7eyI85W0RvkrC9Dx t7WP9ieaI4eOPI+3ZyJeMLKRceEbNQHYcY2ERAICCmx6NemX5WKrJPZ4A6fd9/QIhh7w DqzFg5rmZpiGA4WiUTLGIkyH/As4yk+d2VwiTzfbYqx1QiQRRXTkMAYJPFSc71FUc5Of TsYZTRd+rFF6p7mH4wO1tzXn4lYU8PBujxssv73/j6pQ1TB0raCF014iA0mkbcOHVU96 5xNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1774654161; x=1775258961; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=zAAZ9np3vSaZuqX49z75F1UXFOFKtBEtrhQT2MwCAZg=; b=ZgrMZEEhN6C1tXb9CQSDplxGwSbrFmSuNgtGaRTfOVEdb9UIrMjirADrfpsGNp86dz IAY9wGbrA2JSQX5zw+TmyBkw3mPWKGLdiucgdrAMTxV3yLhdeCopZFmFxxFl6n0aXpGJ vewOCPgV6CfndEI/heWnKbuWB3EiwPD5NvHiK2ZrU4d3UnvH/ViEgulPDBPVBsFs38Sd P0C64sZ2M4BtytOwiqvCG23UZRGZI31wIJqocb9BUoeI4pQAVutnP0yBjbfNEqvYobFO DHZ4djwp6kpcwu06BeoZ9lyXnJHQUYq2OBNg+E9DrFwoMYrJRxLp5Mdhyf8q/Wrt9ANW oHHA== X-Forwarded-Encrypted: i=1; AJvYcCXXra6au3Yaese/RM4WOuHhkkUehjwCJOzmzREH1Q1CQeJ6YZHq3PWm0TarC7A+UveedbvO3RPMQkQuea4=@vger.kernel.org X-Gm-Message-State: AOJu0YxMA+ISnckMom9JVgDHu7SbyuTJi98ZJPgivNOX+ZeThW2FVt2B PFOHZBSJ5tHxNyM/SaWxfw1/Cb2P6lKKPhofX+YPFBi465rfZpSIlZgLHgOmKbikuaduyvUOc8V vfLyLZw0tkeNtt5fPFPGECpAaJicuEXRzKxX3fCYIKmv40vE89zArIw9IBZ7iUDK/3/4= X-Gm-Gg: ATEYQzwh126EmSK0d0tvrLi9Y1JfOw6KFH2/QWkh1GrijSssdOcuKVVJDk01wLN3OKC t2iKBnXEE7tNS9JIRrpw/hFrurVcwsvR5735F5hlDGtjI4tsN8g3PaIJVj3bPUnPWTDwnUYd8u0 mXgLY7stbydNUXkjMuAL4Vr/bF0AQMa9OdETcKbWneDWM0q3bvcZKCR/Z3AUFwH4glTRFSlQcJG 71I1PXzywh8LfmUbLI9ccIJH1CWGonxNfIFnJxll3VSiOy71wYHBIP6BYz7uUySyUQFK+Z1mTVh 46sWZahqs0sXEdw3JW6tpY93RPt3ouX/rDVZEhtn24N8wJBh/wPmcgt3f7UvF2OO1d3zdHLcbU9 2GbdbSAaAuwe5xDbQzPBaNrauhAZM8JsrHMaNJmxpJ/Fqly+p3hhMmHATTM5pGc7IL+7Usxu8vI oQ6zBztMY9h59NoO8L+rr/0H4Jpuso/+79I90= X-Received: by 2002:a05:622a:581a:b0:50b:29f0:299c with SMTP id d75a77b69052e-50ba393eaa2mr68083561cf.60.1774654160947; Fri, 27 Mar 2026 16:29:20 -0700 (PDT) X-Received: by 2002:a05:622a:581a:b0:50b:29f0:299c with SMTP id d75a77b69052e-50ba393eaa2mr68083331cf.60.1774654160465; Fri, 27 Mar 2026 16:29:20 -0700 (PDT) Received: from umbar.lan (2001-14ba-a073-af00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-38c83729522sm1177991fa.14.2026.03.27.16.29.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Mar 2026 16:29:18 -0700 (PDT) From: Dmitry Baryshkov Date: Sat, 28 Mar 2026 01:28:46 +0200 Subject: [PATCH v10 11/11] media: qcom: iris: extract firmware description data Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260328-iris-platform-data-v10-11-46b92bfe7b52@oss.qualcomm.com> References: <20260328-iris-platform-data-v10-0-46b92bfe7b52@oss.qualcomm.com> In-Reply-To: <20260328-iris-platform-data-v10-0-46b92bfe7b52@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=12526; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=tosnyhh8DtswMdbD6EGU7YTtdFXnAzWlifAthWRXRV0=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBpxxKpRlhJX4rfp+Vq7KdTmoWr9BA+9M3leZX3B 3zJ9PanK8KJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCaccSqQAKCRCLPIo+Aiko 1QTZB/9ChAlgKNgSaGngIWIaE1Cg9NLwfgnOHvNEDqCIn3l09rKLQGlLSuqIFBa2K68rqpzx4fU ArE+qN5ZjUBGjEhC8tE1wwo4ioYZ8TbMid+j2d2y8+4hvahe1/1k68c68i72A3Fqnzu1SG+FHNl GFcI66RpS4yLecr/JVpj0QHX1aoRxZJK6IwoUJ/PQaYZrmq8lHdK/Q6IEOVPJ0YN0RREKMZTUUW gKQc5qfxHq1JhFb/UjvszWU5ETjd2KgixWGQ91a6X3g5+rfCr4wV89KR7FYcW5METx80khN1YbM +eVJYcs1mKsPzPq42AJK/6sKbRkdqbIogYSqFS9FMNIPFjAC X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI3MDE2NSBTYWx0ZWRfX148xEteWehda 3DhKHy3s5wAl2lZqRc/Qa+9jk2ZluxRh1GTSvyBR8VahNPpctBipk8y69daoWVcINGtsF72xW1T v+ujrLVinAipzR/Vicfq71NgF/5eyx+hbm1kxoqII3o1rgyDGwSHBdYOL9gUtbQLAmTGewkpx5H pa7RPRiLBvW4Qta89CCmR/LtBqJGJ/W+eOwrG8ykf/j7y3XFvEzPL2ETZegMhmTnPMzyB7IYk02 sNTN5jdQb8aBkITU8bO41Q+Gg7zlXby0EwMrAptHJxR7jliVoiVEq8b27iE5Rth3kGalQ9CK10X ifPeDPMaF5Bdwu8LKBslr+6RsYNg8YCq1pncma7YY3zoZKzCLY+4G+zBMMa94BvaX8bk5mxA+il /3luzF9VgFfdQZNV5leSl3jmO0HvO4BQonlZppaQk3thC1AGUSTyrV//S1QsvF0p8CYzzsuVyAp xVC6OTx5RSbdQNKXxEw== X-Authority-Analysis: v=2.4 cv=CcwFJbrl c=1 sm=1 tr=0 ts=69c712d1 cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=EUspDBNiAAAA:8 a=pn2aoerzR4tYcExiNNwA:9 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 X-Proofpoint-ORIG-GUID: ckWzYzODqYcDtso2mZTdUPkS2cPvenII X-Proofpoint-GUID: ckWzYzODqYcDtso2mZTdUPkS2cPvenII X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-27_01,2026-03-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 spamscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 impostorscore=0 priorityscore=1501 clxscore=1015 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603270165 In preparation to adding support for several firmware revisions to be used for a platform, extract the firmware description data. It incorporates firmware name, HFI ops and buffer requirements of the particular firmware build. Signed-off-by: Dmitry Baryshkov --- drivers/media/platform/qcom/iris/iris_buffer.c | 2 +- drivers/media/platform/qcom/iris/iris_core.h | 1 + drivers/media/platform/qcom/iris/iris_firmware.c | 2 +- .../platform/qcom/iris/iris_hfi_gen1_command.c | 2 +- .../platform/qcom/iris/iris_platform_common.h | 15 ++++---- .../media/platform/qcom/iris/iris_platform_vpu2.c | 20 +++++++---- .../media/platform/qcom/iris/iris_platform_vpu3x.c | 41 +++++++++++++++---= ---- drivers/media/platform/qcom/iris/iris_probe.c | 3 +- 8 files changed, 57 insertions(+), 29 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_buffer.c b/drivers/media= /platform/qcom/iris/iris_buffer.c index fbe136360aa1..ef7f6f931557 100644 --- a/drivers/media/platform/qcom/iris/iris_buffer.c +++ b/drivers/media/platform/qcom/iris/iris_buffer.c @@ -295,7 +295,7 @@ static void iris_fill_internal_buf_info(struct iris_ins= t *inst, { struct iris_buffers *buffers =3D &inst->buffers[buffer_type]; =20 - buffers->size =3D inst->core->iris_platform_data->get_vpu_buffer_size(ins= t, buffer_type); + buffers->size =3D inst->core->iris_firmware_desc->get_vpu_buffer_size(ins= t, buffer_type); buffers->min_count =3D iris_vpu_buf_count(inst, buffer_type); } =20 diff --git a/drivers/media/platform/qcom/iris/iris_core.h b/drivers/media/p= latform/qcom/iris/iris_core.h index e0ca245c8c63..7f36eb65dcbf 100644 --- a/drivers/media/platform/qcom/iris/iris_core.h +++ b/drivers/media/platform/qcom/iris/iris_core.h @@ -99,6 +99,7 @@ struct iris_core { struct reset_control_bulk_data *controller_resets; const struct iris_platform_data *iris_platform_data; const struct iris_firmware_data *iris_firmware_data; + const struct iris_firmware_desc *iris_firmware_desc; const struct qcom_ubwc_cfg_data *ubwc_cfg; enum iris_core_state state; dma_addr_t iface_q_table_daddr; diff --git a/drivers/media/platform/qcom/iris/iris_firmware.c b/drivers/med= ia/platform/qcom/iris/iris_firmware.c index bc6c5c3e00c3..1a476146d758 100644 --- a/drivers/media/platform/qcom/iris/iris_firmware.c +++ b/drivers/media/platform/qcom/iris/iris_firmware.c @@ -72,7 +72,7 @@ int iris_fw_load(struct iris_core *core) ret =3D of_property_read_string_index(core->dev->of_node, "firmware-name"= , 0, &fwpath); if (ret) - fwpath =3D core->iris_platform_data->fwname; + fwpath =3D core->iris_firmware_desc->fwname; =20 ret =3D iris_load_fw_to_memory(core, fwpath); if (ret) { diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c b/dri= vers/media/platform/qcom/iris/iris_hfi_gen1_command.c index 3fb90a466a64..83373862655f 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c @@ -918,7 +918,7 @@ static int iris_hfi_gen1_set_bufsize(struct iris_inst *= inst, u32 plane) =20 if (iris_split_mode_enabled(inst)) { bufsz.type =3D HFI_BUFFER_OUTPUT; - bufsz.size =3D inst->core->iris_platform_data->get_vpu_buffer_size(inst,= BUF_DPB); + bufsz.size =3D inst->core->iris_firmware_desc->get_vpu_buffer_size(inst,= BUF_DPB); =20 ret =3D hfi_gen1_set_property(inst, ptype, &bufsz, sizeof(bufsz)); if (ret) diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index 6dfead673393..6a108173be35 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -250,14 +250,18 @@ struct iris_firmware_data { unsigned int enc_op_int_buf_tbl_size; }; =20 +struct iris_firmware_desc { + const struct iris_firmware_data *firmware_data; + u32 (*get_vpu_buffer_size)(struct iris_inst *inst, enum iris_buffer_type = buffer_type); + const char *fwname; +}; + struct iris_platform_data { /* - * XXX: remove firmware_data pointer and consider moving - * get_vpu_buffer_size pointer once we have platforms supporting both - * firmware kinds. + * XXX: replace with gen1 / gen2 pointers once we have platforms + * supporting both firmware kinds. */ - const struct iris_firmware_data *firmware_data; - u32 (*get_vpu_buffer_size)(struct iris_inst *inst, enum iris_buffer_type = buffer_type); + const struct iris_firmware_desc *firmware_desc; =20 const struct vpu_ops *vpu_ops; const struct icc_info *icc_tbl; @@ -276,7 +280,6 @@ struct iris_platform_data { const char * const *controller_rst_tbl; unsigned int controller_rst_tbl_size; u64 dma_mask; - const char *fwname; struct iris_fmt *inst_iris_fmts; u32 inst_iris_fmts_size; struct platform_inst_caps *inst_caps; diff --git a/drivers/media/platform/qcom/iris/iris_platform_vpu2.c b/driver= s/media/platform/qcom/iris/iris_platform_vpu2.c index 692fbc2aab56..ff8ce078238a 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_vpu2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_vpu2.c @@ -16,6 +16,18 @@ #include "iris_platform_sc7280.h" #include "iris_platform_sm8250.h" =20 +const struct iris_firmware_desc iris_vpu20_p1_gen1_desc =3D { + .firmware_data =3D &iris_hfi_gen1_data, + .get_vpu_buffer_size =3D iris_vpu_buf_size, + .fwname =3D "qcom/vpu/vpu20_p1.mbn", +}; + +const struct iris_firmware_desc iris_vpu20_p4_gen1_desc =3D { + .firmware_data =3D &iris_hfi_gen1_data, + .get_vpu_buffer_size =3D iris_vpu_buf_size, + .fwname =3D "qcom/vpu/vpu20_p4.mbn", +}; + static struct iris_fmt iris_fmts_vpu2_dec[] =3D { [IRIS_FMT_H264] =3D { .pixfmt =3D V4L2_PIX_FMT_H264, @@ -62,8 +74,7 @@ static const struct tz_cp_config tz_cp_config_vpu2[] =3D { }; =20 const struct iris_platform_data sc7280_data =3D { - .firmware_data =3D &iris_hfi_gen1_data, - .get_vpu_buffer_size =3D iris_vpu_buf_size, + .firmware_desc =3D &iris_vpu20_p1_gen1_desc, .vpu_ops =3D &iris_vpu2_ops, .icc_tbl =3D iris_icc_info_vpu2, .icc_tbl_size =3D ARRAY_SIZE(iris_icc_info_vpu2), @@ -78,7 +89,6 @@ const struct iris_platform_data sc7280_data =3D { .opp_clk_tbl =3D sc7280_opp_clk_table, /* Upper bound of DMA address range */ .dma_mask =3D 0xe0000000 - 1, - .fwname =3D "qcom/vpu/vpu20_p1.mbn", .inst_iris_fmts =3D iris_fmts_vpu2_dec, .inst_iris_fmts_size =3D ARRAY_SIZE(iris_fmts_vpu2_dec), .inst_caps =3D &platform_inst_cap_vpu2, @@ -93,8 +103,7 @@ const struct iris_platform_data sc7280_data =3D { }; =20 const struct iris_platform_data sm8250_data =3D { - .firmware_data =3D &iris_hfi_gen1_data, - .get_vpu_buffer_size =3D iris_vpu_buf_size, + .firmware_desc =3D &iris_vpu20_p4_gen1_desc, .vpu_ops =3D &iris_vpu2_ops, .icc_tbl =3D iris_icc_info_vpu2, .icc_tbl_size =3D ARRAY_SIZE(iris_icc_info_vpu2), @@ -111,7 +120,6 @@ const struct iris_platform_data sm8250_data =3D { .opp_clk_tbl =3D sm8250_opp_clk_table, /* Upper bound of DMA address range */ .dma_mask =3D 0xe0000000 - 1, - .fwname =3D "qcom/vpu/vpu20_p4.mbn", .inst_iris_fmts =3D iris_fmts_vpu2_dec, .inst_iris_fmts_size =3D ARRAY_SIZE(iris_fmts_vpu2_dec), .inst_caps =3D &platform_inst_cap_vpu2, diff --git a/drivers/media/platform/qcom/iris/iris_platform_vpu3x.c b/drive= rs/media/platform/qcom/iris/iris_platform_vpu3x.c index c2496aa0f851..c3b6cd6fe777 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_vpu3x.c +++ b/drivers/media/platform/qcom/iris/iris_platform_vpu3x.c @@ -17,6 +17,30 @@ #include "iris_platform_sm8650.h" #include "iris_platform_sm8750.h" =20 +const struct iris_firmware_desc iris_vpu30_p4_s6_gen2_desc =3D { + .firmware_data =3D &iris_hfi_gen2_data, + .get_vpu_buffer_size =3D iris_vpu_buf_size, + .fwname =3D "qcom/vpu/vpu30_p4_s6.mbn", +}; + +const struct iris_firmware_desc iris_vpu30_p4_gen2_desc =3D { + .firmware_data =3D &iris_hfi_gen2_data, + .get_vpu_buffer_size =3D iris_vpu_buf_size, + .fwname =3D "qcom/vpu/vpu30_p4.mbn", +}; + +const struct iris_firmware_desc iris_vpu33_p4_gen2_desc =3D { + .firmware_data =3D &iris_hfi_gen2_data, + .get_vpu_buffer_size =3D iris_vpu33_buf_size, + .fwname =3D "qcom/vpu/vpu33_p4.mbn", +}; + +const struct iris_firmware_desc iris_vpu35_p4_gen2_desc =3D { + .firmware_data =3D &iris_hfi_gen2_data, + .get_vpu_buffer_size =3D iris_vpu33_buf_size, + .fwname =3D "qcom/vpu/vpu35_p4.mbn", +}; + static struct iris_fmt iris_fmts_vpu3x_dec[] =3D { [IRIS_FMT_H264] =3D { .pixfmt =3D V4L2_PIX_FMT_H264, @@ -71,8 +95,7 @@ static const struct tz_cp_config tz_cp_config_vpu3[] =3D { * - inst_caps to platform_inst_cap_qcs8300 */ const struct iris_platform_data qcs8300_data =3D { - .firmware_data =3D &iris_hfi_gen2_data, - .get_vpu_buffer_size =3D iris_vpu_buf_size, + .firmware_desc =3D &iris_vpu30_p4_s6_gen2_desc, .vpu_ops =3D &iris_vpu3_ops, .icc_tbl =3D iris_icc_info_vpu3x, .icc_tbl_size =3D ARRAY_SIZE(iris_icc_info_vpu3x), @@ -89,7 +112,6 @@ const struct iris_platform_data qcs8300_data =3D { .opp_clk_tbl =3D iris_opp_clk_table_vpu3x, /* Upper bound of DMA address range */ .dma_mask =3D 0xe0000000 - 1, - .fwname =3D "qcom/vpu/vpu30_p4_s6.mbn", .inst_iris_fmts =3D iris_fmts_vpu3x_dec, .inst_iris_fmts_size =3D ARRAY_SIZE(iris_fmts_vpu3x_dec), .inst_caps =3D &platform_inst_cap_qcs8300, @@ -102,8 +124,7 @@ const struct iris_platform_data qcs8300_data =3D { }; =20 const struct iris_platform_data sm8550_data =3D { - .firmware_data =3D &iris_hfi_gen2_data, - .get_vpu_buffer_size =3D iris_vpu_buf_size, + .firmware_desc =3D &iris_vpu30_p4_gen2_desc, .vpu_ops =3D &iris_vpu3_ops, .icc_tbl =3D iris_icc_info_vpu3x, .icc_tbl_size =3D ARRAY_SIZE(iris_icc_info_vpu3x), @@ -120,7 +141,6 @@ const struct iris_platform_data sm8550_data =3D { .opp_clk_tbl =3D iris_opp_clk_table_vpu3x, /* Upper bound of DMA address range */ .dma_mask =3D 0xe0000000 - 1, - .fwname =3D "qcom/vpu/vpu30_p4.mbn", .inst_iris_fmts =3D iris_fmts_vpu3x_dec, .inst_iris_fmts_size =3D ARRAY_SIZE(iris_fmts_vpu3x_dec), .inst_caps =3D &platform_inst_cap_sm8550, @@ -137,11 +157,9 @@ const struct iris_platform_data sm8550_data =3D { * - vpu_ops to iris_vpu33_ops * - clk_rst_tbl to sm8650_clk_reset_table * - controller_rst_tbl to sm8650_controller_reset_table - * - fwname to "qcom/vpu/vpu33_p4.mbn" */ const struct iris_platform_data sm8650_data =3D { - .firmware_data =3D &iris_hfi_gen2_data, - .get_vpu_buffer_size =3D iris_vpu33_buf_size, + .firmware_desc =3D &iris_vpu33_p4_gen2_desc, .vpu_ops =3D &iris_vpu33_ops, .icc_tbl =3D iris_icc_info_vpu3x, .icc_tbl_size =3D ARRAY_SIZE(iris_icc_info_vpu3x), @@ -160,7 +178,6 @@ const struct iris_platform_data sm8650_data =3D { .opp_clk_tbl =3D iris_opp_clk_table_vpu3x, /* Upper bound of DMA address range */ .dma_mask =3D 0xe0000000 - 1, - .fwname =3D "qcom/vpu/vpu33_p4.mbn", .inst_iris_fmts =3D iris_fmts_vpu3x_dec, .inst_iris_fmts_size =3D ARRAY_SIZE(iris_fmts_vpu3x_dec), .inst_caps =3D &platform_inst_cap_sm8550, @@ -173,8 +190,7 @@ const struct iris_platform_data sm8650_data =3D { }; =20 const struct iris_platform_data sm8750_data =3D { - .firmware_data =3D &iris_hfi_gen2_data, - .get_vpu_buffer_size =3D iris_vpu33_buf_size, + .firmware_desc =3D &iris_vpu35_p4_gen2_desc, .vpu_ops =3D &iris_vpu35_ops, .icc_tbl =3D iris_icc_info_vpu3x, .icc_tbl_size =3D ARRAY_SIZE(iris_icc_info_vpu3x), @@ -191,7 +207,6 @@ const struct iris_platform_data sm8750_data =3D { .opp_clk_tbl =3D iris_opp_clk_table_vpu3x, /* Upper bound of DMA address range */ .dma_mask =3D 0xe0000000 - 1, - .fwname =3D "qcom/vpu/vpu35_p4.mbn", .inst_iris_fmts =3D iris_fmts_vpu3x_dec, .inst_iris_fmts_size =3D ARRAY_SIZE(iris_fmts_vpu3x_dec), .inst_caps =3D &platform_inst_cap_sm8550, diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/= platform/qcom/iris/iris_probe.c index dd87504c2e67..d36f0c0e785b 100644 --- a/drivers/media/platform/qcom/iris/iris_probe.c +++ b/drivers/media/platform/qcom/iris/iris_probe.c @@ -251,7 +251,8 @@ static int iris_probe(struct platform_device *pdev) return core->irq; =20 core->iris_platform_data =3D of_device_get_match_data(core->dev); - core->iris_firmware_data =3D core->iris_platform_data->firmware_data; + core->iris_firmware_desc =3D core->iris_platform_data->firmware_desc; + core->iris_firmware_data =3D core->iris_firmware_desc->firmware_data; =20 core->ubwc_cfg =3D qcom_ubwc_config_get_data(); if (IS_ERR(core->ubwc_cfg)) --=20 2.47.3