From nobody Thu Apr 2 17:08:23 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 78B6827A45C; Fri, 27 Mar 2026 18:26:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774635990; cv=none; b=sZ1Gl/wif3XUnnCntXoa4/1C37uD/lvQnlbrqTpuEYoBfeFMCzEOeenLTMyk6zYslZa/+1qCtavxEyggUBuFPEskg9ATnSl+rhnKLezZW2yaE8Ta3Ec11keGluq+OZxG9VyVjDLhBWnLfiNaML5blqUczYdg6oosPNEp6MZqhhY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774635990; c=relaxed/simple; bh=GgicZ8U4RndZ78Un1Mkb90pkgpyXW/4ySWH8xaBkaTA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JNu+8GUj/jwhZavui6cM80eRJjwzuBIIozbWUe+plbMWn3tloYdfRjHrs0az5TeIFz1apDdOs1s0w6dGxMX0oBKh+02SzEdu0VP07FqPr8PhKXCX3LK2kBo9aB6VesImf8NNljlmm7ciZg19NCputoTIDxCZmAu6jpGXr8ZN91Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=h5wGJWxw; arc=none smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="h5wGJWxw" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774635982; x=1806171982; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=GgicZ8U4RndZ78Un1Mkb90pkgpyXW/4ySWH8xaBkaTA=; b=h5wGJWxwGIG0VmtWEuxb12Xq7+dV4F1BT3j94+vEJFSowps5il7xwegK T3B8W9ZQjkJouCwT1E7qmpocfIKZsQfIWeGzmo0CLHRwcYkGndVXBbMAu aHAvPFwEOT2QjEsj2qDj3Vi2dPjYupWfheHkwpS5PXMTHS1VswSl/rlDv LKSZ2AA5jBkumo8CT8AU2EOFkpkXgRZvH8yA34/xIiMGWzcXIq9I7up0y JYJRhKl0ZWgiyvb6WotXF5eMTC8YXFh3pgVdSCtrJZaaZNJE0/Syg5S8Y 7uieqFrMBIWIq03kUaSxhbrAikw7+KE5eZHP6o8cF45ZAClr26p9A1UE1 Q==; X-CSE-ConnectionGUID: PN2FCWhmTLGHAC5bIkuhmg== X-CSE-MsgGUID: bVtRPYT+QsCief6gfej1uw== X-IronPort-AV: E=McAfee;i="6800,10657,11742"; a="74746444" X-IronPort-AV: E=Sophos;i="6.23,144,1770624000"; d="scan'208";a="74746444" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Mar 2026 11:26:17 -0700 X-CSE-ConnectionGUID: 0lEmxBctT9K68ZSjrXq6dA== X-CSE-MsgGUID: hmTOU4JATLO4YHjdimNijQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,144,1770624000"; d="scan'208";a="218773018" Received: from intel-nuc8i7beh.iind.intel.com ([10.223.163.35]) by fmviesa009.fm.intel.com with ESMTP; 27 Mar 2026 11:26:15 -0700 From: Arun T To: arun.t@intel.com, johannes.goede@oss.qualcomm.com Cc: sakari.ailus@linux.intel.com, arec.kao@intel.com, ilpo.jarvinen@linux.intel.com, dan.scally@ideasonboard.com, platform-driver-x86@vger.kernel.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, mehdi.djait@intel.com Subject: [PATCH v6 1/2] platform/x86: int3472: Add TPS68470 board data for Intel nvl Date: Fri, 27 Mar 2026 23:49:57 +0530 Message-ID: <20260327181959.3528753-2-arun.t@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260327181959.3528753-1-arun.t@intel.com> References: <20260327181959.3528753-1-arun.t@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Intel NVL platform uses IPU8 is powered by a TPS68470 PMIC,requiring bo= ard data to configure the GPIOs and regulators for proper camera sensor operati= on. Signed-off-by: Arun T Reviewed-by: Daniel Scally Reviewed-by: Hans de Goede --- .../x86/intel/int3472/tps68470_board_data.c | 121 ++++++++++++++++++ 1 file changed, 121 insertions(+) diff --git a/drivers/platform/x86/intel/int3472/tps68470_board_data.c b/dri= vers/platform/x86/intel/int3472/tps68470_board_data.c index 71357a036292..f0309fd1e515 100644 --- a/drivers/platform/x86/intel/int3472/tps68470_board_data.c +++ b/drivers/platform/x86/intel/int3472/tps68470_board_data.c @@ -143,6 +143,20 @@ static struct regulator_consumer_supply int3479_aux2_c= onsumer_supplies[] =3D { REGULATOR_SUPPLY("dovdd", "i2c-INT3479:00"), }; =20 +/* Settings for Intel NVL platform */ + +static struct regulator_consumer_supply ovti13b1_core_consumer_supplies[] = =3D { + REGULATOR_SUPPLY("dvdd", "i2c-OVTI13B1:01"), +}; + +static struct regulator_consumer_supply ovti13b1_ana_consumer_supplies[] = =3D { + REGULATOR_SUPPLY("avdd", "i2c-OVTI13B1:01"), +}; + +static struct regulator_consumer_supply ovti13b1_vsio_consumer_supplies[] = =3D { + REGULATOR_SUPPLY("dovdd", "i2c-OVTI13B1:01"), +}; + static const struct regulator_init_data dell_7212_tps68470_core_reg_init_d= ata =3D { .constraints =3D { .min_uV =3D 1200000, @@ -220,6 +234,77 @@ static const struct regulator_init_data dell_7212_tps6= 8470_aux2_reg_init_data =3D .consumer_supplies =3D int3479_aux2_consumer_supplies, }; =20 +static const struct regulator_init_data intel_nvl_tps68470_core_reg_init_d= ata =3D { + .constraints =3D { + .min_uV =3D 1200000, + .max_uV =3D 1200000, + .apply_uV =3D true, + .valid_ops_mask =3D REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies =3D ARRAY_SIZE(ovti13b1_core_consumer_supplies), + .consumer_supplies =3D ovti13b1_core_consumer_supplies, +}; + +static const struct regulator_init_data intel_nvl_tps68470_ana_reg_init_da= ta =3D { + .constraints =3D { + .min_uV =3D 2815200, + .max_uV =3D 2815200, + .apply_uV =3D true, + .valid_ops_mask =3D REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies =3D ARRAY_SIZE(ovti13b1_ana_consumer_supplies), + .consumer_supplies =3D ovti13b1_ana_consumer_supplies, +}; + +static const struct regulator_init_data intel_nvl_tps68470_vcm_reg_init_da= ta =3D { + .constraints =3D { + .min_uV =3D 2815200, + .max_uV =3D 2815200, + .apply_uV =3D true, + .valid_ops_mask =3D REGULATOR_CHANGE_STATUS, + }, + +}; + +/* Ensure the always-on VIO regulator has the same voltage as VSIO */ +static const struct regulator_init_data intel_nvl_tps68470_vio_reg_init_da= ta =3D { + .constraints =3D { + .min_uV =3D 1800600, + .max_uV =3D 1800600, + .apply_uV =3D true, + .always_on =3D true, + }, +}; + +static const struct regulator_init_data intel_nvl_tps68470_vsio_reg_init_d= ata =3D { + .constraints =3D { + .min_uV =3D 1800600, + .max_uV =3D 1800600, + .apply_uV =3D true, + .valid_ops_mask =3D REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies =3D ARRAY_SIZE(ovti13b1_vsio_consumer_supplies), + .consumer_supplies =3D ovti13b1_vsio_consumer_supplies, +}; + +static const struct regulator_init_data intel_nvl_tps68470_aux1_reg_init_d= ata =3D { + .constraints =3D { + .min_uV =3D 2815200, + .max_uV =3D 2815200, + .apply_uV =3D 1, + .valid_ops_mask =3D REGULATOR_CHANGE_STATUS, + }, +}; + +static const struct regulator_init_data intel_nvl_tps68470_aux2_reg_init_d= ata =3D { + .constraints =3D { + .min_uV =3D 1800600, + .max_uV =3D 1800600, + .apply_uV =3D 1, + .valid_ops_mask =3D REGULATOR_CHANGE_STATUS, + }, +}; + static const struct tps68470_regulator_platform_data dell_7212_tps68470_pd= ata =3D { .reg_init_data =3D { [TPS68470_CORE] =3D &dell_7212_tps68470_core_reg_init_data, @@ -232,6 +317,18 @@ static const struct tps68470_regulator_platform_data d= ell_7212_tps68470_pdata =3D }, }; =20 +static const struct tps68470_regulator_platform_data intel_nvl_tps68470_pd= ata =3D { + .reg_init_data =3D { + [TPS68470_CORE] =3D &intel_nvl_tps68470_core_reg_init_data, + [TPS68470_ANA] =3D &intel_nvl_tps68470_ana_reg_init_data, + [TPS68470_VCM] =3D &intel_nvl_tps68470_vcm_reg_init_data, + [TPS68470_VIO] =3D &intel_nvl_tps68470_vio_reg_init_data, + [TPS68470_VSIO] =3D &intel_nvl_tps68470_vsio_reg_init_data, + [TPS68470_AUX1] =3D &intel_nvl_tps68470_aux1_reg_init_data, + [TPS68470_AUX2] =3D &intel_nvl_tps68470_aux2_reg_init_data, + }, +}; + static struct gpiod_lookup_table surface_go_int347a_gpios =3D { .dev_id =3D "i2c-INT347A:00", .table =3D { @@ -258,6 +355,14 @@ static struct gpiod_lookup_table dell_7212_int3479_gpi= os =3D { } }; =20 +static struct gpiod_lookup_table intel_nvl_ovti13b1_gpios =3D { + .dev_id =3D "i2c-OVTI13B1:01", + .table =3D { + GPIO_LOOKUP("tps68470-gpio", 9, "reset", GPIO_ACTIVE_LOW), + { } + } +}; + static const struct int3472_tps68470_board_data surface_go_tps68470_board_= data =3D { .dev_name =3D "i2c-INT3472:05", .tps68470_regulator_pdata =3D &surface_go_tps68470_pdata, @@ -287,6 +392,15 @@ static const struct int3472_tps68470_board_data dell_7= 212_tps68470_board_data =3D }, }; =20 +static const struct int3472_tps68470_board_data intel_nvl_tps68470_board_d= ata =3D { + .dev_name =3D "i2c-INT3472:04", + .tps68470_regulator_pdata =3D &intel_nvl_tps68470_pdata, + .n_gpiod_lookups =3D 1, + .tps68470_gpio_lookup_tables =3D { + &intel_nvl_ovti13b1_gpios, + }, +}; + static const struct dmi_system_id int3472_tps68470_board_data_table[] =3D { { .matches =3D { @@ -316,6 +430,13 @@ static const struct dmi_system_id int3472_tps68470_boa= rd_data_table[] =3D { }, .driver_data =3D (void *)&dell_7212_tps68470_board_data, }, + { + .matches =3D { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Intel Corporation"), + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Nova Lake Client Platform"), + }, + .driver_data =3D (void *)&intel_nvl_tps68470_board_data, + }, { } }; =20 --=20 2.43.0