From nobody Thu Apr 2 17:10:00 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 59A453FEB1B for ; Fri, 27 Mar 2026 17:55:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774634160; cv=none; b=PhlUr1KoVB+CcLNHy3jo2hrU/9jl+790P0BLiU9KszEB/SvEJMpdeLIcbEykxQkzsHbmTftuh7UuwZAI8V63knpXtXypazMdUI9unjrrK3XjcpHjb9AoNZ8AdEl/2ZK6cSNM1ZxlwCc7jcr4fVParf8BNwvJHE9REnlLTO7To9I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774634160; c=relaxed/simple; bh=6VMELURq/QqF9iasRhmGpYOPp+WVfGDU26yJiywk46s=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ar1fljC8jcE7KeobnXkbABRAwRMDGoeFlnlJSdHT1kgQ2XBuIGcRVM8BqThV45dXOK6nBJyXKU6IDGCWbCrzOpAkdYWK9Y6qXHnQoJEmxXczIxRvE+1b6zqtGgQPe5E2um+em1ouabfIeJS5vQb7Xum4QA6rSsyd2LoV1Bx0GB8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Tr2Hvdge; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Tr2Hvdge" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D23A8C2BCB0; Fri, 27 Mar 2026 17:55:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1774634159; bh=6VMELURq/QqF9iasRhmGpYOPp+WVfGDU26yJiywk46s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Tr2HvdgehY6UchLQvk6Ht1ZRogPcs72Ccf4wbrBTHSSinZLqUSfmfyGIT0IS0vuWU +YAX1wLPU8KjCr2tETzLrPQoVg/FicumRZH3baXgxIUnCiQc1hG5L3w1dfdHMZXkYt 6XtoWhjlXUuNaPMobUcoNJX9IJuB8crWZECPbTC0qU/jWHB3mOky3CnmP+yTF2rAJM J8aWgmea8/w3ci9QMD1twupHqhddkGBld8ndGS2VcPTU13TRjeV9lcrkenobEhq5MU 2VNJfIiUESy/F4ndwe7rFhqYFL0cyyvXseqZqYc1I7IzMygAkAG2Y0aSPCMcbTEs+w gya1LT+tdJLFw== From: Daniel Lezcano To: daniel.lezcano@kernel.org, tglx@kernel.org, zhipeng.wang_1@nxp.com Cc: shawnguo@kernel.org, jstultz@google.com, linux-kernel@vger.kernel.org, Heiko Stuebner , linux-arm-kernel@lists.infradead.org (moderated list:ARM/Rockchip SoC support), linux-rockchip@lists.infradead.org (open list:ARM/Rockchip SoC support) Subject: [PATCH v1 2/7] drivers/clocksource/rockchip: Use the TIMER_PDEV_DECLARE() macro Date: Fri, 27 Mar 2026 18:55:24 +0100 Message-ID: <20260327175533.3044-4-daniel.lezcano@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260327175533.3044-1-daniel.lezcano@kernel.org> References: <20260327175533.3044-1-daniel.lezcano@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The previous change introduce the TIMER_PDEV_DECLARE() marco which allows to use the platform driver to initialize a timer driver with the benefit of having the devres to rollback automatically in case of error. Use this macro and change the function to rely on the devm_ variants, allowing to cleanup the code. Signed-off-by: Daniel Lezcano --- drivers/clocksource/timer-rockchip.c | 99 ++++++++++------------------ 1 file changed, 34 insertions(+), 65 deletions(-) diff --git a/drivers/clocksource/timer-rockchip.c b/drivers/clocksource/tim= er-rockchip.c index 540a16667145..486bbffba464 100644 --- a/drivers/clocksource/timer-rockchip.c +++ b/drivers/clocksource/timer-rockchip.c @@ -124,18 +124,18 @@ static u64 notrace rk_timer_sched_read(void) return ~readl_relaxed(rk_clksrc->base + TIMER_CURRENT_VALUE0); } =20 -static int __init -rk_timer_probe(struct rk_timer *timer, struct device_node *np) +static int rk_timer_init(struct rk_timer *timer, struct device *dev) { + struct device_node *np =3D dev->of_node; struct clk *timer_clk; struct clk *pclk; - int ret =3D -EINVAL, irq; + int irq; u32 ctrl_reg =3D TIMER_CONTROL_REG3288; =20 - timer->base =3D of_iomap(np, 0); - if (!timer->base) { + timer->base =3D devm_of_iomap(dev, np, 0, NULL); + if (IS_ERR(timer->base)) { pr_err("Failed to get base address for '%s'\n", TIMER_NAME); - return -ENXIO; + return PTR_ERR(timer->base); } =20 if (of_device_is_compatible(np, "rockchip,rk3399-timer")) @@ -143,31 +143,17 @@ rk_timer_probe(struct rk_timer *timer, struct device_= node *np) =20 timer->ctrl =3D timer->base + ctrl_reg; =20 - pclk =3D of_clk_get_by_name(np, "pclk"); + pclk =3D devm_clk_get_enabled(dev, "pclk"); if (IS_ERR(pclk)) { - ret =3D PTR_ERR(pclk); pr_err("Failed to get pclk for '%s'\n", TIMER_NAME); - goto out_unmap; - } - - ret =3D clk_prepare_enable(pclk); - if (ret) { - pr_err("Failed to enable pclk for '%s'\n", TIMER_NAME); - goto out_unmap; + return PTR_ERR(pclk); } timer->pclk =3D pclk; =20 - timer_clk =3D of_clk_get_by_name(np, "timer"); + timer_clk =3D devm_clk_get_enabled(dev, "timer"); if (IS_ERR(timer_clk)) { - ret =3D PTR_ERR(timer_clk); pr_err("Failed to get timer clock for '%s'\n", TIMER_NAME); - goto out_timer_clk; - } - - ret =3D clk_prepare_enable(timer_clk); - if (ret) { - pr_err("Failed to enable timer clock\n"); - goto out_timer_clk; + return PTR_ERR(timer_clk); } timer->clk =3D timer_clk; =20 @@ -175,47 +161,32 @@ rk_timer_probe(struct rk_timer *timer, struct device_= node *np) =20 irq =3D irq_of_parse_and_map(np, 0); if (!irq) { - ret =3D -EINVAL; pr_err("Failed to map interrupts for '%s'\n", TIMER_NAME); - goto out_irq; + return -EINVAL; } timer->irq =3D irq; =20 rk_timer_interrupt_clear(timer); rk_timer_disable(timer); - return 0; - -out_irq: - clk_disable_unprepare(timer_clk); -out_timer_clk: - clk_disable_unprepare(pclk); -out_unmap: - iounmap(timer->base); - - return ret; -} =20 -static void __init rk_timer_cleanup(struct rk_timer *timer) -{ - clk_disable_unprepare(timer->clk); - clk_disable_unprepare(timer->pclk); - iounmap(timer->base); + return 0; } =20 -static int __init rk_clkevt_init(struct device_node *np) +static int rk_clkevt_init(struct platform_device *pdev) { + struct device *dev =3D &pdev->dev; struct clock_event_device *ce; int ret =3D -EINVAL; =20 - rk_clkevt =3D kzalloc_obj(struct rk_clkevt); + rk_clkevt =3D devm_kzalloc(dev, sizeof(*rk_clkevt), GFP_KERNEL); if (!rk_clkevt) { ret =3D -ENOMEM; goto out; } =20 - ret =3D rk_timer_probe(&rk_clkevt->timer, np); + ret =3D rk_timer_init(&rk_clkevt->timer, dev); if (ret) - goto out_probe; + goto out; =20 ce =3D &rk_clkevt->ce; ce->name =3D TIMER_NAME; @@ -233,36 +204,33 @@ static int __init rk_clkevt_init(struct device_node *= np) if (ret) { pr_err("Failed to initialize '%s': %d\n", TIMER_NAME, ret); - goto out_irq; + goto out; } =20 clockevents_config_and_register(&rk_clkevt->ce, rk_clkevt->timer.freq, 1, UINT_MAX); return 0; =20 -out_irq: - rk_timer_cleanup(&rk_clkevt->timer); -out_probe: - kfree(rk_clkevt); out: /* Leave rk_clkevt not NULL to prevent future init */ rk_clkevt =3D ERR_PTR(ret); return ret; } =20 -static int __init rk_clksrc_init(struct device_node *np) +static int rk_clksrc_init(struct platform_device *pdev) { + struct device *dev =3D &pdev->dev; int ret =3D -EINVAL; =20 - rk_clksrc =3D kzalloc_obj(struct rk_timer); + rk_clksrc =3D devm_kzalloc(dev, sizeof(*rk_clksrc), GFP_KERNEL); if (!rk_clksrc) { ret =3D -ENOMEM; goto out; } =20 - ret =3D rk_timer_probe(rk_clksrc, np); + ret =3D rk_timer_init(rk_clksrc, dev); if (ret) - goto out_probe; + goto out; =20 rk_timer_update_counter(UINT_MAX, rk_clksrc); rk_timer_enable(rk_clksrc, 0); @@ -272,33 +240,34 @@ static int __init rk_clksrc_init(struct device_node *= np) clocksource_mmio_readl_down); if (ret) { pr_err("Failed to register clocksource\n"); - goto out_clocksource; + goto out; } =20 sched_clock_register(rk_timer_sched_read, 32, rk_clksrc->freq); return 0; =20 -out_clocksource: - rk_timer_cleanup(rk_clksrc); -out_probe: - kfree(rk_clksrc); out: /* Leave rk_clksrc not NULL to prevent future init */ rk_clksrc =3D ERR_PTR(ret); return ret; } =20 -static int __init rk_timer_init(struct device_node *np) +static int rk_timer_probe(struct platform_device *pdev) { if (!rk_clkevt) - return rk_clkevt_init(np); + return rk_clkevt_init(pdev); =20 if (!rk_clksrc) - return rk_clksrc_init(np); + return rk_clksrc_init(pdev); =20 pr_err("Too many timer definitions for '%s'\n", TIMER_NAME); return -EINVAL; } =20 -TIMER_OF_DECLARE(rk3288_timer, "rockchip,rk3288-timer", rk_timer_init); -TIMER_OF_DECLARE(rk3399_timer, "rockchip,rk3399-timer", rk_timer_init); +static const struct of_device_id rk_timer_match_table[] =3D { + { .compatible =3D "rockchip,rk3288-timer" }, + { .compatible =3D "rockchip,rk3399-timer" }, + { /* sentinel */ } +}; + +TIMER_PDEV_DECLARE(rk_timer, rk_timer_probe, NULL, rk_timer_match_table); --=20 2.43.0