From nobody Thu Apr 2 17:07:31 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D5C353F8E03; Fri, 27 Mar 2026 16:23:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.14 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774628622; cv=none; b=RDeozXimClwPuI1FPeRZyABACXtdWDnBZ/TXndIHtLLvTK9gj4THQIHBVpvcCBx0OylJimAZCDX2CUk3Eu9Qh1N+8JfNaZoeLpizF121VtTgRM6LrAaiPvJGfehDL5wOTZZTXa6LjNQzD4oCHfK+3wQC+zm9NKa/GYn5yS6g9hQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774628622; c=relaxed/simple; bh=MjaiQQUsi0uHldZUeFA1C5Pe04DjmHcDoKFmUK/lKgU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=aAow05O0AuTimNA+g8s57REgOOSQcsmCuvi2UDuwhQpBZv6SOBbRkEHluUt7JZc+deY9ZrNYJ07qYOPcsgPWZmR20uAiwv3Xl0xZvyyxiVXZzlsvThumQ+IRUNeT09bL2jG5t9h904wyDxd4v6OP6Z5hip8ICRYEPp3cDIf/azE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Wb5iqVUj; arc=none smtp.client-ip=198.175.65.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Wb5iqVUj" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774628620; x=1806164620; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MjaiQQUsi0uHldZUeFA1C5Pe04DjmHcDoKFmUK/lKgU=; b=Wb5iqVUjKP/cvh6yTbA3I1qlZv/Ek3FFwY79eCRaeCAVkcxBoFTfpOdf 4PZtAwlN36WdWs4i0x1lLUyNfT1fmyPesW8+A9XmaNiIVgIeDKEcgxSD3 njuWnIIpIxZjKNWWzDsxFofqn0cfpKHb3wMR+igPJAgKDECDyO3Pej1lP PSH4feo6ZqJlPEuM51rn6F61lD9pt3ikCeRYoJ5AqFRbEbN5R5CpZjmTr ciO8hAvBURS8OizE3UEso6Xr8WsU4bP3DWPLx11FjscyYN89fJnwolvPM FHcnHhFvd8ifuKTU5faQhNc0R1TReU6fUv0W5B2Cra8ZqiV8FnVxYapuz g==; X-CSE-ConnectionGUID: KJ1yOLFfRVSeAqLeqmLifg== X-CSE-MsgGUID: iJJY8QokSS6SJLO74035hQ== X-IronPort-AV: E=McAfee;i="6800,10657,11741"; a="79565627" X-IronPort-AV: E=Sophos;i="6.23,144,1770624000"; d="scan'208";a="79565627" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Mar 2026 09:23:40 -0700 X-CSE-ConnectionGUID: xAnUCVlMRKC4eFHIu1Fh1A== X-CSE-MsgGUID: cUCaAbRwT5ywKqcI65ywdA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,144,1770624000"; d="scan'208";a="220516302" Received: from yilunxu-optiplex-7050.sh.intel.com ([10.239.159.165]) by fmviesa006.fm.intel.com with ESMTP; 27 Mar 2026 09:23:37 -0700 From: Xu Yilun To: linux-coco@lists.linux.dev, linux-pci@vger.kernel.org, dan.j.williams@intel.com, x86@kernel.org Cc: chao.gao@intel.com, dave.jiang@intel.com, baolu.lu@linux.intel.com, yilun.xu@linux.intel.com, yilun.xu@intel.com, zhenzhong.duan@intel.com, kvm@vger.kernel.org, rick.p.edgecombe@intel.com, dave.hansen@linux.intel.com, kas@kernel.org, xiaoyao.li@intel.com, vishal.l.verma@intel.com, linux-kernel@vger.kernel.org Subject: [PATCH v2 18/31] iommu/vt-d: Cache max domain ID to avoid redundant calculation Date: Sat, 28 Mar 2026 00:01:19 +0800 Message-Id: <20260327160132.2946114-19-yilun.xu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260327160132.2946114-1-yilun.xu@linux.intel.com> References: <20260327160132.2946114-1-yilun.xu@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Lu Baolu The cap_ndoms() helper calculates the maximum available domain ID from the value of capability register, which can be inefficient if called repeatedly. Cache the maximum supported domain ID in max_domain_id field during initialization to avoid redundant calls to cap_ndoms() throughout the IOMMU driver. No functionality change. Signed-off-by: Lu Baolu Signed-off-by: Xu Yilun --- drivers/iommu/intel/iommu.h | 1 + drivers/iommu/intel/dmar.c | 1 + drivers/iommu/intel/iommu.c | 10 +++++----- 3 files changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h index 599913fb65d5..4a21ab6a311d 100644 --- a/drivers/iommu/intel/iommu.h +++ b/drivers/iommu/intel/iommu.h @@ -705,6 +705,7 @@ struct intel_iommu { /* mutex to protect domain_ida */ struct mutex did_lock; struct ida domain_ida; /* domain id allocator */ + unsigned long max_domain_id; unsigned long *copied_tables; /* bitmap of copied tables */ spinlock_t lock; /* protect context, domain ids */ struct root_entry *root_entry; /* virtual address */ diff --git a/drivers/iommu/intel/dmar.c b/drivers/iommu/intel/dmar.c index d68c06025cac..93efd1a5dc5b 100644 --- a/drivers/iommu/intel/dmar.c +++ b/drivers/iommu/intel/dmar.c @@ -1099,6 +1099,7 @@ static int alloc_iommu(struct dmar_drhd_unit *drhd) spin_lock_init(&iommu->lock); ida_init(&iommu->domain_ida); mutex_init(&iommu->did_lock); + iommu->max_domain_id =3D cap_ndoms(iommu->cap); =20 ver =3D readl(iommu->reg + DMAR_VER_REG); pr_info("%s: reg_base_addr %llx ver %d:%d cap %llx ecap %llx\n", diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index ef7613b177b9..9a57f78647ed 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -1043,7 +1043,7 @@ int domain_attach_iommu(struct dmar_domain *domain, s= truct intel_iommu *iommu) } =20 num =3D ida_alloc_range(&iommu->domain_ida, IDA_START_DID, - cap_ndoms(iommu->cap) - 1, GFP_KERNEL); + iommu->max_domain_id - 1, GFP_KERNEL); if (num < 0) { pr_err("%s: No free domain ids\n", iommu->name); goto err_unlock; @@ -1107,7 +1107,7 @@ static void copied_context_tear_down(struct intel_iom= mu *iommu, did_old =3D context_domain_id(context); context_clear_entry(context); =20 - if (did_old < cap_ndoms(iommu->cap)) { + if (did_old < iommu->max_domain_id) { iommu->flush.flush_context(iommu, did_old, PCI_DEVID(bus, devfn), DMA_CCMD_MASK_NOBIT, @@ -1505,7 +1505,7 @@ static int copy_context_table(struct intel_iommu *iom= mu, continue; =20 did =3D context_domain_id(&ce); - if (did >=3D 0 && did < cap_ndoms(iommu->cap)) + if (did >=3D 0 && did < iommu->max_domain_id) ida_alloc_range(&iommu->domain_ida, did, did, GFP_KERNEL); =20 set_context_copied(iommu, bus, devfn); @@ -2425,7 +2425,7 @@ static ssize_t domains_supported_show(struct device *= dev, struct device_attribute *attr, char *buf) { struct intel_iommu *iommu =3D dev_to_intel_iommu(dev); - return sysfs_emit(buf, "%ld\n", cap_ndoms(iommu->cap)); + return sysfs_emit(buf, "%ld\n", iommu->max_domain_id); } static DEVICE_ATTR_RO(domains_supported); =20 @@ -2436,7 +2436,7 @@ static ssize_t domains_used_show(struct device *dev, unsigned int count =3D 0; int id; =20 - for (id =3D 0; id < cap_ndoms(iommu->cap); id++) + for (id =3D 0; id < iommu->max_domain_id; id++) if (ida_exists(&iommu->domain_ida, id)) count++; =20 --=20 2.25.1