From nobody Thu Apr 2 17:16:40 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 8822C3BF66E; Fri, 27 Mar 2026 11:30:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774611022; cv=none; b=NhPSIv4QrAejc3lIy65i6F5Q8Z7BxxbRGE0LSUgWZMDSTKwsPAh7m/amhTZ5XLZZPLZTytIkIsVj7RdLc8UDSNFyOP0wyBvXegk4CNgM7bm+eSwXzQM9ycaAxPf5QiMbqTBTvF7PRqfosH4UqwRedjIdSvlrfwVy0exc2C+KBJM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774611022; c=relaxed/simple; bh=P+xaz+0AM8oCDJ+fmGXliUwK+vicc4AlZE4yIXarY4w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=gS8beZYdqZp+B8TBhEBOKzLcB6Kau1+B8skriA51ZCtCFCi/4S/HdkWu9tO6zQuDaMjT2Auseh43/4S4FGlTrwnOdMaHwf5XgQnVkqnTMEMkDFQ4n5LWDZgpMZQgeYvYSZiDDzljxV4KdpbapVnmiQJoqyQv111GGI4qztfrTQw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=AErEQxpS; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="AErEQxpS" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B04A135A5; Fri, 27 Mar 2026 04:30:11 -0700 (PDT) Received: from e142021.cambridge.arm.com (e142021.arm.com [10.1.36.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 18AFE3F915; Fri, 27 Mar 2026 04:30:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1774611017; bh=P+xaz+0AM8oCDJ+fmGXliUwK+vicc4AlZE4yIXarY4w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AErEQxpSUdhG8nEWVAHMVM7xjAnbqOhcqrCDh7JsHrAs8oudY6AO9ntvfslMtBgny LMsa1o8flPTUNvAx1+9UTyzXeBiFo87WT4urbLcLpBGYvXFHO+TJ9NN+Akt36kNN1n 7I1CX50Iaw4x2kFzc8HYE3VrsR9A+bSaE4VUJzbA= From: Andre Przywara To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/3] pinctrl: sunxi: a523: Remove unneeded IRQ remuxing flag Date: Fri, 27 Mar 2026 11:30:04 +0000 Message-ID: <20260327113006.3135663-2-andre.przywara@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260327113006.3135663-1-andre.przywara@arm.com> References: <20260327113006.3135663-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Allwinner A10 and H3 SoCs cannot read the state of a GPIO line when that line is muxed for IRQ triggering (muxval 6), but only if it's explicitly muxed for GPIO input (muxval 0). Other SoCs do not show this behaviour, so we added a optional workaround, triggered by a quirk bit, which triggers remuxing the pin when it's configured for IRQ, while we need to read its value. For some reasons this quirk flag was copied over to newer SoCs, even though they don't show this behaviour, and the GPIO data register reflects the true GPIO state even with a pin muxed to IRQ trigger. Remove the unneeded quirk from the A523 family, where it's definitely not needed (confirmed by experiments), and where it actually breaks, because the workaround is not compatible with the newer generation pinctrl IP used in that chip. Together with a DT change this fixes GPIO IRQ operation on the A523 family of SoCs, as for instance used for the SD card detection. Signed-off-by: Andre Przywara Fixes: b8a51e95b376 ("pinctrl: sunxi: Add support for the secondary A523 GP= IO ports") Acked-by: Chen-Yu Tsai Reviewed-by: Jernej Skrabec --- drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c | 1 - drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c | 1 - 2 files changed, 2 deletions(-) diff --git a/drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c b/drivers/pinctr= l/sunxi/pinctrl-sun55i-a523-r.c index 69cd2b4ebd7d..462aa1c4a5fa 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c +++ b/drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c @@ -26,7 +26,6 @@ static const u8 a523_r_irq_bank_muxes[SUNXI_PINCTRL_MAX_B= ANKS] =3D static struct sunxi_pinctrl_desc a523_r_pinctrl_data =3D { .irq_banks =3D ARRAY_SIZE(a523_r_irq_bank_map), .irq_bank_map =3D a523_r_irq_bank_map, - .irq_read_needs_mux =3D true, .io_bias_cfg_variant =3D BIAS_VOLTAGE_PIO_POW_MODE_SEL, .pin_base =3D PL_BASE, }; diff --git a/drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c b/drivers/pinctrl/= sunxi/pinctrl-sun55i-a523.c index 7d2308c37d29..b6f78f1f30ac 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c +++ b/drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c @@ -26,7 +26,6 @@ static const u8 a523_irq_bank_muxes[SUNXI_PINCTRL_MAX_BAN= KS] =3D static struct sunxi_pinctrl_desc a523_pinctrl_data =3D { .irq_banks =3D ARRAY_SIZE(a523_irq_bank_map), .irq_bank_map =3D a523_irq_bank_map, - .irq_read_needs_mux =3D true, .io_bias_cfg_variant =3D BIAS_VOLTAGE_PIO_POW_MODE_SEL, }; =20 --=20 2.43.0 From nobody Thu Apr 2 17:16:40 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 91DF784039; Fri, 27 Mar 2026 11:30:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774611024; cv=none; b=L6vLIXPYsJJ8pPdNkUwblcp4P5P/jqHgt9Ljr2mgMAHFPeN9X5Gi1BZKm357XxuhoR8tmW8ekZcPzLBRSJ7SLTVR/EalebRBhEEEnWfJnX99+8d+bnJAayqYhQlxHz8pXeYurh4IvLoDvlNhgnYUCkawnermcArhfOBDbyKO0mw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774611024; c=relaxed/simple; bh=g52Al9YWCGtwUmdi2nk9qV8gQKZV5m7STqJ7l17xicE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=BPL0ORmprrXi2Fscw/HiQz9gqKdrXub1yBRZApF/FKu9xmQ1IIx3u+dDAEOQj569RWeXdipSpcIzZqA0C4Kdbu5j/KIjngsIZSSKpWm/u5z1WcrfOqyLvml9eqX30OB0qqgVxhQ8uYfCSkBIDuur2RbtKxLtix+RHj653RDonkg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=hLG0PUl2; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="hLG0PUl2" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C0A77359D; Fri, 27 Mar 2026 04:30:14 -0700 (PDT) Received: from e142021.cambridge.arm.com (e142021.arm.com [10.1.36.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 114463F915; Fri, 27 Mar 2026 04:30:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1774611020; bh=g52Al9YWCGtwUmdi2nk9qV8gQKZV5m7STqJ7l17xicE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hLG0PUl2wPr3QJUujLbGVwlya+RVrjtmTqqcNnDXLcXt30X1wQVX0yKYOkkstTCZX vwF1cEDYsEMnzcvFLgDsxIM7SzneSBWO4CColqroxIRWEpizSTNCZ4LxWB7T32eoLG E9Fb++Pl4Pkz0kcGitc0RHJdDQTRLOBHt2hZ6NYk= From: Andre Przywara To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/3] dt-bindings: pinctrl: sun55i-a523: increase IRQ banks number Date: Fri, 27 Mar 2026 11:30:05 +0000 Message-ID: <20260327113006.3135663-3-andre.przywara@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260327113006.3135663-1-andre.przywara@arm.com> References: <20260327113006.3135663-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Allwinner A523 SoC implements 10 GPIO banks in the first pinctrl instance, but it skips the first bank (PortA), so their index goes from 1 to 10. The same is actually true for the IRQ banks: there are registers for 11 banks, though the first bank is not implemented (RAZ/WI). In contrast to previous SoCs, the count of the IRQ banks starts with this first unimplemented bank, so we need to provide an interrupt for it. And indeed the A523 user manual lists an interrupt number for PortA, so we need to increase the maximum number of interrupts per pin controller to 11, to be able to assign the correct interrupt number for each bank. Signed-off-by: Andre Przywara Reviewed-by: Jernej Skrabec --- .../bindings/pinctrl/allwinner,sun55i-a523-pinctrl.yaml | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sun55i-a52= 3-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/allwinner,sun55i= -a523-pinctrl.yaml index 154e03da8ce9..f87b8274cc37 100644 --- a/Documentation/devicetree/bindings/pinctrl/allwinner,sun55i-a523-pinct= rl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sun55i-a523-pinct= rl.yaml @@ -34,7 +34,7 @@ properties: =20 interrupts: minItems: 2 - maxItems: 10 + maxItems: 11 description: One interrupt per external interrupt bank supported on the controller, sorted by bank number ascending order. @@ -61,7 +61,7 @@ properties: bank found in the controller $ref: /schemas/types.yaml#/definitions/uint32-array minItems: 2 - maxItems: 10 + maxItems: 11 =20 patternProperties: # It's pretty scary, but the basic idea is that: @@ -130,8 +130,8 @@ allOf: then: properties: interrupts: - minItems: 10 - maxItems: 10 + minItems: 11 + maxItems: 11 =20 - if: properties: --=20 2.43.0 From nobody Thu Apr 2 17:16:40 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A87A02459DD; Fri, 27 Mar 2026 11:30:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774611027; cv=none; b=DQdFfbnWT5UJolbmL6VJoTeKAHrMYuGvJTePgqqYcoY4tmllAq3HSfDZbK4ztTZpm2gb+CZhiC88vGD6dvy2U9lhKrznxRsztE8jm/NI1LexN/KHLqPsjboaEygeRW4TG+VKIhFO3FRawlJq8IDxlALSJK8zpfcUk4N2zR9W958= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774611027; c=relaxed/simple; bh=Y3T8xRAs7JXDcEo+gWDq1I9uwUeHLYQQvz2VKR+rIUI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=rNGQm2HyVKTyV/2TeUXQNv6sUO6LBhxe5FEEogBn6+5AWej7EQdM82t/p4FanWxx2Ne5AbYTDi5u4UqWMS853uXyhb4XU3o66qh2V/4ZFAxaubREq5wtmnoLfCl+q/pdthAttLYey93C5FSJbeBChYdw713mRF4W2tonIJARINA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=ifRKBWRH; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="ifRKBWRH" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AA2F635A5; Fri, 27 Mar 2026 04:30:17 -0700 (PDT) Received: from e142021.cambridge.arm.com (e142021.arm.com [10.1.36.137]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 22CC03F915; Fri, 27 Mar 2026 04:30:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1774611023; bh=Y3T8xRAs7JXDcEo+gWDq1I9uwUeHLYQQvz2VKR+rIUI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ifRKBWRHlSdvntmE1SxaosuGSreCu5yjtYQl5wL/Ksnz/TA9plMpK522zRHKs0rok Qw8edHAldAkI5OwAbfOI/umOzqQN/zYTaEb2TghGB70uk8Ev72CEZb208hXOggt9mT eK0h/2GyC/f9D5KNdTFJ5mPrrDPXykBjpk3CAr5E= From: Andre Przywara To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/3] arm64: dts: allwinner: a523: Add missing GPIO interrupt Date: Fri, 27 Mar 2026 11:30:06 +0000 Message-ID: <20260327113006.3135663-4-andre.przywara@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260327113006.3135663-1-andre.przywara@arm.com> References: <20260327113006.3135663-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Even though the Allwinner A523 SoC implements 10 GPIO banks, it has actually registers for 11 IRQ banks, and even an interrupt assigned to the first, non-implemented IRQ bank. Add that first interrupt to the list of GPIO interrupts, to correct the association between IRQs and GPIO banks. This fixes GPIO IRQ operation on boards with A523 SoCs, as seen by broken SD card detect functionality, for instance. Signed-off-by: Andre Przywara Fixes: 35ac96f79664 ("arm64: dts: allwinner: Add Allwinner A523 .dtsi file") Reviewed-by: Chen-Yu Tsai Reviewed-by: Jernej Skrabec --- arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/bo= ot/dts/allwinner/sun55i-a523.dtsi index 9335977751e2..cea5b166c00f 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi @@ -128,7 +128,8 @@ gpu: gpu@1800000 { pio: pinctrl@2000000 { compatible =3D "allwinner,sun55i-a523-pinctrl"; reg =3D <0x2000000 0x800>; - interrupts =3D , + interrupts =3D , + , , , , --=20 2.43.0