From nobody Thu Apr 2 17:16:41 2026 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5AB7537267B for ; Fri, 27 Mar 2026 07:47:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.129.124 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774597642; cv=none; b=h89BZAPoHFDk8mBalTbJoS88mPZG9rNSsFF0urV66CTSCqbJEJDRS/l47FRDLAz/slQhR98W4EMJ7FxcS0gZHMNWgfEQ2f4NSO1nYUVKXQUCRZD9Q12BoWvv6V8oE1t/tRe0qe/6xwMUYsPb2rxaqVwEI/27wRVFHmJf/YL8f9k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774597642; c=relaxed/simple; bh=0/WtdtXwB4HbLOBB/i29YghftIrngRbaQdXqbmrmeMk=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=tkSpdVMAt7WIicyUgGQOMsY7lLi1KiH1JDbeX1n1SZVQZwv3vXYMV7naoI7jYuAuC3eeRcSZ2Lhf0roij4vC9iBwVn1py37OjUGJGSB6mHFdtWjeyDdOFYsTrDzET6Bi4QR/JtwmE23Usq2okNOEmT1fvX+nLOvwjTpaFRLLVLQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com; spf=pass smtp.mailfrom=redhat.com; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b=JQc9g5hV; arc=none smtp.client-ip=170.10.129.124 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="JQc9g5hV" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1774597634; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=+Ya0OKIOhrl1q5883EggLqKidONP4W3BL2eswWDJDRg=; b=JQc9g5hVp+NCBaDJOSG/wIpyAoJSZ8ZrGT/roJjZePVGL5hfkyG7u49jkZF/IBgymjP/Ca JmkY5RdzuhUqWGNWOVCZ/G7RNzZvfitIuhsPYjX0CBBe8NDhOdfM+YgY+aygPSBRnmzvy7 RgqOvY3vSUSZ2Yz7oI6BrTPhey9TK7s= Received: from mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-653-LCiNJ1KkO36QsokeeGwf6A-1; Fri, 27 Mar 2026 03:47:11 -0400 X-MC-Unique: LCiNJ1KkO36QsokeeGwf6A-1 X-Mimecast-MFC-AGG-ID: LCiNJ1KkO36QsokeeGwf6A_1774597629 Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id CACD318002CF; Fri, 27 Mar 2026 07:47:08 +0000 (UTC) Received: from ShadowPeak.redhat.com (unknown [10.45.224.50]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 2F2B11800671; Fri, 27 Mar 2026 07:47:03 +0000 (UTC) From: Petr Oros To: netdev@vger.kernel.org Cc: stable@vger.kernel.org, Petr Oros , Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran , Arkadiusz Kubalewski , Grzegorz Nitka , Aleksandr Loktionov , Ivan Vecera , intel-wired-lan@lists.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH iwl-net] ice: fix PTP timestamping broken by SyncE code on E825C Date: Fri, 27 Mar 2026 08:46:58 +0100 Message-ID: <20260327074658.2963328-1-poros@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Content-Type: text/plain; charset="utf-8" The E825C SyncE support added in commit ad1df4f2d591 ("ice: dpll: Support E825-C SyncE and dynamic pin discovery") introduced a SyncE reconfiguration block in ice_ptp_link_change() that prevents ice_ptp_port_phy_restart() from being called in several error paths. Without the PHY restart, PTP timestamps stop working after any link change event. There are three ways the PHY restart gets blocked: 1. When DPLL initialization fails (e.g. missing ACPI firmware node properties), ICE_FLAG_DPLL is not set and the function returns early before reaching the PHY restart. 2. When ice_tspll_bypass_mux_active_e825c() fails to read the CGU register, WARN_ON_ONCE fires and the function returns early. 3. When ice_tspll_cfg_synce_ethdiv_e825c() fails to configure the clock divider for an active pin, same early return. SyncE and PTP are independent features. SyncE reconfiguration failures must not prevent the PTP PHY restart that is essential for timestamp recovery after link changes. Fix by making the entire SyncE block conditional on ICE_FLAG_DPLL without an early return, and replacing the WARN_ON_ONCE + return error handling inside the loop with dev_err_once + break. The function always proceeds to ice_ptp_port_phy_restart() regardless of SyncE errors. Fixes: ad1df4f2d591 ("ice: dpll: Support E825-C SyncE and dynamic pin disco= very") Signed-off-by: Petr Oros Reviewed-by: Aleksandr Loktionov Reviewed-by: Grzegorz Nitka --- drivers/net/ethernet/intel/ice/ice_ptp.c | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/etherne= t/intel/ice/ice_ptp.c index 094e96219f4565..60bc47099432a2 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c @@ -1296,12 +1296,10 @@ void ice_ptp_link_change(struct ice_pf *pf, bool li= nkup) if (pf->hw.reset_ongoing) return; =20 - if (hw->mac_type =3D=3D ICE_MAC_GENERIC_3K_E825) { + if (hw->mac_type =3D=3D ICE_MAC_GENERIC_3K_E825 && + test_bit(ICE_FLAG_DPLL, pf->flags)) { int pin, err; =20 - if (!test_bit(ICE_FLAG_DPLL, pf->flags)) - return; - mutex_lock(&pf->dplls.lock); for (pin =3D 0; pin < ICE_SYNCE_CLK_NUM; pin++) { enum ice_synce_clk clk_pin; @@ -1314,15 +1312,19 @@ void ice_ptp_link_change(struct ice_pf *pf, bool li= nkup) port_num, &active, clk_pin); - if (WARN_ON_ONCE(err)) { - mutex_unlock(&pf->dplls.lock); - return; + if (err) { + dev_err_once(ice_pf_to_dev(pf), + "Failed to read SyncE bypass mux for pin %d, err %d\n", + pin, err); + break; } =20 err =3D ice_tspll_cfg_synce_ethdiv_e825c(hw, clk_pin); - if (active && WARN_ON_ONCE(err)) { - mutex_unlock(&pf->dplls.lock); - return; + if (active && err) { + dev_err_once(ice_pf_to_dev(pf), + "Failed to configure SyncE ETH divider for pin %d, err %d\n", + pin, err); + break; } } mutex_unlock(&pf->dplls.lock); --=20 2.52.0