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Darwish" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1774578088; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=CjD5PhWwawGbSqynH4dKNOfB+35Pn9sLrPtOZZ6jDpg=; b=DUn6kq81nxmpD/Ba8RJhpP6uPJD/eQLnwBoxxjMEy263JGWCIe3A7FFkxJFbDFqd+dDUTO i2IP/VzqdAA+igsVzsQgd2l2duyCaToqKbnMTCzK36qkafVTICZfrsCRsAp8SSwQB+YG2C 9g/wOdy9lmtt6tcwP2/e805OKyKXiitk+Y090em/YspmrMlmOPc++5HDrxGAElOnbdkmX8 9p0mAS5RmUIMAd0zDKnKOxtkwlIiXoimOyV0bW1MzO5x3Etsv72YJrjgkB3fyTIjK3n1u2 c7p/hKg3nvqnqF56brQZ6Xm4oKBv/D/pRNv57SakX+Ub4Ss7TpVhYDV8XmukCQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1774578088; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=CjD5PhWwawGbSqynH4dKNOfB+35Pn9sLrPtOZZ6jDpg=; b=5dkeh7O7jgYucY1C/xo0IE+Tns0bvQzx+qnCiDtFKuY/dCBDVw4BVtMMg1pjcWRNrNjoC+ oVcYofkH1CFpauAg== To: Borislav Petkov , Dave Hansen , Ingo Molnar Cc: Thomas Gleixner , Andrew Cooper , "H. Peter Anvin" , Sean Christopherson , David Woodhouse , Peter Zijlstra , Christian Ludloff , Sohil Mehta , John Ogness , x86@kernel.org, x86-cpuid@lists.linux.dev, LKML , "Ahmed S. Darwish" Subject: [PATCH v6 68/90] perf/x86/amd: Use parsed CPUID(0x80000022) Date: Fri, 27 Mar 2026 03:16:22 +0100 Message-ID: <20260327021645.555257-69-darwi@linutronix.de> In-Reply-To: <20260327021645.555257-1-darwi@linutronix.de> References: <20260327021645.555257-1-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" For AMD perf, use parsed CPUID(0x80000022) instead of direct CPUID queries and custom perf data types. For the uncore CPU hotplug callbacks, ensure that the correct per-CPU CPUID table is queried. Signed-off-by: Ahmed S. Darwish --- arch/x86/events/amd/core.c | 8 +++----- arch/x86/events/amd/uncore.c | 18 +++++++----------- 2 files changed, 10 insertions(+), 16 deletions(-) diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c index d66a357f219d..b070d0be36c4 100644 --- a/arch/x86/events/amd/core.c +++ b/arch/x86/events/amd/core.c @@ -1410,7 +1410,7 @@ static const struct attribute_group *amd_attr_update[= ] =3D { =20 static int __init amd_core_pmu_init(void) { - union cpuid_0x80000022_ebx ebx; + const struct leaf_0x80000022_0 *leaf =3D cpuid_leaf(&boot_cpu_data, 0x800= 00022); u64 even_ctr_mask =3D 0ULL; int i; =20 @@ -1430,14 +1430,12 @@ static int __init amd_core_pmu_init(void) x86_pmu.cntr_mask64 =3D GENMASK_ULL(AMD64_NUM_COUNTERS_CORE - 1, 0); =20 /* Check for Performance Monitoring v2 support */ - if (boot_cpu_has(X86_FEATURE_PERFMON_V2)) { - ebx.full =3D cpuid_ebx(EXT_PERFMON_DEBUG_FEATURES); - + if (leaf && boot_cpu_has(X86_FEATURE_PERFMON_V2)) { /* Update PMU version for later usage */ x86_pmu.version =3D 2; =20 /* Find the number of available Core PMCs */ - x86_pmu.cntr_mask64 =3D GENMASK_ULL(ebx.split.num_core_pmc - 1, 0); + x86_pmu.cntr_mask64 =3D GENMASK_ULL(leaf->n_pmc_core - 1, 0); =20 amd_pmu_global_cntr_mask =3D x86_pmu.cntr_mask64; =20 diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c index 05cff39968ec..6a5d8f8cfbc0 100644 --- a/arch/x86/events/amd/uncore.c +++ b/arch/x86/events/amd/uncore.c @@ -692,7 +692,7 @@ static int amd_uncore_df_add(struct perf_event *event, = int flags) static void amd_uncore_df_ctx_scan(struct amd_uncore *uncore, unsigned int cpu) { - union cpuid_0x80000022_ebx ebx; + const struct leaf_0x80000022_0 *leaf =3D cpuid_leaf(&cpu_data(cpu), 0x800= 00022); union amd_uncore_info info; =20 if (!boot_cpu_has(X86_FEATURE_PERFCTR_NB)) @@ -703,10 +703,8 @@ void amd_uncore_df_ctx_scan(struct amd_uncore *uncore,= unsigned int cpu) info.split.gid =3D 0; info.split.cid =3D topology_logical_package_id(cpu); =20 - if (pmu_version >=3D 2) { - ebx.full =3D cpuid_ebx(EXT_PERFMON_DEBUG_FEATURES); - info.split.num_pmcs =3D ebx.split.num_df_pmc; - } + if (leaf && pmu_version >=3D 2) + info.split.num_pmcs =3D leaf->n_pmc_northbridge; =20 *per_cpu_ptr(uncore->info, cpu) =3D info; } @@ -990,16 +988,14 @@ static void amd_uncore_umc_read(struct perf_event *ev= ent) static void amd_uncore_umc_ctx_scan(struct amd_uncore *uncore, unsigned int cpu) { - union cpuid_0x80000022_ebx ebx; + const struct leaf_0x80000022_0 *leaf =3D cpuid_leaf(&cpu_data(cpu), 0x800= 00022); union amd_uncore_info info; - unsigned int eax, ecx, edx; =20 - if (pmu_version < 2) + if (!leaf || pmu_version < 2) return; =20 - cpuid(EXT_PERFMON_DEBUG_FEATURES, &eax, &ebx.full, &ecx, &edx); - info.split.aux_data =3D ecx; /* stash active mask */ - info.split.num_pmcs =3D ebx.split.num_umc_pmc; + info.split.aux_data =3D leaf->active_umc_bitmask; + info.split.num_pmcs =3D leaf->n_pmc_umc; info.split.gid =3D topology_logical_package_id(cpu); info.split.cid =3D topology_logical_package_id(cpu); *per_cpu_ptr(uncore->info, cpu) =3D info; --=20 2.53.0