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Peter Anvin" , Sean Christopherson , David Woodhouse , Peter Zijlstra , Christian Ludloff , Sohil Mehta , John Ogness , x86@kernel.org, x86-cpuid@lists.linux.dev, LKML , "Ahmed S. Darwish" Subject: [PATCH v6 59/90] KVM: x86/pmu: Use standard CPUID(0xa) types Date: Fri, 27 Mar 2026 03:16:13 +0100 Message-ID: <20260327021645.555257-60-darwi@linutronix.de> In-Reply-To: <20260327021645.555257-1-darwi@linutronix.de> References: <20260327021645.555257-1-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" For KVM PMU refresh, use the auto-generated CPUID(0xa) types from x86-cpuid-db instead of relying on the custom perf types. The latter types are in process of getting removed from the kernel. Signed-off-by: Ahmed S. Darwish --- arch/x86/kvm/vmx/pmu_intel.c | 31 +++++++++++++------------------ 1 file changed, 13 insertions(+), 18 deletions(-) diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index 74e0b01185b8..e0aeb1bc04ca 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -493,8 +493,8 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) struct kvm_pmu *pmu =3D vcpu_to_pmu(vcpu); struct lbr_desc *lbr_desc =3D vcpu_to_lbr_desc(vcpu); struct kvm_cpuid_entry2 *entry; - union cpuid10_eax eax; - union cpuid10_edx edx; + struct leaf_0xa_0 l =3D { }; + struct cpuid_regs *regs =3D (struct cpuid_regs *)&l; u64 perf_capabilities; u64 counter_rsvd; =20 @@ -515,21 +515,18 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) if (!entry) return; =20 - eax.full =3D entry->eax; - edx.full =3D entry->edx; + regs->eax =3D entry->eax; + regs->edx =3D entry->edx; =20 - pmu->version =3D eax.split.version_id; + pmu->version =3D l.pmu_version; if (!pmu->version) return; =20 - pmu->nr_arch_gp_counters =3D min_t(int, eax.split.num_counters, - kvm_pmu_cap.num_counters_gp); - eax.split.bit_width =3D min_t(int, eax.split.bit_width, - kvm_pmu_cap.bit_width_gp); - pmu->counter_bitmask[KVM_PMC_GP] =3D BIT_ULL(eax.split.bit_width) - 1; - eax.split.mask_length =3D min_t(int, eax.split.mask_length, - kvm_pmu_cap.events_mask_len); - pmu->available_event_types =3D ~entry->ebx & (BIT_ULL(eax.split.mask_leng= th) - 1); + pmu->nr_arch_gp_counters =3D min_t(int, l.num_counters_gp, kvm_pmu_cap.nu= m_counters_gp); + l.bit_width_gp =3D min_t(int, l.bit_width_gp, kvm_pmu_cap.bit_width_gp); + pmu->counter_bitmask[KVM_PMC_GP]=3D BIT_ULL(l.bit_width_gp) - 1; + l.events_mask_len =3D min_t(int, l.events_mask_len, kvm_pmu_cap.events_m= ask_len); + pmu->available_event_types =3D ~entry->ebx & (BIT_ULL(l.events_mask_len) = - 1); =20 entry =3D kvm_find_cpuid_entry_index(vcpu, 7, 0); if (entry && @@ -552,11 +549,9 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) if (pmu->version =3D=3D 1) return; =20 - pmu->nr_arch_fixed_counters =3D min_t(int, edx.split.num_counters_fixed, - kvm_pmu_cap.num_counters_fixed); - edx.split.bit_width_fixed =3D min_t(int, edx.split.bit_width_fixed, - kvm_pmu_cap.bit_width_fixed); - pmu->counter_bitmask[KVM_PMC_FIXED] =3D BIT_ULL(edx.split.bit_width_fixed= ) - 1; + pmu->nr_arch_fixed_counters =3D min_t(int, l.num_counters_fixed, kvm_pmu_= cap.num_counters_fixed); + l.bitwidth_fixed =3D min_t(int, l.bitwidth_fixed, kvm_pmu_cap.bit_wid= th_fixed); + pmu->counter_bitmask[KVM_PMC_FIXED] =3D BIT_ULL(l.bitwidth_fixed) - 1; =20 intel_pmu_enable_fixed_counter_bits(pmu, INTEL_FIXED_0_KERNEL | INTEL_FIXED_0_USER | --=20 2.53.0