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Peter Anvin" , Sean Christopherson , David Woodhouse , Peter Zijlstra , Christian Ludloff , Sohil Mehta , John Ogness , x86@kernel.org, x86-cpuid@lists.linux.dev, LKML , "Ahmed S. Darwish" Subject: [PATCH v6 44/90] x86/cpu: Use parsed CPUID(0x80000005) and CPUID(0x80000006) Date: Fri, 27 Mar 2026 03:15:58 +0100 Message-ID: <20260327021645.555257-45-darwi@linutronix.de> In-Reply-To: <20260327021645.555257-1-darwi@linutronix.de> References: <20260327021645.555257-1-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use parsed CPUID(0x80000005) and CPUID(0x80000006) instead of issuing CPUID queries and doing ugly bitwise operations. Signed-off-by: Ahmed S. Darwish --- arch/x86/kernel/cpu/common.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index f7372833dd50..5fa5463686ac 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -857,27 +857,26 @@ static void get_model_name(struct cpuinfo_x86 *c) =20 void cpu_detect_cache_sizes(struct cpuinfo_x86 *c) { - unsigned int n, dummy, ebx, ecx, edx, l2size; + const struct leaf_0x80000005_0 *el5 =3D cpuid_leaf(c, 0x80000005); + const struct leaf_0x80000006_0 *el6 =3D cpuid_leaf(c, 0x80000006); + unsigned int l2size; =20 - n =3D c->extended_cpuid_level; - - if (n >=3D 0x80000005) { - cpuid(0x80000005, &dummy, &ebx, &ecx, &edx); - c->x86_cache_size =3D (ecx>>24) + (edx>>24); + if (el5) { + c->x86_cache_size =3D el5->l1_dcache_size_kb + el5->l1_icache_size_kb; #ifdef CONFIG_X86_64 /* On K8 L1 TLB is inclusive, so don't count it */ c->x86_tlbsize =3D 0; #endif } =20 - if (n < 0x80000006) /* Some chips just has a large L1. */ + /* Some chips only have a large L1 */ + if (!el6) return; =20 - cpuid(0x80000006, &dummy, &ebx, &ecx, &edx); - l2size =3D ecx >> 16; + l2size =3D el6->l2_size_kb; =20 #ifdef CONFIG_X86_64 - c->x86_tlbsize +=3D ((ebx >> 16) & 0xfff) + (ebx & 0xfff); + c->x86_tlbsize +=3D el6->l2_dtlb_4k_nentries + el6->l2_itlb_4k_nentries; #else /* do processor-specific cache resizing */ if (this_cpu->legacy_cache_size) @@ -887,8 +886,9 @@ void cpu_detect_cache_sizes(struct cpuinfo_x86 *c) if (cachesize_override !=3D -1) l2size =3D cachesize_override; =20 + /* Again, no L2 cache is possible */ if (l2size =3D=3D 0) - return; /* Again, no L2 cache is possible */ + return; #endif =20 c->x86_cache_size =3D l2size; --=20 2.53.0