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Peter Anvin" , Sean Christopherson , David Woodhouse , Peter Zijlstra , Christian Ludloff , Sohil Mehta , John Ogness , x86@kernel.org, x86-cpuid@lists.linux.dev, LKML , "Ahmed S. Darwish" Subject: [PATCH v6 30/90] x86/cpuid: Parse CPUID(0x2) Date: Fri, 27 Mar 2026 03:15:44 +0100 Message-ID: <20260327021645.555257-31-darwi@linutronix.de> In-Reply-To: <20260327021645.555257-1-darwi@linutronix.de> References: <20260327021645.555257-1-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Parse CPUID(0x2). Query it only for Intel, Centaur, and Zhaoxin, given that kernel/cpu/cacheinfo.c :: init_intel_cacheinfo() is called by: kernel/cpu/intel.c cpu_dev.c_x86_vendor =3D X86_VENDOR_INTEL kernel/cpu/centaur.c cpu_dev.c_x86_vendor =3D X86_VENDOR_CENTAUR kernel/cpu/zhaoxin.c cpu_dev.c_x86_vendor =3D X86_VENDOR_ZHAOXIN At the CPUID tables, keep CPUID(0x2) marked as invalid if the whole leaf, or all of its output registers separately, were malformed. Note, cpuid_leaf_0x2() at will be removed once all call sites are transformed to new CPUID APIs. References: fe78079ec07f ("x86/cpu: Introduce and use CPUID leaf 0x2 parsin= g helpers") Signed-off-by: Ahmed S. Darwish --- arch/x86/include/asm/cpuid/types.h | 1 + arch/x86/kernel/cpu/cpuid_parser.c | 36 ++++++++++++++++++++++++++++++ arch/x86/kernel/cpu/cpuid_parser.h | 2 ++ 3 files changed, 39 insertions(+) diff --git a/arch/x86/include/asm/cpuid/types.h b/arch/x86/include/asm/cpui= d/types.h index 8cc9f81e9526..c35de721f652 100644 --- a/arch/x86/include/asm/cpuid/types.h +++ b/arch/x86/include/asm/cpuid/types.h @@ -210,6 +210,7 @@ struct cpuid_leaves { /* Leaf Subleaf number (or max number of subleaves) */ CPUID_LEAF ( 0x0, 0 ); CPUID_LEAF ( 0x1, 0 ); + CPUID_LEAF ( 0x2, 0 ); CPUID_LEAF ( 0x16, 0 ); CPUID_LEAF ( 0x80000000, 0 ); CPUID_LEAF ( 0x80000002, 0 ); diff --git a/arch/x86/kernel/cpu/cpuid_parser.c b/arch/x86/kernel/cpu/cpuid= _parser.c index a7e6692f767b..be340b202182 100644 --- a/arch/x86/kernel/cpu/cpuid_parser.c +++ b/arch/x86/kernel/cpu/cpuid_parser.c @@ -42,6 +42,42 @@ cpuid_read_generic(const struct cpuid_parse_entry *e, co= nst struct cpuid_read_ou cpuid_read_subleaf(e->leaf, e->subleaf + i, regs); } =20 +static void +cpuid_read_0x2(const struct cpuid_parse_entry *e, const struct cpuid_read_= output *output) +{ + union leaf_0x2_regs *regs =3D (union leaf_0x2_regs *)output->regs; + struct leaf_0x2_0 *l =3D (struct leaf_0x2_0 *)output->regs; + int invalid_regs =3D 0; + + /* + * All Intel CPUs must report an iteration count of 1. For broken hardwar= e, + * keep the leaf marked as invalid at the CPUID table. + */ + cpuid_read_subleaf(e->leaf, e->subleaf, l); + if (l->iteration_count !=3D 0x01) + return; + + /* + * The most significant bit (MSB) of each CPUID(0x2) register must be cle= ar. + * If a register is malformed, replace its 1-byte descriptors with NULL. + */ + for (int i =3D 0; i < 4; i++) { + if (regs->reg[i].invalid) { + regs->regv[i] =3D 0; + invalid_regs++; + } + } + + /* + * If all of the CPUID(0x2) output registers were malformed, keep the leaf + * marked as invalid at the CPUID table. + */ + if (invalid_regs =3D=3D 4) + return; + + output->info->nr_entries =3D 1; +} + /* * Define an extended range CPUID read function * diff --git a/arch/x86/kernel/cpu/cpuid_parser.h b/arch/x86/kernel/cpu/cpuid= _parser.h index 76a87a71b430..1de239370652 100644 --- a/arch/x86/kernel/cpu/cpuid_parser.h +++ b/arch/x86/kernel/cpu/cpuid_parser.h @@ -144,6 +144,7 @@ struct cpuid_parse_entry { */ #define CPUID_COMMON_ENTRIES \ /* Leaf Subleaf Reader function */ \ + CPUID_PARSE_ENTRY ( 0x2, 0, 0x2 ), \ CPUID_PARSE_ENTRY ( 0x16, 0, generic ), \ CPUID_PARSE_ENTRY ( 0x80000000, 0, 0x80000000 ), \ CPUID_PARSE_ENTRY ( 0x80000002, 0, generic ), \ @@ -190,6 +191,7 @@ struct cpuid_vendor_entry { =20 #define CPUID_VENDOR_ENTRIES \ /* Leaf Vendor list */ \ + CPUID_VENDOR_ENTRY(0x2, X86_VENDOR_INTEL, X86_VENDOR_CENTAUR, X86_VENDOR= _ZHAOXIN),\ CPUID_VENDOR_ENTRY(0x16, X86_VENDOR_INTEL), \ CPUID_VENDOR_ENTRY(0x80860000, X86_VENDOR_TRANSMETA), \ CPUID_VENDOR_ENTRY(0x80860001, X86_VENDOR_TRANSMETA), \ --=20 2.53.0