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Peter Anvin" , Sean Christopherson , David Woodhouse , Peter Zijlstra , Christian Ludloff , Sohil Mehta , John Ogness , x86@kernel.org, x86-cpuid@lists.linux.dev, LKML , "Ahmed S. Darwish" Subject: [PATCH v6 11/90] x86/cpu: centaur/zhaoxin: Rescan CPUID(0xc0000001) after MSR writes Date: Fri, 27 Mar 2026 03:15:25 +0100 Message-ID: <20260327021645.555257-12-darwi@linutronix.de> In-Reply-To: <20260327021645.555257-1-darwi@linutronix.de> References: <20260327021645.555257-1-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Force-enabling Centaur/Zhaoxin CPU features through MSR writes leads to the CPUID(0xc0000001) EDX feature flags getting changed. Rescan CPUID(0xc0000001) in that case. Signed-off-by: Ahmed S. Darwish --- arch/x86/kernel/cpu/centaur.c | 6 ++++-- arch/x86/kernel/cpu/zhaoxin.c | 5 +++-- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c index 681d2da49341..a97e38fa6a9f 100644 --- a/arch/x86/kernel/cpu/centaur.c +++ b/arch/x86/kernel/cpu/centaur.c @@ -44,9 +44,11 @@ static void init_c3(struct cpuinfo_x86 *c) pr_info("CPU: Enabled h/w RNG\n"); } =20 - /* store Centaur Extended Feature Flags as - * word 5 of the CPU capability bit array + /* + * Force-enabling CPU features affects the CPUID(0xc0000001) + * EDX feature bits. Refresh the leaf. */ + cpuid_refresh_leaf(c, 0xc0000001); c->x86_capability[CPUID_C000_0001_EDX] =3D cpuid_edx(0xC0000001); } #ifdef CONFIG_X86_32 diff --git a/arch/x86/kernel/cpu/zhaoxin.c b/arch/x86/kernel/cpu/zhaoxin.c index 761aef5590ac..55bc656aaa95 100644 --- a/arch/x86/kernel/cpu/zhaoxin.c +++ b/arch/x86/kernel/cpu/zhaoxin.c @@ -46,9 +46,10 @@ static void init_zhaoxin_cap(struct cpuinfo_x86 *c) } =20 /* - * Store Extended Feature Flags as word 5 of the CPU - * capability bit array + * Force-enabling CPU features affects the CPUID(0xc0000001) + * EDX feature bits. Refresh the leaf. */ + cpuid_refresh_leaf(c, 0xc0000001); c->x86_capability[CPUID_C000_0001_EDX] =3D cpuid_edx(0xC0000001); } =20 --=20 2.53.0