From nobody Thu Apr 2 22:07:17 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8AF2B33F370; Thu, 26 Mar 2026 16:32:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774542747; cv=none; b=MW1VnOnMzKLOGsc5PVH+a2cApKp6uTUyF1UqLCYJdzfdGHZcZSDvjZgMG8v1bqedeje/OWHuWwTk/TIylF3Keoc6tm4L/gy+hkSa3G+msJ3YKMkEiXiXwKVdev5c2O4bZHNsbtNPxo0KGtA5JWKBmW8xG+httInuRts0XrpJM5Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774542747; c=relaxed/simple; bh=h6SdAt8V/8U61Dau5TYRbsrbBcUy7opyRgE4IDMhs3o=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=r8gV7ECvlOuxFvMoyYqNi2sg3/KQ8KWu0Fj7Ssnc+SFMh6DFDTTB1bLfRJzo681QXYujVWlRbMHl9hsUEy15uJciZT/VbCj3iMUoxs+OBEVCvzNH7nE8+a/zbXDsj67pwyAw4w3KMyssBTdFDgmpzOZV7YKbjhNfBHD98ZYxlxc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=d1/c57mx; arc=none smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="d1/c57mx" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1774542745; x=1806078745; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=h6SdAt8V/8U61Dau5TYRbsrbBcUy7opyRgE4IDMhs3o=; b=d1/c57mxfXE6bURXtrNj9UtoNAvmGpPCyDNbzdOz79PiprjmxQyxlygF ffRlqpQnInT7WHr+b4T0yE24Uk8qBXlHxeOGTCSorLw7e3HGAEtm/e4Vo tI71hWlT3HvCZBLw0i8AjjFOQb3+6IWpaxe16O7RNPmWyGjxOCgHCGGO+ Xs9Z71ADnSb7rxkka432YJwCpHddo2WneAQccTHND1/lp7b3qi+fS5JIP 2WSoopYfaVTHgg69AeONzUsZuYC1LtbYWvxP4Kh43Rxw4dgD2E6Wpk2gY J47CtR4qi0KpeIetrniXLhzYsJHjp+cL3dHEtxFCi2wP/mobeqQnNswup A==; X-CSE-ConnectionGUID: k9uRZ6PQReW5MYvwkSH1RQ== X-CSE-MsgGUID: leQsqrcfQK+mwYFVLpgM4w== X-IronPort-AV: E=McAfee;i="6800,10657,11741"; a="74636560" X-IronPort-AV: E=Sophos;i="6.23,142,1770624000"; d="scan'208";a="74636560" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Mar 2026 09:32:24 -0700 X-CSE-ConnectionGUID: dfd35oV+TCaHZ6HM57vDPw== X-CSE-MsgGUID: nmJNRV5ESau2FtC0lmev0A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,142,1770624000"; d="scan'208";a="225310865" Received: from gklab-003-001.igk.intel.com ([10.91.173.48]) by orviesa007.jf.intel.com with ESMTP; 26 Mar 2026 09:32:20 -0700 From: Grzegorz Nitka To: netdev@vger.kernel.org Cc: linux-kernel@vger.kernel.org, intel-wired-lan@lists.osuosl.org, poros@redhat.com, richardcochran@gmail.com, andrew+netdev@lunn.ch, przemyslaw.kitszel@intel.com, anthony.l.nguyen@intel.com, Prathosh.Satish@microchip.com, ivecera@redhat.com, jiri@resnulli.us, arkadiusz.kubalewski@intel.com, vadim.fedorenko@linux.dev, donald.hunter@gmail.com, horms@kernel.org, pabeni@redhat.com, kuba@kernel.org, davem@davemloft.net, edumazet@google.com, Grzegorz Nitka , Jiri Pirko , Aleksandr Loktionov Subject: [PATCH v4 net-next 1/8] dpll: add new DPLL type for transmit clock (TXC) usage Date: Thu, 26 Mar 2026 17:28:25 +0100 Message-Id: <20260326162832.3135857-2-grzegorz.nitka@intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20260326162832.3135857-1-grzegorz.nitka@intel.com> References: <20260326162832.3135857-1-grzegorz.nitka@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Extend the DPLL subsystem with a new DPLL type, DPLL_TYPE_TXC, representing devices that drive a transmit reference clock. Certain PHYs, MACs and SerDes blocks use a dedicated TX reference clock for link operation, and this clock domain is distinct from PPS- and EEC-driven synchronization sources. Defining a dedicated type allows user space and drivers to correctly classify and configure DPLLs intended for TX clock generation. The corresponding netlink specification is updated to expose "txc". Reviewed-by: Jiri Pirko Reviewed-by: Arkadiusz Kubalewski Reviewed-by: Aleksandr Loktionov Signed-off-by: Grzegorz Nitka --- Documentation/netlink/specs/dpll.yaml | 3 +++ drivers/dpll/dpll_nl.c | 2 +- include/uapi/linux/dpll.h | 2 ++ 3 files changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/netlink/specs/dpll.yaml b/Documentation/netlink/= specs/dpll.yaml index 3dd48a32f783..2a2ee37a1fc0 100644 --- a/Documentation/netlink/specs/dpll.yaml +++ b/Documentation/netlink/specs/dpll.yaml @@ -138,6 +138,9 @@ definitions: - name: eec doc: dpll drives the Ethernet Equipment Clock + - + name: txc + doc: dpll drives Tx reference clock render-max: true - type: enum diff --git a/drivers/dpll/dpll_nl.c b/drivers/dpll/dpll_nl.c index a2b22d492114..4182bdbb6dbb 100644 --- a/drivers/dpll/dpll_nl.c +++ b/drivers/dpll/dpll_nl.c @@ -34,7 +34,7 @@ const struct nla_policy dpll_reference_sync_nl_policy[DPL= L_A_PIN_STATE + 1] =3D { static const struct nla_policy dpll_device_id_get_nl_policy[DPLL_A_TYPE + = 1] =3D { [DPLL_A_MODULE_NAME] =3D { .type =3D NLA_NUL_STRING, }, [DPLL_A_CLOCK_ID] =3D { .type =3D NLA_U64, }, - [DPLL_A_TYPE] =3D NLA_POLICY_RANGE(NLA_U32, 1, 2), + [DPLL_A_TYPE] =3D NLA_POLICY_RANGE(NLA_U32, 1, 3), }; =20 /* DPLL_CMD_DEVICE_GET - do */ diff --git a/include/uapi/linux/dpll.h b/include/uapi/linux/dpll.h index de0005f28e5c..8f6db5d5bf0c 100644 --- a/include/uapi/linux/dpll.h +++ b/include/uapi/linux/dpll.h @@ -109,10 +109,12 @@ enum dpll_clock_quality_level { * enum dpll_type - type of dpll, valid values for DPLL_A_TYPE attribute * @DPLL_TYPE_PPS: dpll produces Pulse-Per-Second signal * @DPLL_TYPE_EEC: dpll drives the Ethernet Equipment Clock + * @DPLL_TYPE_TXC: dpll drives Tx reference clock */ enum dpll_type { DPLL_TYPE_PPS =3D 1, DPLL_TYPE_EEC, + DPLL_TYPE_TXC, =20 /* private: */ __DPLL_TYPE_MAX, --=20 2.39.3