From nobody Thu Apr 2 20:20:23 2026 Received: from PH8PR06CU001.outbound.protection.outlook.com (mail-westus3azon11012068.outbound.protection.outlook.com [40.107.209.68]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 374854014AD for ; Thu, 26 Mar 2026 15:12:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.209.68 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774537956; cv=fail; b=MKxlPygZKG9RK+m+JpD+OyiFZfSLhEo3qRcERHNBaxWlsSCh4FJVkiqMVhc3OaTP+Wz87+IjIQvcBQb9Bpwnixmr6Y8xzg+9uAA9jRbLVYR1CyuSD78G4TfhpT2IZSjpfkuGFiMM7OZtfmEbYCAg2OywCQu8fvSNiT2mFOmvl/s= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774537956; c=relaxed/simple; bh=tUoQrXG3Gp2q96ZCppKbCI4b3DgP6oi9fptJ7xiyYZw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=K53LTSD32myn2ZwWtXKvndaR/XhD8MKNT0MF5r+l0d8yL1Mx6GvEJAVntUkww86GJtibp5vU+4jtMJpcgknyw1EoqSdrws8hKgoGTR3S0QdcLiXVK4igqghkL1khiLp0dztqQmpoVKZTSpHCWt6VGP5MrJYH4auuc5FL5v49qsY= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=I3bT9fX3; arc=fail smtp.client-ip=40.107.209.68 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="I3bT9fX3" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=NtyCXlmYatNTItpsGCZ5jLRV+ZO8IkIGZFLd6CWvIWWPmMY+SZBbL9GjTnnT/gAos9rYa0Pbp2yuPv8uLYSSovTJYMQiQ0Mqbs5t9CWIC9aGDqpAMxjqS+YHeS0w5cEWxK9DqJphhN7jlbMQN1XzBeMBlp9Jh0bR2D/R7dJ8gbS8SEuu55kw4hiTAje6bAVopWlK2r6qKZzTDOcL/VfyYD0ATENkKoGbO8bL0u8HWVSOwfpqgOcu6Y8/QBeKibBzgdd6pt8WMI20fExcPkhjs9c595xOX8GaaB7EwIAGHy1lUO6UKsUJj5YWUzxQtjMPDPWshlF6nN6T17jtKvVf1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=4ryI5MizuV6tTxqWf2cul6jgmqvZujOu5sPGM7sIohs=; b=xHox8imchXi1EsFAcA65A6TAGLhKeJYzjhw5fw//TJ9XHBUKKHNyw4uG1unI1jleevqy5mbXrxy8MIzaR83NN2AAPTZ9os6V6F3/foEgTGgsGFsq2f+Xz6/DrEDdwiS0z//OjCR0GbZoLDjJ0Kuq5lypQ0yvQ6tzL755canwf7rOqbB16wB0cTQP91x/DpkLJi6lkxGkYmeRXCpdpLTOSjEzR07stQGQXpd/GLkp5Co6rNW4zUUiGp4txi52Vv9QyO76dR8TpbhSMuq7z8i+zGtXFdf8hNzZK2sKiNZYx0dMac+i2KqMilqn9/iKGPdTAYc8KRsmo+mw9W8gC7fjag== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nvidia.com; dmarc=pass action=none header.from=nvidia.com; dkim=pass header.d=nvidia.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=4ryI5MizuV6tTxqWf2cul6jgmqvZujOu5sPGM7sIohs=; b=I3bT9fX34NevUQb261WVYk8bN5aOCe/oowJAhhYUrg3I7e494MI1aNTjLg8VK18anePpj3NwKCkUpwwRjsxTG/E879ra5DSjdOPdBkBI/bjtZ3ZyMklA660y0AoEbJBOz75cHhNvNx7JDbJPQJHWDjM1+sNzujFpEhedzVPAfvIrLbJSVjNC0Tg4reTs+N9Ql14xUruBylHCcohCBDTYT9R8OyTGTciKLV6/gGX93OM7qFQ6xaj75lMOrmTkawXlJmO00hnav3j9ZsfTS9/riSWY1upyupmMO0iQfQ8GAf2DnfrYNrOoFQ8IB8gjqWH6/SIG7IMuHOndw/hoLjbRXg== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nvidia.com; Received: from LV8PR12MB9620.namprd12.prod.outlook.com (2603:10b6:408:2a1::19) by CY1PR12MB9627.namprd12.prod.outlook.com (2603:10b6:930:104::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9745.20; Thu, 26 Mar 2026 15:12:30 +0000 Received: from LV8PR12MB9620.namprd12.prod.outlook.com ([fe80::299d:f5e0:3550:1528]) by LV8PR12MB9620.namprd12.prod.outlook.com ([fe80::299d:f5e0:3550:1528%5]) with mapi id 15.20.9745.019; Thu, 26 Mar 2026 15:12:30 +0000 From: Andrea Righi To: Ingo Molnar , Peter Zijlstra , Juri Lelli , Vincent Guittot Cc: Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , Christian Loehle , Koba Ko , Felix Abecassis , Balbir Singh , linux-kernel@vger.kernel.org Subject: [PATCH 1/4] sched/fair: Prefer fully-idle SMT cores in asym-capacity idle selection Date: Thu, 26 Mar 2026 16:02:34 +0100 Message-ID: <20260326151211.1862600-2-arighi@nvidia.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260326151211.1862600-1-arighi@nvidia.com> References: <20260326151211.1862600-1-arighi@nvidia.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SJ0PR13CA0137.namprd13.prod.outlook.com (2603:10b6:a03:2c6::22) To LV8PR12MB9620.namprd12.prod.outlook.com (2603:10b6:408:2a1::19) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV8PR12MB9620:EE_|CY1PR12MB9627:EE_ X-MS-Office365-Filtering-Correlation-Id: ba16985d-8833-4a99-bf1c-08de8b4a1952 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014|7416014|56012099003|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: 8Kly82nl/iqmZfgWA6wEFz7XmSr/DnIlzpj9C/K1PQNAt22ZOsOp3MWMfVB//tRN9veOEStmJdJTMLLoOAvQPSI7udO31TaE8fdA52Bw7faqc8kXp9QyqBi/UuARyqgs5HA0oErsQb9hmIUlGmfESPkJTpzcT5R7hadNmrpbC+AxFOhkuJqW0nM7RGRY7FKeD00zgLCWbKEYCpbvRvcik2qmUppQvgqrLExZENtHp+1L1pdratbC6Z+4BBOuyxGPBhxJRocDa1Jlf7AwknnyAzvzuVelm2tXpw/zPCmVdlromTIo7Dczf0kSUM9Y/zoFMUWw93clQ+1ICt3efUWY/fj943GwPSiZzyc71QZXnOSYdXBOEEKUNFYnQNh+G+wjSJrUh33UIeXTHX8ssNClHHdwnS3Fiu3cdwXY9uxLAd9bQqB8GcmcIGIMKQvIBbkqeP6Wz1YFdJNuvVhPw1gL/1Jk5dmwW+Eg/enxAMkvxODNX1sCOIxbSeFf4otPI70Vc05eMYun8kokPbnL9IisjSdgOJgc+6Ooy+K85/lBDOuwBH8Q1mV5/3TDTlnu/K7F/Teq7eijTRO9xaylh9Ssl95F07SEwBZSb7zzVk9AOU0uiNZuQQgVcA8/s9xpFzR1kQ2b9KXf4FZAmoZsbLuk8qAhVrGtxOf5oFqjkfyk1wt3MK/lbycLsNzIT89WiDx3S2FtShOrp6JKRK+mOCc7zUkYcEQdON8k22xlU2IKg3o= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:LV8PR12MB9620.namprd12.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(1800799024)(376014)(7416014)(56012099003)(22082099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?38mkHVx1eN2n/D5yWDU7Pxv5qYexJ0SfjwBYWZd57XbqBlHggFE45TZJoygw?= =?us-ascii?Q?IVy6SKY9ueWJ2xnTlHZItTLrFwb3Dm9BZvFU+Ri0KWgEduylGzNbgH5iSnsH?= =?us-ascii?Q?45FDhiNH2e8ZNoquBefO35OoweAxkaCM/VSW8i++7VGdFjnnqHatkNmcCvH6?= =?us-ascii?Q?eMY0gucS56TtzD5J+Zgm9oJkwbhf1cD9Wl/tRAXXH10nM+jyVxzUDJwoluPO?= =?us-ascii?Q?nTIu0DK3qBdWgvTpYHc7bQvELKF2iGJFvHHh0TUchzphcRAqlIIZ2nuhB2wG?= =?us-ascii?Q?ACJUAEoNxMk3GjsYPL/u06u5LhExo30O4kSgWTrl3+OpIuHzq/2Ru0iigt8K?= =?us-ascii?Q?tuis1Gw0lWBZ821DGgcFvfs6GAvA399GmGN5OFolQgRjqsW7vRLjaLy3zg4q?= =?us-ascii?Q?+myzUNjTY/JRgsv7v90Di2S058NsJXr0lDIeFftY96H1ke5XVsns6p1j68Bb?= =?us-ascii?Q?eM7K0PxUOClMOjHBdftIXM2OAsyLvdLEjhRWan1PcD6+c7WQ9+UJgAoOAF+3?= =?us-ascii?Q?m4h2en0/tcXmQiKYjhWydgartUNYHWdUfzx/YrBnr3FvaFmMyWuq/RcBJDI2?= =?us-ascii?Q?VIAhGKqTNw8cPtb/o5/u5WB3Yd/2pveoAV5pd/Cc70tXShwifB3uGMnWe+Bn?= =?us-ascii?Q?rmUtPMbnyUXfIe2ZLuvM5TscnXq+G4g5RuVfRnD5lId8nqRmfobxVIXp7LIp?= =?us-ascii?Q?QuxR1saLrxvoGKQN9D8AdMor+2aVOwHjGK5cIVpMiQvbbK/D1t0c8WCp+lVR?= =?us-ascii?Q?azP9fR+t70beFNUqQqZDy1hVDLYhH9tHAkj4FeRVU3KfqVFCjrX0/1C7OlLd?= =?us-ascii?Q?+7j4/OxzNXwx0o4yqyJ/8+rw16u1xwPixUVFQ+7Al1GqYSdP1vZ24oSeDJFL?= =?us-ascii?Q?HyhMOMs4O4WukOWKdVCpQMitBb57yZjiDnS9kxsv6SlOn04Nj5Ra4vOET4Tc?= =?us-ascii?Q?yj0EO/q7EjEqHWIgovlwfOk57DvmMAj8HtW8ve3wZjVL+RHtWMmQdzgoHQOy?= =?us-ascii?Q?KocbcxdxxdnpQk84Y+vl2wA9yPmEYntbLN+3mwHAD1TRsqlyrvKub+uCthxX?= =?us-ascii?Q?DVd9vaJ8I6T2kPzIQWKkspRgTelbV+K8DAgsI2GhQ3rTlb89AAdLJX2ELMrf?= =?us-ascii?Q?TxaKmAYD+O5TdFf7wg5IxQgL1dwaJ8wdPcXgTHJA/52sVebqH64unkJjw6GS?= =?us-ascii?Q?28Ex+i87BCFTz/6vuFKzB5cEpRFX3wY8OynyOQBiRoHGdn0um0he0xRGHPFY?= =?us-ascii?Q?Zcitxt6BaaQ1HnkNuBV7YQMcORE2+E332WnyVM2QofUpQEj4Nn2Ow9pEvjaJ?= =?us-ascii?Q?90DgDAOmW0BUiSoMK1KvW70A5G48cdk6pGnSv7XdBmvZ570tDatE3iYzk0Co?= =?us-ascii?Q?7vBZ3NsOdKy1lvn90PNzuaaVZ/i3C8ckfXuXCcHltnLyqjOpteT5YsBlTyhi?= =?us-ascii?Q?YWtE/JQJfmGD2YWCRoJ9ejcYLqiLfw0Lr2834B9pSexiZuBKmKswLb9RdexV?= =?us-ascii?Q?8WPt5BWXjLtIKA4BfftU3/hkdjDET5nc8ED5fgSq0aKZi64bFM12i9uNskOp?= =?us-ascii?Q?mavKp7j1cDauF450g6dumyZWegvj4y+oTkQ76DfosGE7KQhmaB6B29DeZunU?= =?us-ascii?Q?SKqmVyC4f0riO1Hml3Sn8hgoBP6rsWLL5TJTfcZl4MSKzNP4rxkbmTJokEHi?= =?us-ascii?Q?bjDKOOz5iP0LIPoSQCNj7nTfaZfLKR+44hztHIpBjBt8YpQK3ZmNQS/WRXhw?= =?us-ascii?Q?L7oqg4C/yw=3D=3D?= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: ba16985d-8833-4a99-bf1c-08de8b4a1952 X-MS-Exchange-CrossTenant-AuthSource: LV8PR12MB9620.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Mar 2026 15:12:30.4340 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: dMe2cpqKaeQPan72Y3MtatU5VRv1geIH9tsXtZOqp/cwc5/ZDp2613kuk57XzowiQyhGQldAvH6GnWWZthLg9w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR12MB9627 Content-Type: text/plain; charset="utf-8" On systems with asymmetric CPU capacity (e.g., ACPI/CPPC reporting different per-core frequencies), the wakeup path uses select_idle_capacity() and prioritizes idle CPUs with higher capacity for better task placement. However, when those CPUs belong to SMT cores, their effective capacity can be much lower than the nominal capacity when the sibling thread is busy: SMT siblings compete for shared resources, so a "high capacity" CPU that is idle but whose sibling is busy does not deliver its full capacity. This effective capacity reduction cannot be modeled by the static capacity value alone. Introduce SMT awareness in the asym-capacity idle selection policy: when SMT is active prefer fully-idle SMT cores over partially-idle ones. A two-phase selection first tries only CPUs on fully idle cores, then falls back to any idle CPU if none fit. Prioritizing fully-idle SMT cores yields better task placement because the effective capacity of partially-idle SMT cores is reduced; always preferring them when available leads to more accurate capacity usage on task wakeup. On an SMT system with asymmetric CPU capacities, SMT-aware idle selection has been shown to improve throughput by around 15-18% for CPU-bound workloads, running an amount of tasks equal to the amount of SMT cores. Cc: Vincent Guittot Cc: Dietmar Eggemann Cc: Christian Loehle Cc: Koba Ko Reported-by: Felix Abecassis Signed-off-by: Andrea Righi --- kernel/sched/fair.c | 86 +++++++++++++++++++++++++++++++++++++++------ 1 file changed, 75 insertions(+), 11 deletions(-) diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c index d57c02e82f3a1..9a95628669851 100644 --- a/kernel/sched/fair.c +++ b/kernel/sched/fair.c @@ -7940,14 +7940,21 @@ static int select_idle_cpu(struct task_struct *p, s= truct sched_domain *sd, bool * Scan the asym_capacity domain for idle CPUs; pick the first idle one on= which * the task fits. If no CPU is big enough, but there are idle ones, try to * maximize capacity. + * + * When @prefer_idle_cores is true (asym + SMT and idle cores exist), pref= er + * CPUs on fully-idle cores over partially-idle ones in a single pass: tra= ck + * the best candidate among idle-core CPUs and the best among any idle CPU, + * then return the idle-core candidate if found, else the best any-idle. */ static int -select_idle_capacity(struct task_struct *p, struct sched_domain *sd, int t= arget) +select_idle_capacity(struct task_struct *p, struct sched_domain *sd, int t= arget, + bool prefer_idle_cores) { - unsigned long task_util, util_min, util_max, best_cap =3D 0; - int fits, best_fits =3D 0; - int cpu, best_cpu =3D -1; + unsigned long task_util, util_min, util_max, best_cap =3D 0, best_cap_cor= e =3D 0; + int fits, best_fits =3D 0, best_fits_core =3D 0; + int cpu, best_cpu =3D -1, best_cpu_core =3D -1; struct cpumask *cpus; + bool on_idle_core; =20 cpus =3D this_cpu_cpumask_var_ptr(select_rq_mask); cpumask_and(cpus, sched_domain_span(sd), p->cpus_ptr); @@ -7962,16 +7969,58 @@ select_idle_capacity(struct task_struct *p, struct = sched_domain *sd, int target) if (!choose_idle_cpu(cpu, p)) continue; =20 + on_idle_core =3D is_core_idle(cpu); + if (prefer_idle_cores && !on_idle_core) { + /* Track best among any idle CPU for fallback */ + fits =3D util_fits_cpu(task_util, util_min, util_max, cpu); + if (fits > 0) { + /* + * Full fit: strictly better than fits 0 / -1; + * among several, prefer higher capacity. + */ + if (best_cpu < 0 || best_fits <=3D 0 || + (best_fits > 0 && cpu_cap > best_cap)) { + best_cap =3D cpu_cap; + best_cpu =3D cpu; + best_fits =3D fits; + } + continue; + } + if (best_fits > 0) + continue; + if (fits < 0) + cpu_cap =3D get_actual_cpu_capacity(cpu); + if ((fits < best_fits) || + ((fits =3D=3D best_fits) && (cpu_cap > best_cap))) { + best_cap =3D cpu_cap; + best_cpu =3D cpu; + best_fits =3D fits; + } + continue; + } + fits =3D util_fits_cpu(task_util, util_min, util_max, cpu); =20 /* This CPU fits with all requirements */ - if (fits > 0) - return cpu; + if (fits > 0) { + if (prefer_idle_cores && on_idle_core) + return cpu; + if (!prefer_idle_cores) + return cpu; + /* + * Prefer idle cores: record and keep looking for + * idle-core fit. + */ + best_cap =3D cpu_cap; + best_cpu =3D cpu; + best_fits =3D fits; + continue; + } /* * Only the min performance hint (i.e. uclamp_min) doesn't fit. * Look for the CPU with best capacity. */ - else if (fits < 0) + if (fits < 0) cpu_cap =3D get_actual_cpu_capacity(cpu); =20 /* @@ -7984,8 +8033,17 @@ select_idle_capacity(struct task_struct *p, struct s= ched_domain *sd, int target) best_cpu =3D cpu; best_fits =3D fits; } + if (prefer_idle_cores && on_idle_core && + ((fits < best_fits_core) || + ((fits =3D=3D best_fits_core) && (cpu_cap > best_cap_core)))) { + best_cap_core =3D cpu_cap; + best_cpu_core =3D cpu; + best_fits_core =3D fits; + } } =20 + if (prefer_idle_cores && best_cpu_core >=3D 0) + return best_cpu_core; return best_cpu; } =20 @@ -7994,12 +8052,17 @@ static inline bool asym_fits_cpu(unsigned long util, unsigned long util_max, int cpu) { - if (sched_asym_cpucap_active()) + if (sched_asym_cpucap_active()) { /* * Return true only if the cpu fully fits the task requirements * which include the utilization and the performance hints. + * + * When SMT is active, also require that the core has no busy + * siblings. */ - return (util_fits_cpu(util, util_min, util_max, cpu) > 0); + return (!sched_smt_active() || is_core_idle(cpu)) && + (util_fits_cpu(util, util_min, util_max, cpu) > 0); + } =20 return true; } @@ -8097,8 +8160,9 @@ static int select_idle_sibling(struct task_struct *p,= int prev, int target) * capacity path. */ if (sd) { - i =3D select_idle_capacity(p, sd, target); - return ((unsigned)i < nr_cpumask_bits) ? i : target; + i =3D select_idle_capacity(p, sd, target, + sched_smt_active() && test_idle_cores(target)); + return ((unsigned int)i < nr_cpumask_bits) ? i : target; } } =20 --=20 2.53.0 From nobody Thu Apr 2 20:20:24 2026 Received: from BN8PR05CU002.outbound.protection.outlook.com (mail-eastus2azon11011065.outbound.protection.outlook.com [52.101.57.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 77B5E4014B7 for ; Thu, 26 Mar 2026 15:12:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.57.65 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774537964; cv=fail; b=cpc/BTy6xj/fCBkT/3xHy2sw2dkP8O43Cs/EnxZQPpKUNnF0WG+XV2lXd49C12qJoNQdXsgEeAOZkUv0UrZpEzrBZj84RRYkzp291EoPa49SO4xBNg/2a3613q9IauKa2CtDsSci3xcTu8N18fayi51O0CHYyScpiWVhqRZ4yHA= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774537964; c=relaxed/simple; bh=2QWPc3DDQm/hQlDEuRvT9hzYAOqCojDlRnCC0xyN8Ko=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=NUhKiAUhz81KST+TgRrroSo4Z5LjVhJaS8CSBp9sELb3fD8QHgd7FAJIXIc+2O0Tp/rGeDFrURvdJGqGzhGQpQq+Xy5CFZivIWyLeAYQM4wlLURYXItmBQmNT9A9/2PMHc1s0NShZ9Q/d9E6Lp0E7lRWmnE884K/LEWMezdn2eE= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=CCX6hsvG; arc=fail smtp.client-ip=52.101.57.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="CCX6hsvG" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=d7CIr+pdMAztf/3FmB8lRV4WHTfF5jzIt/PHlBhjBdpc047SSZQ4vbzjRRK5C7G/5A/60BSkNxJ4+va8E2CFvGygOs+TYSeTIcMLfHpnqDSe5uNbaSbruSdYb2VMfX9BgvdKZ75/C5YrJdiMdM8ZhbMrRc2l8WHihmb1ELcNDGquti98lGbQ219dAXqCY0XFAjfkvR520bvGuuVWny21ii21+Lpdexhg7R3QzAr8AZNTeasmSZyB7mhG81OKbq35qNofFf7awXTDy+RGlOKkLlDdD1Kr0D5G0/gsbOHT2DVZtQ9mNcGdTOR35cepalI9ouYp7r4TqNQeawgr9HJ8sA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=9ubVDpJ/2nJhhIZio5Iw0wGC2T1ZcfeaXRfUQOKjNy8=; b=ComWmyGkph+sNSekss2e4WewTYizeFRKuUuEmBpq4QyjSlcjg9y0HMYOkhXuBRtjquTn1Xhr3zR6NHCCEbN2hdlMAqth1clJ3DBmCgU58QYcP21ZYjdFA1mHMKpo53a/zC2+9mHETmowkNB0F5IP4qXK1ej7RsydcCU2Kcy0U6IRJVVI7waBzOmYz+zDjPsK1KjRhym9Mu8cFP6MeqQu4MFvtQSHSEGMG51PTxwA+wmBk/nmIdEagHu282oZlRIMFhJpAK6ecrUlo8rVvJPa2MV8QYwzVL7HeVlUFLsDXj8Ysd5R6Cn1lKDWrnQ7AkqAe+rR6U8FUD3hwnx7kp1D1w== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nvidia.com; dmarc=pass action=none header.from=nvidia.com; dkim=pass header.d=nvidia.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=9ubVDpJ/2nJhhIZio5Iw0wGC2T1ZcfeaXRfUQOKjNy8=; b=CCX6hsvGvsholv8Er3fFE3Hmu1sdta4VyLccgi9IwsNohDylXZS3ot4ZDP8Epli3ZB9EDMApTRHx/IxCCbxh9P7m60sh2bImh67eaABbcEPKkCt9dW0X4sCy+K7n9U04LpeN6vm8vcgyXfdpHJCHiDyQPY8Oaw11b/Fk6HJxki2fBwm4OiM7y8mK3ul3qjr3K5KSjvlAcCenGY4g6RvefM3fGHdGeDqLTxubggeur9I4UI8t0+RnlRF41wZFmWQtJeMq7X9TcSlZ+tVE1E/HsaEPKnYnO/Vay8lBAhyrWAd5rN6Bb2bqtvU6s6j6wHsgWoJ/RsVRNIP8h53zUk6MsA== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nvidia.com; Received: from LV8PR12MB9620.namprd12.prod.outlook.com (2603:10b6:408:2a1::19) by CY1PR12MB9627.namprd12.prod.outlook.com (2603:10b6:930:104::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9745.20; Thu, 26 Mar 2026 15:12:36 +0000 Received: from LV8PR12MB9620.namprd12.prod.outlook.com ([fe80::299d:f5e0:3550:1528]) by LV8PR12MB9620.namprd12.prod.outlook.com ([fe80::299d:f5e0:3550:1528%5]) with mapi id 15.20.9745.019; Thu, 26 Mar 2026 15:12:36 +0000 From: Andrea Righi To: Ingo Molnar , Peter Zijlstra , Juri Lelli , Vincent Guittot Cc: Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , Christian Loehle , Koba Ko , Felix Abecassis , Balbir Singh , linux-kernel@vger.kernel.org Subject: [PATCH 2/4] sched/fair: Reject misfit pulls onto busy SMT siblings on asym-capacity Date: Thu, 26 Mar 2026 16:02:35 +0100 Message-ID: <20260326151211.1862600-3-arighi@nvidia.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260326151211.1862600-1-arighi@nvidia.com> References: <20260326151211.1862600-1-arighi@nvidia.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SJ0PR03CA0087.namprd03.prod.outlook.com (2603:10b6:a03:331::32) To LV8PR12MB9620.namprd12.prod.outlook.com (2603:10b6:408:2a1::19) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV8PR12MB9620:EE_|CY1PR12MB9627:EE_ X-MS-Office365-Filtering-Correlation-Id: 70a1abf2-2f0c-4dd9-d1a6-08de8b4a1c76 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014|7416014|56012099003|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: FvpuPjiqHjHziYgfI9HCwzAzc2PA50HBiCKn2R87n01IIP2SiN3AZnR0eBd5vAyNdISJMeCMJTZbNyNhlEB8O5u5M3G1ZTCRUhhlKocFEVrmP8p+jFd8oaBPSGub0+ItqQ9khjW/+d0DS2CpoGd69djdFQjISM5a0YqE9gu6KSt/d2h1NbBPqBfyEye6mcpnnl5TgMiYCx6bvZ1KxfKbgvQfuxakAWaURGQk1JoERicR71APavb/R5ony5qyFe8i7YYp0G5WLIyVEN9sSxq1xn0Tuy7R9b6nf6faJXXm4ZXraGMRPhe2P1XqE9l3cPN9kWKHUfeHkX/UuZ1OeO5t+jhITTdKiIZDWNkF6EXiiiQhO1k8a4/KOe5pEX1feXTus9o/hjnDdaR2uLxVvU7QgH9pAkuAYGpHaDy4hycxHclfVhAFjRSwlTM7/gPIvUYYoh9FWkk0827mKAfrHk5fOzOVE3DCb3TyWDmnIFGMbX7MWIswzyn3UJOpHWVX0pfpAqVqpHu4k2RPyzMdC0dinI1YosLcs4FjN151YhLcBga8Gfmdj9/3b9S6WIx44MjdMExl7TUN5yDOcgmuiuhfyNbH45lXvlocBBe3y/G250jlq6SOhwP+w9NemeHI9LYnMR8lLCjzGEPVZAqqeCNIhoFE2Jw8w9rcnkRXrbIcISUiGUVfXdIbTTbAjtj783C5uaap4YBdI+6iKmv1XduVSnGJWIQVkUeYJ1CiWmn3uqw= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:LV8PR12MB9620.namprd12.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(1800799024)(376014)(7416014)(56012099003)(22082099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?aCs0P4fuUWloHa60Osicx7gxOD2OBxOLTsyNA0PqoKLL6h0qP7jjJJBoroqg?= =?us-ascii?Q?WGI28xUi5t1eHHP+/cmCeuEaSUr5V5UwDtrEXKniugbVK+DW1EhlUCLySOs4?= =?us-ascii?Q?1Oa1PQrQYe8UPAO3ABYrZyxUsokwPql7nBmwJyPTy+dGkTuS6qLuYOZigWaD?= =?us-ascii?Q?5whQDJikeSS8Et0Yq9FssNGAmvRtvn9VIAPucFKGhgpnhzxuKqEruHcRzhcl?= =?us-ascii?Q?RI8d/1dYgS12vIsURUhd0YAvSS9VYPit5I3SWWe/xOT7hCFxnfr0AW5XdSjH?= =?us-ascii?Q?4XggzMwAG4RaBRuKQH0kCIsHrMLCJK45gEOhagiR/a2eHeT2Ddww60+4taF6?= =?us-ascii?Q?xv21Fa+OZSYaCxrfg8Q6QrtFwSeMOEFFXfJK3aEvBq0dfrrRhTkXeXY+6Gxg?= =?us-ascii?Q?EU7mQsdpPQ4f3U4J7K5RA3qxlQPxtzQHmQDCqW5XEnD86/BRW5amfmBeb73t?= =?us-ascii?Q?1COf9eGAAO0IwlAMAZ4QCxCevsL3djwDHrq8nN9YU2z4C6Ni2TPIslta+ptg?= =?us-ascii?Q?3G1Uyvr8fC4kNHIFV8evcbWvSeiV3f0ZVIx4XN7HZ34w9zkQtLh7SSzw9f9s?= =?us-ascii?Q?aboaE3+1PHK4AvzHnAsLcaGYZis6KSARTesWoV9MaoVDpPyCP9/T/RkBReyB?= =?us-ascii?Q?yTVO73ziMpkPfOp/mObKQXiMiAqEuwIMqkN7JQCp6VQw6DNZ7xaG0aJYTvcr?= =?us-ascii?Q?AEXeZQnBGEkjO/AymEtr+SxGlXp2KGGm/p9HEqYzSdhR0AAsfEHL1DfdE3g0?= =?us-ascii?Q?ceUVJ6wSwPNI3PSJYCjkY4R0sI0GiZOL2aPzEibl5xgdZ+h1BfU0vwt1OHeX?= =?us-ascii?Q?ttTHDoThqtbJyjiGohDqpOOoJ/A4bVlzuRttmWp8W2/ZxSv8DWgyAOz2ssCB?= =?us-ascii?Q?HQSp16cz+Fd1Ogn7Fp0Su9D/G5avdgfASRzCs6mnPKZ0liywrpf/DmML08RW?= =?us-ascii?Q?opMzcismHJWnvWSTySxsabSJ/3014mQBQxaoHj2Tr4207QUuSQHdB0fu/fc5?= =?us-ascii?Q?ofOZYy+DkAQarRZA1ZC0mWwX76gOAbhVM8B5wo6XBeSF25k+n20017qhx8/w?= =?us-ascii?Q?OKxCuICy1bOrpMhsQkGV6KndiiK4PRQ6KDwOZ1aIEsGhOV178pBl5d/d+0K7?= =?us-ascii?Q?2wMrmpYKBOaLCkUSyGa8TZ/JhoZ5wnQpYLmOcwPOEew71i4FcS3qumMArx79?= =?us-ascii?Q?7tvmBBASPXCQYIKDKcYpd8xOQhlyEBHxd4ZgcOoCArPDBHG3brJuLvDLYrPO?= =?us-ascii?Q?bc/9kWG/Mqbi8BjlBwJMBQzqDrin0OyksmdjbIS88urSuw6VIprWEbCEN16e?= =?us-ascii?Q?qdvJoB+cPb7wTGGASpnE/wpkYXB39+84QSvYz2GoHbVjga0Ayu3ozRMwQ/sU?= =?us-ascii?Q?KgHYdQ0UeZbXiWJFXcOmopuDlPBG6TQePCYL2oid0Zp+QVP8K7bGp4I+m3fz?= =?us-ascii?Q?mx3is7C2yTdynIUeCm1g31TnJjOWlintKnxjmTHJBC+xRD4iuGMX1ANhJAiG?= =?us-ascii?Q?rrr/39qcA/rzp/Dp36Idch9g9X7Yg7qWypQ8P5mvDYK5klJn0F09R+t+l1kJ?= =?us-ascii?Q?1Z+8IPKcliTfxhbxLJAkYacUacffcAPr86u9TApgNhlAKEwrIln+es24K3BC?= =?us-ascii?Q?Q+2jSrtqQFTI2uxp3N4v7isTSdgvu1SBIFINNsm4BwboGS/v9bOO1IxDoe9O?= =?us-ascii?Q?MU24WiMTqLGhkSYIYEIW1rPVv9f8h9eHSGCX7zLqnoum++6HYlhJ1ICS1xnw?= =?us-ascii?Q?Ibb4tpi0FQ=3D=3D?= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 70a1abf2-2f0c-4dd9-d1a6-08de8b4a1c76 X-MS-Exchange-CrossTenant-AuthSource: LV8PR12MB9620.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Mar 2026 15:12:35.9366 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: J1B7NSY3yGSy/yG8vDnR5N/eLZUAOZ3dO+jhEHcUYiI4rK0mX1ak6V8Mt/bBpZb2RQBKfMeKX1KvMwR2siX3hg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR12MB9627 Content-Type: text/plain; charset="utf-8" When SD_ASYM_CPUCAPACITY load balancing considers pulling a misfit task, capacity_of(dst_cpu) can overstate available compute if the SMT sibling is busy: the core does not deliver its full nominal capacity. If SMT is active and dst_cpu is not on a fully idle core, skip this destination so we do not migrate a misfit expecting a capacity upgrade we cannot actually provide. Cc: Vincent Guittot Cc: Dietmar Eggemann Cc: Christian Loehle Cc: Koba Ko Reported-by: Felix Abecassis Signed-off-by: Andrea Righi --- kernel/sched/fair.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c index 9a95628669851..f8deaaa5bfc85 100644 --- a/kernel/sched/fair.c +++ b/kernel/sched/fair.c @@ -10819,10 +10819,16 @@ static bool update_sd_pick_busiest(struct lb_env = *env, * We can use max_capacity here as reduction in capacity on some * CPUs in the group should either be possible to resolve * internally or be covered by avg_load imbalance (eventually). + * + * When SMT is active, only pull a misfit to dst_cpu if it is on a + * fully idle core; otherwise the effective capacity of the core is + * reduced and we may not actually provide more capacity than the + * source. */ if ((env->sd->flags & SD_ASYM_CPUCAPACITY) && (sgs->group_type =3D=3D group_misfit_task) && - (!capacity_greater(capacity_of(env->dst_cpu), sg->sgc->max_capacity) = || + ((sched_smt_active() && !is_core_idle(env->dst_cpu)) || + !capacity_greater(capacity_of(env->dst_cpu), sg->sgc->max_capacity) = || sds->local_stat.group_type !=3D group_has_spare)) return false; =20 --=20 2.53.0 From nobody Thu Apr 2 20:20:24 2026 Received: from MW6PR02CU001.outbound.protection.outlook.com (mail-westus2azon11012006.outbound.protection.outlook.com [52.101.48.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BD8DC401A3A for ; Thu, 26 Mar 2026 15:12:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.48.6 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774537969; cv=fail; b=sRmW1zX1a1mljLJMF5PPkXogu372zYgJL1r+ASj467pr0NafG5+2cT4b3H/2fMiAcT54cwob3iKIltBu7Vqu2T9RwWmJt/uYtAb2WNilLyGDsXAHyZ3EQ6xUc/9mSnIzl3i5QGOsRXZvPzx6o+W/4hVRPNjVWzNaxIIWc19tPek= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774537969; c=relaxed/simple; bh=iRpin0qHYVwdntxP8HGa4LutHarn13deIxoGm60WEBI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=TVQV7mMSQk2UMTCZcTjypTxkF2ZNJuSBm5zf7zoUS1pjBC74vZhtSXYWB8UmirkrcrJ8SZSm2jUXgrxIJL8/MOaWhWRXV5ywdgVByZI4ItS28rNoy5hrg+gLYDgTFMwBaD+PrsjipSZ2ZZxFcY3Od+iCUovEIFPspnUgwz37Xe4= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=RsV+2iDd; arc=fail smtp.client-ip=52.101.48.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="RsV+2iDd" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=aC/PwuOftXfIXxssBl0AiOBxI5HSOQwPs7I94/tHb86W2lnWaIdIRlF8Q39L9oQC21h8CJAlmdh35sO31N0ynbU+rwMagzJ7xtF4EkxLca4sTRbDx7ZKYsVu6v63MpdeB0anjus0ZALq2Ha5wGPgzn68Lk4m1nk/AfBpHdYUgfljpDNkK4kZJkAE10ruHdN6zxkvF6+iNBwrCo7+4hW9f4jqpIn11/xT5cwM1RPVED/7c2oNrrcB8w/WCTVkDV+OMCuPawaZyIPA4wEv4Re5/+V+l6RBVMxBny9aCyJ1YFe4LHRZZxyto54KH2Oc9K1sNKDp0ls7ORjATxvp+Vu0sA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=aw8ndDACNQEnYKxwTsX+80XdjUOwEip3UTeST3ctfTI=; b=zT7j1FeQCpbw0RJvj+2TCJVxw5hIfZ1veem7I9TuneRpUjDtIrxC0/gqFKAyZmqs43mZa5pdYFQZb4aqN/QSSAE62sBR3JcPhTXi6bCYKB6DR8pTACKroSLWr2OAR2s6e0klf4PPxucsvgzKmOcViD7RClmqh2xaU3gZyluVbYlCBo+U2wGrvYvKzxiwTUerwPQMzgD0aMt8bne92nbwbxheupQlEi/H1rL+p9lzIpQrUjWao/hv/Om7CSrp6B8yH6gxEVDh8UgeW2Wo0ZT/C9rY+tywVLtTAv5I1xfMQD4DYUdf8c36sG8IRXRYKRd4+r8ZXL0Ok3ZSN8S8yiesQA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nvidia.com; dmarc=pass action=none header.from=nvidia.com; dkim=pass header.d=nvidia.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=aw8ndDACNQEnYKxwTsX+80XdjUOwEip3UTeST3ctfTI=; b=RsV+2iDdp9SUSqD951+WtQkzDmzdiMFluoU4W5WrcL1B4Gxleg6dgbyIR525YkZKFxpC2qZZks/I0sIxvn8AW9Ooxuzzl4bKAyL+UI5N10qOyyvoou3l2X3k/scHjVPMBa67h/jH1FjpXrQ3qGyAFJXx2Th2wGMZ4SMKxFSEJuMC/I0nrnN/fTCgG9A/5+83oEwgHRuaSpZmQGOXcc2GT78F4ezmLZjfJtJryW7ojacjLV9ItLEG5K9zWYezdyxXvkQfVnjU2VH6HbDlWbpsdGp8WAddxmXGYFP43QNrlkfy0l7Dj6Gs4Nnyr0HdOA8yb297e1ftPyoRRFQvR7Vsmg== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nvidia.com; Received: from LV8PR12MB9620.namprd12.prod.outlook.com (2603:10b6:408:2a1::19) by CY1PR12MB9627.namprd12.prod.outlook.com (2603:10b6:930:104::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9745.20; Thu, 26 Mar 2026 15:12:44 +0000 Received: from LV8PR12MB9620.namprd12.prod.outlook.com ([fe80::299d:f5e0:3550:1528]) by LV8PR12MB9620.namprd12.prod.outlook.com ([fe80::299d:f5e0:3550:1528%5]) with mapi id 15.20.9745.019; Thu, 26 Mar 2026 15:12:44 +0000 From: Andrea Righi To: Ingo Molnar , Peter Zijlstra , Juri Lelli , Vincent Guittot Cc: Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , Christian Loehle , Koba Ko , Felix Abecassis , Balbir Singh , linux-kernel@vger.kernel.org Subject: [PATCH 3/4] sched/fair: Enable EAS with SMT on SD_ASYM_CPUCAPACITY systems Date: Thu, 26 Mar 2026 16:02:36 +0100 Message-ID: <20260326151211.1862600-4-arighi@nvidia.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260326151211.1862600-1-arighi@nvidia.com> References: <20260326151211.1862600-1-arighi@nvidia.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: MI1P293CA0006.ITAP293.PROD.OUTLOOK.COM (2603:10a6:290:2::16) To LV8PR12MB9620.namprd12.prod.outlook.com (2603:10b6:408:2a1::19) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV8PR12MB9620:EE_|CY1PR12MB9627:EE_ X-MS-Office365-Filtering-Correlation-Id: 437ed8ad-72d6-4e18-5784-08de8b4a2198 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014|7416014|56012099003|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: LDUdfRKwRM3iZODLkTUN7Bzqgtx2UhMx79I9L4c0FiGH4emBrdISplFdRZxj5ljheKT0sKlY+A0fz3moIleUyh+k2rMyZJJQ+YckEbtF9Sxg3PnzffgJ124RnTtdqKxdr7nawizW+uxjNOXkiKgN2ZCtSA44edapG/v25Wk8cWKZUYIUpnxOXvUbUgof8pvpTcgEpR+3Ekhb+qzDIuA4K16nz+vibWa7kp2+eWULdFa7dYKt7C2UtbyQ8uf5rjHdc3SpURADKOoZnqK4F5z5E+vTcURC0lovzadhuMJITzWYTLecGP+p3Nj9dVo8+dLwzFpwnPv27VTKgCbkLm/QrNAN+ASk6kI2jJRWB3fCrl7FZpNYIxcQCHKlJZtsTkSRf5CUn+HlJTgIS9blYo/D5DbBBoLCO7OeMyAVQblz0SRF49OnQCyIjsaaz5a+oDarWwbE9N3l7uI4MWXDy3Y8EZH7tLrlIBmP7qlaKu2ZdaQQkaNYskGgMOIQ860YZOL6A4MwNaZCUmxIA1x5KUXDFCXF/AtWGk+SU2YUGYWRpIWWfNf0Kb0ePlrX5mhFfoawVJjEGvKSZfcj8f8w9yqLttAfKGZ/+xOmX7yWwoYvFMFa9J1UOMsUYQYCUZTedsVkpdnuryhdoo+h7Ely09438YRcVWQ+tfRRJ4Pk5rN/lMT8iHStFSHPN9qTYl40yEsjBKhWJjW+UTleKcB7X7KAjI2nHHA96ub9rrXb8Bg5JEk= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:LV8PR12MB9620.namprd12.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(1800799024)(376014)(7416014)(56012099003)(22082099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?CZtnRkNT5izrWfItBKDOF4LzOs8Oogm/g2fRka4qjfgKnAP2xlxtuZO7mUP2?= =?us-ascii?Q?vcHUTXF3u99DM2p7LPt7Ilnr7euQbYr/Kh4o94UdRCvROFiEZvqKfwHLvupV?= =?us-ascii?Q?o6TbJdl023qZruk6tjMsSnRHn4pykgqeTUMMQt6pQ8X/55LAnK2J7J9C10sa?= =?us-ascii?Q?kwhRhRM9zujAHFt5XDDFpewkTiiDIeJqYfj5q6r+FKbNj9mjb13VFlBN4yhl?= =?us-ascii?Q?lFyKBxjj2wqnLU06xQogUgKrJ5yfs3cwILY3HirYFWZC9YoOGvKcHjNks/Cn?= =?us-ascii?Q?wxhlRlhpsUnMTkt6XnmBYn6mvfdFViCrb3/ghn+IA0YTuzgt3B4Mgsj/gP4Z?= =?us-ascii?Q?rYrjJsi/IgcbNG/nW/dzCfalo22g+g+SCKYX4oDjHryNBIQjhOZb1Ff1aaqS?= =?us-ascii?Q?vTUA+szTNdMUPdaRSrmqW1zXyu12GRqUzcWx69jD0ylIySECrAi1+8SNFmdb?= =?us-ascii?Q?pOJIhEAEKaMpJpvcLt2ju2mhgSQRFRom4yd19pDFWukz/EXh95qt73jQjYx5?= =?us-ascii?Q?8JdMkdinW/oj+0PbVp1voERCwjdjt/5e06SnesTIeshPUCUtAwPrPrKOP9+U?= =?us-ascii?Q?2fMXLrpFULsv03TDz361uGICzfE7RcW7G5xESqfbv+bF8zHDgaTqOTiLnfAg?= =?us-ascii?Q?jtvtNk8J2BWjrtcI1gzqSaUivWqkToZsbaUMbg1h8I/aFqsD1wx7HWavsGsT?= =?us-ascii?Q?FIRw03F2YVt+olhS2C3/5SBht3gyEebn1ubECv/t1/Z7dHYHEUPYaVl9cWO9?= =?us-ascii?Q?KM8lGi4mTQV5D55Kcklq9XSsiQ+8q8Db85PBGoiowhSQLQhlu2ZKgU3E7g04?= =?us-ascii?Q?15KIY3lZuLmYgZg0pJ+czFMemDjdyD6wAJ8zzAbzi5C9wURjNX3uZjKkFw3/?= =?us-ascii?Q?aG9ZwGmDoB1KHoFckPor0g9Sp0e+hDfwmMNP2x4OKV23jKcvYTWj2vWvPeUr?= =?us-ascii?Q?+8ZypSGR/uRTxRYeojRPbAwXzHU5YK3D+mtnBFSJOznpAhILxBgXwdXiw7WZ?= =?us-ascii?Q?ELRaGJdgRFDBZDQ8sqyy3gwWRU9yS7GQnHHsDcV/i3DPLi+EY0DDaeIFaM2W?= =?us-ascii?Q?aZCNv2H8Hmfr/KBuOlTbvU62b8q063diV6bKLAPHWYZFQIc/MTjkri/aQSWx?= =?us-ascii?Q?W/AEPAOo4UQxRIURXi83yCYX8bwi2aE1xI53tG7WRImOdcrJmxFM7Gkv9mGf?= =?us-ascii?Q?GlG0qsl8+mD7qlgLScJfSaLcMxqSYIxjSbPdayVhxSjlpCg8lBmJi5+PBxXX?= =?us-ascii?Q?CZEBsIZF1GISqtWY8jkz7ZyTi+8F1b2HYoKTE8NJ73sJyRuKnNPcn2cfqmAH?= =?us-ascii?Q?6ajAFNflcO+ARu9+9mb6Ismt3T3OHFciU3GtL0jSdA6Stli3vm0+xeG0xR8x?= =?us-ascii?Q?3pcC4mhLrOzLoV2+GbxV7hXr8QRccvYy0JM8UOWr9jVGy0wf38d+YQgxGixl?= =?us-ascii?Q?OsH4pVmp+C6MB2QHTUQWrYwhtchWROUSU3YxQ5rfAbpu1IUSD0Fla68GCkqV?= =?us-ascii?Q?BIOV4mwadkrGuUcxdSGd2N4GyPxCv3bpWsLA2hHa7F1xii1ChoNtRF0DT7bm?= =?us-ascii?Q?zUKLszFNKuFdBIevu/NSFQ+8jL7zEGJSOn8Dj4AfrlcX1TUqWnL107o8+o7q?= =?us-ascii?Q?0hlkL5NtfWl2Hb5tGHSxLE88qxkyAcAX3t2llWC6HIZkh6nau4WTXjw3Fuun?= =?us-ascii?Q?6lSW94C0QdWfDOzBwZxJ4WYBA3dRb+Zxw4jWfB3u9hDN3/Ab3WQrgy6EFykI?= =?us-ascii?Q?ZLJOjOiZ5w=3D=3D?= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 437ed8ad-72d6-4e18-5784-08de8b4a2198 X-MS-Exchange-CrossTenant-AuthSource: LV8PR12MB9620.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Mar 2026 15:12:44.2785 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 6eWNmSGEmL7BRFlVeCMvh6zwFlURyRGonpH484kjn/vnLrC724GEOWkwd5do70VkcN3OWFhIjT2DzclIAMfdtA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR12MB9627 Content-Type: text/plain; charset="utf-8" Drop the sched_is_eas_possible() guard that rejects EAS whenever SMT is active. This allows to enable EAS and perf-domain setup to succeed on SD_ASYM_CPUCAPACITY topologies with SMT enabled. Moreover, apply to find_energy_efficient_cpu() the same SMT-aware preference as the non-EAS wakeup path: when SMT is active and there is a fully-idle core in the relevant domain, prefer max-spare-capacity candidates on fully-idle cores. Otherwise, fall back to the prior behavior, to include also partially-idle SMT siblings. Cc: Vincent Guittot Cc: Dietmar Eggemann Cc: Christian Loehle Cc: Koba Ko Reported-by: Felix Abecassis Signed-off-by: Andrea Righi --- kernel/sched/fair.c | 50 +++++++++++++++++++++++++++++++++++++++-- kernel/sched/topology.c | 9 -------- 2 files changed, 48 insertions(+), 11 deletions(-) diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c index f8deaaa5bfc85..593a89f688679 100644 --- a/kernel/sched/fair.c +++ b/kernel/sched/fair.c @@ -8658,13 +8658,15 @@ static int find_energy_efficient_cpu(struct task_st= ruct *p, int prev_cpu) eenv_task_busy_time(&eenv, p, prev_cpu); =20 for (; pd; pd =3D pd->next) { - unsigned long util_min =3D p_util_min, util_max =3D p_util_max; unsigned long cpu_cap, cpu_actual_cap, util; long prev_spare_cap =3D -1, max_spare_cap =3D -1; + long max_spare_cap_fallback =3D -1; unsigned long rq_util_min, rq_util_max; unsigned long cur_delta, base_energy; - int max_spare_cap_cpu =3D -1; + int max_spare_cap_cpu =3D -1, max_spare_cap_cpu_fallback =3D -1; int fits, max_fits =3D -1; + int max_fits_fallback =3D -1; + bool prefer_idle_cores; =20 if (!cpumask_and(cpus, perf_domain_span(pd), cpu_online_mask)) continue; @@ -8676,6 +8678,8 @@ static int find_energy_efficient_cpu(struct task_stru= ct *p, int prev_cpu) eenv.cpu_cap =3D cpu_actual_cap; eenv.pd_cap =3D 0; =20 + prefer_idle_cores =3D sched_smt_active() && test_idle_cores(prev_cpu); + for_each_cpu(cpu, cpus) { struct rq *rq =3D cpu_rq(cpu); =20 @@ -8687,6 +8691,11 @@ static int find_energy_efficient_cpu(struct task_str= uct *p, int prev_cpu) if (!cpumask_test_cpu(cpu, p->cpus_ptr)) continue; =20 + if (prefer_idle_cores && cpu !=3D prev_cpu && !is_core_idle(cpu)) + goto fallback; + + unsigned long util_min =3D p_util_min, util_max =3D p_util_max; + util =3D cpu_util(cpu, p, cpu, 0); cpu_cap =3D capacity_of(cpu); =20 @@ -8733,6 +8742,43 @@ static int find_energy_efficient_cpu(struct task_str= uct *p, int prev_cpu) max_spare_cap_cpu =3D cpu; max_fits =3D fits; } + +fallback: + if (!prefer_idle_cores || cpu =3D=3D prev_cpu || is_core_idle(cpu)) + continue; + + util_min =3D p_util_min; + util_max =3D p_util_max; + util =3D cpu_util(cpu, p, cpu, 0); + cpu_cap =3D capacity_of(cpu); + + if (uclamp_is_used() && !uclamp_rq_is_idle(rq)) { + rq_util_min =3D uclamp_rq_get(rq, UCLAMP_MIN); + rq_util_max =3D uclamp_rq_get(rq, UCLAMP_MAX); + + util_min =3D max(rq_util_min, p_util_min); + util_max =3D max(rq_util_max, p_util_max); + } + + fits =3D util_fits_cpu(util, util_min, util_max, cpu); + if (!fits) + continue; + + lsub_positive(&cpu_cap, util); + + if ((fits > max_fits_fallback) || + ((fits =3D=3D max_fits_fallback) && + ((long)cpu_cap > max_spare_cap_fallback))) { + max_spare_cap_fallback =3D cpu_cap; + max_spare_cap_cpu_fallback =3D cpu; + max_fits_fallback =3D fits; + } + } + + if (max_spare_cap_cpu < 0 && max_spare_cap_cpu_fallback >=3D 0) { + max_spare_cap =3D max_spare_cap_fallback; + max_spare_cap_cpu =3D max_spare_cap_cpu_fallback; + max_fits =3D max_fits_fallback; } =20 if (max_spare_cap_cpu < 0 && prev_spare_cap < 0) diff --git a/kernel/sched/topology.c b/kernel/sched/topology.c index 061f8c85f5552..cb060fe56aec1 100644 --- a/kernel/sched/topology.c +++ b/kernel/sched/topology.c @@ -232,15 +232,6 @@ static bool sched_is_eas_possible(const struct cpumask= *cpu_mask) return false; } =20 - /* EAS definitely does *not* handle SMT */ - if (sched_smt_active()) { - if (sched_debug()) { - pr_info("rd %*pbl: Checking EAS, SMT is not supported\n", - cpumask_pr_args(cpu_mask)); - } - return false; - } - if (!arch_scale_freq_invariant()) { if (sched_debug()) { pr_info("rd %*pbl: Checking EAS: frequency-invariant load tracking not = yet supported", --=20 2.53.0 From nobody Thu Apr 2 20:20:24 2026 Received: from CO1PR03CU002.outbound.protection.outlook.com (mail-westus2azon11010068.outbound.protection.outlook.com [52.101.46.68]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 04CEB401A29 for ; Thu, 26 Mar 2026 15:13:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.46.68 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774537984; cv=fail; b=Z+adbO4KJhzPqDqhap0A0fTaR4VImn/QoF9HqRNIFRSBwQhVgE5J6nwONPvSw4XdNtblqv7mixuBaDZeLfgUonwbNk9JfPSYKny1qdpXALEldH4UE8bw5QOF1hhFXiljomDwwxZ/jIXp6d6S/VFxXIxVQ6M8oVPS5OSkPwti/OM= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774537984; c=relaxed/simple; bh=wAgUxS5HfkCswNy0VyVLxSNnc3BGNnfaSsJw1l9qqP0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=CvFz+18ovJYeROrETEu7kgxgDMSE/y7lD/0OdhKQSspIBb0gmDmqYxpBgA6aKaKyCkDEEx9S8j14C9HZYh2fDjIcMemzBKSuaL6ox64syYezYtmI0if9woyVRO5r716gaFcKYPiAMtjhgBc7FI+uurpgmBoxU92FedV4I9b7nSI= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=b02Oc2o2; arc=fail smtp.client-ip=52.101.46.68 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="b02Oc2o2" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=oYrnQkpl6EvZuUZ714KZko+9MnmFrurMYrHz50Wg453+Uj+ngaSHk0oWJCr6fzMRMy9zpfod5B20dcHkXqwQyi5SknyMtNdXExKAUS2Qx645bbQbYRq5ycoGvKNJCuhWdaNj5JZUC+wsatqtIM5dCXJlJHngafCO8U1xVJewZOH3FDYsazz0SX719u+fZBiYO7j92+2MPGM3atgMlZ0zq5Hb28/6G9U/8aQZgw1640Bz7ibp2G4vD8PbMtiBu2T3e+auyzwKpE9XLpaqwXYoz1wy5DbCVyxVNFfroPMjqgw69/h3Z/YSmI4Fu98q1rJMYb+4IHR+rXZwsPfsAT+2lA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=rrfvgTVoNZbM3jBfC43gpMgwIKVz4DgedzZqYO0BoZM=; b=A9OzS+6KGxYjGR+WoR0p747O8qZLwJHZZd61nrZ4iyYjoWzS12FCBOYL7KYNROMOSKO2XXxhJ9CE7VYPCgZlGJ7ObzcGYHnJsCBQkwRgfrf93bjMqcpO/pSW0U3RfKw1+chGuR9aJ8wL8vb5zMpqOIUWOCttW82j5BuFSPfNhjshQSEuSx4hmY9/7SAYYfsOFV1vsfBAa4zLR2UQq5olhc9GNiAXpnhwg4h3alypc1ZSsWosS6OoN5BWHB8dYpbAnWxMSn7EUBFVsJIfBFBvKW0clLwFAdGoM6nVPL+LT6E4aAgM6945fR21mQO6/ehWeWlt+07QHf//cUseD3IObg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nvidia.com; dmarc=pass action=none header.from=nvidia.com; dkim=pass header.d=nvidia.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=rrfvgTVoNZbM3jBfC43gpMgwIKVz4DgedzZqYO0BoZM=; b=b02Oc2o2u24V8asCxRip34IPj+n4RcRl73tWI+QZpDqbq0XgoKuHzvTjkCCJULPUoB5Hc6b5W2WOpZXRYZYKHxRFmR5UJ+qxEsTqhgUCpTiN2N/aVHoulgsCvZO83g1XgvKpapwiLOuHHaD0WQXqXBzUh4verP0Zpn0QJE3fLwvqwF/R0qv5iTHs5mXIWZFSzZB5xJTs0hq96fn+/gZY1MSL+1ARLMqRtWf+N5paunOQLZuW04QqT0JfZArBhuAg/By7eymT9JAYtEdjIR7SiekRsjNIbs3jre9lvxFoc24lNUrWY38jgvbL0NFamhyZOtgqWRCR7Xb3iPTd9f33Yw== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nvidia.com; Received: from LV8PR12MB9620.namprd12.prod.outlook.com (2603:10b6:408:2a1::19) by CY1PR12MB9627.namprd12.prod.outlook.com (2603:10b6:930:104::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9745.20; Thu, 26 Mar 2026 15:12:53 +0000 Received: from LV8PR12MB9620.namprd12.prod.outlook.com ([fe80::299d:f5e0:3550:1528]) by LV8PR12MB9620.namprd12.prod.outlook.com ([fe80::299d:f5e0:3550:1528%5]) with mapi id 15.20.9745.019; Thu, 26 Mar 2026 15:12:53 +0000 From: Andrea Righi To: Ingo Molnar , Peter Zijlstra , Juri Lelli , Vincent Guittot Cc: Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , Christian Loehle , Koba Ko , Felix Abecassis , Balbir Singh , linux-kernel@vger.kernel.org Subject: [PATCH 4/4] sched/fair: Prefer fully-idle SMT core for NOHZ idle load balancer Date: Thu, 26 Mar 2026 16:02:37 +0100 Message-ID: <20260326151211.1862600-5-arighi@nvidia.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260326151211.1862600-1-arighi@nvidia.com> References: <20260326151211.1862600-1-arighi@nvidia.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: ZR2P278CA0012.CHEP278.PROD.OUTLOOK.COM (2603:10a6:910:50::15) To LV8PR12MB9620.namprd12.prod.outlook.com (2603:10b6:408:2a1::19) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV8PR12MB9620:EE_|CY1PR12MB9627:EE_ X-MS-Office365-Filtering-Correlation-Id: 7fe890a5-bef2-4282-dbdb-08de8b4a26be X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014|7416014|56012099003|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: yz8jSoGtMhV+szIOias0ZFg665kAhgIdXWK1PSPUCLuFDcGuAd16qIMMLXiFeS4KwdkSi96jQk9bM1BgNbte3PGfMSjREJuXfY/4f9c5Ick6hyb48PieSuRpOy9n2rHr+OFnHj7psM3dSAdBaWQ3nCNjHRGGc5gIdBBE/x/eIryi6LRkEuyBCkWyLk4Y8k8LXNgyvd32Zr9D5UuzRffsSDFBPwdd0PyI/Eaxeo+AhQHSDZZgM938ecco481xxpzpEg3gsz4WHUtmGLrxlRLj/GhiOq88TN5/bDZG2pA7ta1VFmHem8WZk0x8ZdbmWyecBJwqcllkAI3Ycd7QpvtLFihXya0Kxbl1UlCRDeyY2ce2MjIS+RNOXjHd72hwkSY/WXRQtN4A2XYC7jim011NVUfay0uOkHZFuKgmNVkc5SjUPOmT4d02iXEIi9GDZY2fJahnXRdEnxuIRWiUZLOWQvHQPLk7YrKat6PdBERUWYcsnnnbgpYzDVc4F4yQWMQQ5JkSj0AQyrbrUKLr4oI3c2G6r7yJE9qcuKtm4ue/iGIm5OchcNpKhSz4bBAn5R1MTGCSuH9+v+lwX9LOvlP/cC4EdpNaOa1TYpwqOHT6SHwexlFRXat2On9/0ZKHaN6UQQFQEfFhyzILmhW8ruwukdv97K2x1WFQ1LG47CnY7J1wyMDOQUAUsMLI2xn7JeaQG9nCr3HQC9+yghlrHwjqEUcQh9CMVvZvMcrjEZaUgjw= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:LV8PR12MB9620.namprd12.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(1800799024)(376014)(7416014)(56012099003)(22082099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?IusCtYOdrxA5E1rH/g/h97jJ0JeMVpXCv7raf8hPzrseLRByEA5kwuEc36/t?= =?us-ascii?Q?ZtYOJw1ElFMYumWe7NADHacdPS8OShtO5l8P+lY27Y9E991taargPsvkTGDY?= =?us-ascii?Q?df15koDHzBwIEAWwOttUsqSjXzPrHPFuLJJbk0z2wojA8M8+8yzHfKHjZ2nY?= =?us-ascii?Q?vXN1HgkwXPGWNLU1uoi4Y4cnIyARV5COpji/zrBQB6bJDHHxEfxyQqs0TY6U?= =?us-ascii?Q?zH949uGJCRJDhKXoiI2RuICPpg0crxNiBItbIy/1GP/AH5QK0aRD14tiMhGB?= =?us-ascii?Q?LPcNjDbmZtuux4AhLYKfTPfPH4Bnh+Z/gHfQ3j+ShJ23FEyGEuzE3dHZeq1Q?= =?us-ascii?Q?o5TNCtjYXT/z8fZEHoJ/6oL8jf/yY+QcujBeSQtI/hbFDqK6boZIcbAF+vFM?= =?us-ascii?Q?vNM3FaXkBWVopx5oWyrso/BAuLN8JQVDhGOwwTtMTD5+JZdKlqU3Sw/Bzzu7?= =?us-ascii?Q?+hnPh6Z4bNSreEYP+JfeyiqgW9VcV9W2nAiOwtk4HKl9x2xJ2mM1THX8foWp?= =?us-ascii?Q?xRRTzXT4hbPB3O842RmdcEIYM6Tg5Wl0+ovIc7n6+AY6XPU+NW5oWw7STMZH?= =?us-ascii?Q?vy3IQxktyxtpGTipF7PA4SCOBephMrzl0LtFfTLIYxwh0U9HX/RemTzAqAEX?= =?us-ascii?Q?tS+PquwXvpQTeADUcpGtShkETlRdDjMq2fLMo/CZUKgrrbmb+NrgpJ6tjsel?= =?us-ascii?Q?M9g4FmKopUDG6ljMyAf3H9QdqmkU7BMUQ/GBP7KYEAnFFTx7woQBwVvQrdao?= =?us-ascii?Q?tDujlDrKXu8Kc4Ew8ZhM8NxPNKfj0ldJQM//DJ4iZMsbuvQsyennNK6N7B6g?= =?us-ascii?Q?Asy/8yGogtyt0hSgRonF01cJ0gIhYm6LALQdm8vVbIsc/z2obMR5Fr+cczz4?= =?us-ascii?Q?G8DBOW7zdXC4NJCySvYMnfhaXxYhi8JHsqO7uxsjPiTD3JABklIQUAH5M46b?= =?us-ascii?Q?Jg+PCDS0+Uek+TEv2vzslkDnR2duF0G/6p6xLXYRNQALs2ypBjXLfql9tLFx?= =?us-ascii?Q?BjRMIsH6LjjDK0jqIIReWc/Ths1Z0mLcvAt9fCPRKC21t+csD9eJTNP3af6m?= =?us-ascii?Q?SpzHKA0nNcqBqOgl0qVAf60fwpEn14TzwAQ/YvlA0p2z8xilMsT7VYSK18hz?= =?us-ascii?Q?TF+M7CazskOqubTksqHJr7Vve0vtXdR5UdGZ9M0Wjfck7v6JSeL0r2zyZO3f?= =?us-ascii?Q?HnjcmO/Fg0994+jPjVaJn3LRVGMqaNQBaiYJlk7K0Q9ic3/BzdJ20afP57RN?= =?us-ascii?Q?uXGVHpk9P443RIKX4YfFnwjYBTT6ItoACIYthE+B5CdPWUe0FJW8dXTy4LCE?= =?us-ascii?Q?q72ZaoX9zOx1FkLs37W2raLPTLTxkvy9wa8E0n5SrhaGqt2+8EoqgO3C19B6?= =?us-ascii?Q?h1RY6lm9DjQl5kDEujSXzDKOcv7t4qvettqH+Ulbh5N3yVkfKAt8qZompjgf?= =?us-ascii?Q?gtgfxfSlv6Sz5dUO0K59Cq7fZ8bvGiO+JL30IU8vzDA+ZvSPy/168VYhazbr?= =?us-ascii?Q?5AJ5uUQb853tVCWhESpFO+GfTeNZB1pm7NpVBIKi8uPvMOykloxLCiUp7hB5?= =?us-ascii?Q?qOWlxvWoRboX/n+Ai3Hpt3e6QQNns1s4efz3QOIYDKw1EtoIZgjEQRrWLqMW?= =?us-ascii?Q?vAdZzxtVB+wfQuCUrdbzfBMYCQqqtlWjnuHiWJKL8aYD5RkmDKHo46PmTQi8?= =?us-ascii?Q?qYk/XtBGdA+5CIHB1rMo749WIN3Nk5a5ZJuQfBqKbmFXA7UdikYX70gzyjMQ?= =?us-ascii?Q?/3VakU26qA=3D=3D?= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7fe890a5-bef2-4282-dbdb-08de8b4a26be X-MS-Exchange-CrossTenant-AuthSource: LV8PR12MB9620.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Mar 2026 15:12:53.0165 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: eP4WocuM5vVCYhCB56iijn1H63orcyIFJ5w4t6DQ6I0klWYnn+8VkyAZlJuwzEWmOpaRkWTqLhJmJpG0+1P42A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR12MB9627 Content-Type: text/plain; charset="utf-8" When choosing which idle housekeeping CPU runs the idle load balancer, prefer one on a fully idle core if SMT is active, so balance can migrate work onto a CPU that still offers full effective capacity. Fall back to any idle candidate if none qualify. Cc: Vincent Guittot Cc: Dietmar Eggemann Cc: Christian Loehle Cc: Koba Ko Reported-by: Felix Abecassis Signed-off-by: Andrea Righi --- kernel/sched/fair.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c index 593a89f688679..a1ee21f7b32f6 100644 --- a/kernel/sched/fair.c +++ b/kernel/sched/fair.c @@ -12733,11 +12733,15 @@ static inline int on_null_domain(struct rq *rq) * - When one of the busy CPUs notices that there may be an idle rebalanci= ng * needed, they will kick the idle load balancer, which then does idle * load balancing for all the idle CPUs. + * + * - When SMT is active, prefer a CPU on a fully idle core as the ILB + * target, so that when it runs balance it becomes the destination CPU + * and can accept migrated tasks with full effective capacity. */ static inline int find_new_ilb(void) { const struct cpumask *hk_mask; - int ilb_cpu; + int ilb_cpu, fallback =3D -1; =20 hk_mask =3D housekeeping_cpumask(HK_TYPE_KERNEL_NOISE); =20 @@ -12746,11 +12750,22 @@ static inline int find_new_ilb(void) if (ilb_cpu =3D=3D smp_processor_id()) continue; =20 +#ifdef CONFIG_SCHED_SMT + if (!idle_cpu(ilb_cpu)) + continue; + + if (fallback < 0) + fallback =3D ilb_cpu; + + if (!sched_smt_active() || is_core_idle(ilb_cpu)) + return ilb_cpu; +#else if (idle_cpu(ilb_cpu)) return ilb_cpu; +#endif } =20 - return -1; + return fallback; } =20 /* --=20 2.53.0