From nobody Thu Apr 2 22:24:24 2026 Received: from www537.your-server.de (www537.your-server.de [188.40.3.216]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3A10B2BE641; Thu, 26 Mar 2026 13:03:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=188.40.3.216 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774530190; cv=none; b=MbEvE5hWOHN2AWspHIpXGv62BySJyMOgpi2gIh5QULPGlJ5SjUyp/JDJBHMCOyXurZ39GZc0nHQw32qu73neRHpW9fdPvMpvGn+2yVv5pdr5Vb1U6dv6t6sPzdwZ7Bqpj9QqYZJSSr/J02jaL8hwXKexQxdWDT2Z4rjr4w2iqic= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774530190; c=relaxed/simple; bh=oSOUR8TPxuD/ElPS+/dfeOAbwyi5r34433c4oa9bGcY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ue/k7nuYoWTkJMZYj200zyXEMLsmVqZSQ1IwOB1QpIgjg4lnix936jKVlBItvMmM9GPRJl8STZN0RkoTjDFVSMzcQ1l0v2HjaaB0Qoxc05aKoe0qhqgR1SKjg3w6aIVgeXz/f6vaYGrhTp2eYgolux27o0ygtnsVFJvwMXIxV1k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ew.tq-group.com; spf=pass smtp.mailfrom=ew.tq-group.com; dkim=pass (2048-bit key) header.d=ew.tq-group.com header.i=@ew.tq-group.com header.b=pRHHXT9R; arc=none smtp.client-ip=188.40.3.216 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ew.tq-group.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ew.tq-group.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ew.tq-group.com header.i=@ew.tq-group.com header.b="pRHHXT9R" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=ew.tq-group.com; s=default2602; h=Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID; bh=MK4q1k/Sv2tScGTDH98afQQfCpOfA19Nvh1Hj5gVd+o=; b=pRHHXT9RhGTC/PQ4qDGmZKAjq8 5DyfhdGOiHh7KIr/jm4zal2UWGr7lZFM3HMnLCDrVlWBNxJ3QUKDDhgUIFa05qq0VPybFwyE802XH 1ndHHPzizBliRzIYa1oQXnvJUUWnahJZYXZDEU4ms8Y25QVoskVqE+AYwfvvmRDmFoYb51n7OqQIe eiiRpRFoHWyhce4k0QCfvWOnNumUNX8JxGMQdErSEqpa9GJ+8GNrguvjO3rDFLwWmeETpGNKn+zi8 j4r0w3Jaa3ovRzdgw5+2gJe6gw0UVU7xa6Dj4+9BCZxXN+zAXL0NgXCMeROAHicFVRSOKFPzfhxFg z+OOTQzQ==; Received: from sslproxy06.your-server.de ([78.46.172.3]) by www537.your-server.de with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.96.2) (envelope-from ) id 1w5kMd-0009n1-0K; Thu, 26 Mar 2026 14:03:07 +0100 Received: from localhost ([127.0.0.1]) by sslproxy06.your-server.de with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1w5kM5-000ByX-16; Thu, 26 Mar 2026 14:03:06 +0100 From: Alexander Stein To: Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm Cc: Alexander Stein , imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux@ew.tq-group.com, linux-renesas-soc@vger.kernel.org Subject: [PATCH v4 2/2] arm64: dts: imx8qm-tqma8qm-mba8x: Disable Cortex-A72 cluster Date: Thu, 26 Mar 2026 14:02:22 +0100 Message-ID: <20260326130225.1406806-3-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260326130225.1406806-1-alexander.stein@ew.tq-group.com> References: <20260326130225.1406806-1-alexander.stein@ew.tq-group.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Virus-Scanned: Clear (ClamAV 1.4.3/27952/Thu Mar 26 07:24:52 2026) Content-Type: text/plain; charset="utf-8" Due to missing workaround for "ERR050104: Arm/A53: Cache coherency issue" disable the whole Cortex-A72 cluster. Signed-off-by: Alexander Stein --- Changes in v4: * None .../dts/freescale/imx8qm-tqma8qm-mba8x.dts | 39 ------------------- .../boot/dts/freescale/imx8qm-tqma8qm.dtsi | 13 +++++-- 2 files changed, 10 insertions(+), 42 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8qm-tqma8qm-mba8x.dts b/arch/= arm64/boot/dts/freescale/imx8qm-tqma8qm-mba8x.dts index bf972010a88e7..ab3b244b684fd 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-tqma8qm-mba8x.dts +++ b/arch/arm64/boot/dts/freescale/imx8qm-tqma8qm-mba8x.dts @@ -298,45 +298,6 @@ map3 { }; }; }; - - cpu1-thermal { - trips { - soc_active1_0: trip-active0 { - temperature =3D <40000>; - hysteresis =3D <5000>; - type =3D "active"; - }; - - soc_active1_1: trip-active1 { - temperature =3D <48000>; - hysteresis =3D <3000>; - type =3D "active"; - }; - - soc_active1_2: trip-active2 { - temperature =3D <60000>; - hysteresis =3D <10000>; - type =3D "active"; - }; - }; - - cooling-maps { - map1 { - trip =3D <&soc_active1_0>; - cooling-device =3D <&fan0 1 1>; - }; - - map2 { - trip =3D <&soc_active1_1>; - cooling-device =3D <&fan0 2 2>; - }; - - map3 { - trip =3D <&soc_active1_2>; - cooling-device =3D <&fan0 3 3>; - }; - }; - }; }; }; =20 diff --git a/arch/arm64/boot/dts/freescale/imx8qm-tqma8qm.dtsi b/arch/arm64= /boot/dts/freescale/imx8qm-tqma8qm.dtsi index d94605c999915..f0e398eb2aad7 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-tqma8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm-tqma8qm.dtsi @@ -15,6 +15,13 @@ / { model =3D "TQ-Systems i.MX8QM TQMa8QM"; compatible =3D "tq,imx8qm-tqma8qm", "fsl,imx8qm"; =20 + /* Due to missing workaround for ERR050104 */ + cpus { + /delete-node/ cpu-map; + /delete-node/ cpu@100; + /delete-node/ cpu@101; + }; + memory@80000000 { device_type =3D "memory"; /* @@ -174,6 +181,8 @@ &mu2_m0 { }; =20 &thermal_zones { + /delete-node/ cpu1-thermal; + pmic0-thermal { polling-delay-passive =3D <250>; polling-delay =3D <2000>; @@ -199,9 +208,7 @@ map0 { <&A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&A53_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&A53_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&A72_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&A72_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + <&A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; --=20 2.43.0