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Thu, 26 Mar 2026 02:06:53 -0700 (PDT) Received: from DC6WP-EXCH02.marvell.com (10.76.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.25; Thu, 26 Mar 2026 02:06:52 -0700 Received: from DC6WP-EXCH02.marvell.com (10.76.176.209) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.25; Thu, 26 Mar 2026 02:06:52 -0700 Received: from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server id 15.2.1544.25 via Frontend Transport; Thu, 26 Mar 2026 02:06:52 -0700 Received: from hyd1soter3.marvell.com (unknown [10.29.37.12]) by maili.marvell.com (Postfix) with ESMTP id 995BD3F7041; Thu, 26 Mar 2026 02:06:49 -0700 (PDT) From: Geetha sowjanya To: , , , CC: , , Subject: [PATCH 1/2] dt-bindings: perf: marvell: Document CN20K DDR PMU Date: Thu, 26 Mar 2026 14:36:44 +0530 Message-ID: <20260326090645.22590-2-gakula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20260326090645.22590-1-gakula@marvell.com> References: <20260326090645.22590-1-gakula@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI2MDA2NiBTYWx0ZWRfX/J5Arq7S4bjC zQadQ6PFaV0w2/oFsNfaidkz+iO+2cu5Hi9YgIUeVHXLVR4qhx6vFlCwVYoDq6wkufZU2N/qT61 zoBL6eWy9IbAwL9OJn0fQWPPKTf/88z7ev3fwJdXTdQedyQXpx9lWCpZu/eYdVo/3z99S0bkeIg xXHTOAE/0BF0c1p+/UvQy5pacMXAl1lmIQ1FESU6js04bYI/MaVBpagdw2nqhgZmRSQx/j450Tr v0Vcno+IS7rFhHfpiwsaS8vw4clrt0Z/kGaQV6HNHJdTL4csFopMXee58ze6jqU5S++OobTU+/Y HBKNgfEKn7g8oJIPjTNQbvLaWZ6OJmS95keEWveK9pS6MRNTastgNXWEOU4nrKq3cHmyS4ZbWOp fEHeHc2NHl9g9GA2Qu5ff6ju2O+L2N1UV1f97J+HMHc/pJ3RKaAaNjCFqW441pEIusH8miSgpvM vBh8Wcj0HDsAEJHw6IA== X-Authority-Analysis: v=2.4 cv=LsifC3dc c=1 sm=1 tr=0 ts=69c4f72d cx=c_pps a=rEv8fa4AjpPjGxpoe8rlIQ==:117 a=rEv8fa4AjpPjGxpoe8rlIQ==:17 a=Yq5XynenixoA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=EAYMVhzMl8SCOHhVQcBL:22 a=gEfo2CItAAAA:8 a=M5GUcnROAAAA:8 a=4RHyKZYBQQhKSXLDbdEA:9 a=sptkURWiP4Gy88Gu7hUp:22 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-ORIG-GUID: 0st2OJMtM2llfiW5VdOFHYLxAIjmqY_r X-Proofpoint-GUID: 0st2OJMtM2llfiW5VdOFHYLxAIjmqY_r X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-26_02,2026-03-24_01,2025-10-01_01 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a devicetree binding for the Marvell CN20K DDR performance monitor block, including the marvell,cn20k-ddr-pmu compatible string and the required MMIO reg region. Signed-off-by: Geetha sowjanya --- .../bindings/perf/marvell-cn20k-ddr.yaml | 37 +++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/perf/marvell-cn20k-dd= r.yaml diff --git a/Documentation/devicetree/bindings/perf/marvell-cn20k-ddr.yaml = b/Documentation/devicetree/bindings/perf/marvell-cn20k-ddr.yaml new file mode 100644 index 000000000000..6677d9eb4ba3 --- /dev/null +++ b/Documentation/devicetree/bindings/perf/marvell-cn20k-ddr.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/perf/marvell-cn20k-ddr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell CN20K DDR performance monitor + +maintainers: + - Geetha sowjanya + +properties: + compatible: + items: + - enum: + - marvell,cn20k-ddr-pmu + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + bus { + #address-cells =3D <2>; + #size-cells =3D <2>; + + ddrcpmu { + compatible =3D "marvell,cn20k-ddr-pmu"; + reg =3D <0xc200 0x00000000 0x0 0x100000>; + }; + }; --=20 2.25.1