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Wed, 25 Mar 2026 18:46:35 -0700 (PDT) Received: from localhost ([2001:19f0:8001:1b2d:5400:5ff:fefa:a95d]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-35c1dd3800bsm569329a91.1.2026.03.25.18.46.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Mar 2026 18:46:34 -0700 (PDT) From: Inochi Amaoto To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Yixun Lan , Richard Cochran Cc: Inochi Amaoto , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Yixun Lan , Longbin Li Subject: [PATCH v6] riscv: dts: spacemit: Add ethernet device for K3 Date: Thu, 26 Mar 2026 09:46:17 +0800 Message-ID: <20260326014617.1011732-1-inochiama@gmail.com> X-Mailer: git-send-email 2.53.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add all ethernet device nodes for K3 SoC. Signed-off-by: Inochi Amaoto Reviewed-by: Yixun Lan --- Require the following patch series: 1. Basic DT device patch https://lore.kernel.org/spacemit/20260304-01-dts-uart-full-v1-0-50a0aa53a24= 5@kernel.org 2. Ethernet driver patch https://lore.kernel.org/spacemit/20260316010041.164360-1-inochiama@gmail.com Changed from v5: 1. Fix DT warning cause by stmmac-axi-config. Changed from v4: 1. Fix pinctrl pin name 2. Remove alias for disabled node Changed from v3: 1. Separate the pin as RGMII pin and INT pin. 2. Add comment for pin usage. 3. Rename the ethernet pinctrl node to address it is RGMII node. Changed from v2: 1. keep aliases in alphabetical order. Changed from v1: 1. remove interrupt-parents property 2. add aliases for ethernet node --- arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 20 ++++ arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi | 34 ++++++ arch/riscv/boot/dts/spacemit/k3.dtsi | 117 +++++++++++++++++++ 3 files changed, 171 insertions(+) diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot= /dts/spacemit/k3-pico-itx.dts index b098dbd0e7a1..504fe6bd46b2 100644 --- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts +++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts @@ -3,6 +3,7 @@ * Copyright (c) 2026 SpacemiT (Hangzhou) Technology Co. Ltd * Copyright (c) 2026 Guodong Xu */ +#include #include "k3.dtsi" #include "k3-pinctrl.dtsi" @@ -12,6 +13,7 @@ / { compatible =3D "spacemit,k3-pico-itx", "spacemit,k3"; aliases { + ethernet0 =3D ð0; serial0 =3D &uart0; }; @@ -25,6 +27,24 @@ memory@100000000 { }; }; +ð0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gmac0_rgmii_0_cfg>, <&gmac0_phy_0_cfg>; + phy-mode =3D "rgmii-id"; + phy-handle =3D <&phy0>; + status =3D "okay"; + + mdio { + phy0: phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <1>; + reset-gpios =3D <&gpio 0 15 GPIO_ACTIVE_LOW>; + reset-assert-us =3D <10000>; + reset-deassert-us =3D <10000>; + }; + }; +}; + &uart0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&uart0_0_cfg>; diff --git a/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi b/arch/riscv/boot= /dts/spacemit/k3-pinctrl.dtsi index efb0f1572188..a7b5d10c332e 100644 --- a/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi +++ b/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi @@ -11,6 +11,40 @@ #define K3_GPIO(x) (x / 32) (x % 32) &pinctrl { + gmac0_rgmii_0_cfg: gmac0-rgmii-0-cfg { + gmac0-rgmii-0-pins { + pinmux =3D , /* gmac0_rxdv */ + , /* gmac0_rx_d0 */ + , /* gmac0_rx_d1 */ + , /* gmac0_rx_clk */ + , /* gmac0_rx_d2 */ + , /* gmac0_rx_d3 */ + , /* gmac0_tx_d0 */ + , /* gmac0_tx_d1 */ + , /* gmac0_tx_clk */ + , /* gmac0_tx_d2 */ + , /* gmac0_tx_d3 */ + , /* gmac0_tx_en */ + , /* gmac0_mdc */ + ; /* gmac0_mdio */ + + bias-disable; + drive-strength =3D <25>; + power-source =3D <1800>; + }; + + }; + + gmac0_phy_0_cfg: gmac0-phy-0-cfg { + gmac0-phy-0-pins { + pinmux =3D ; /* gmac0_int */ + + bias-disable; + drive-strength =3D <25>; + power-source =3D <1800>; + }; + }; + /omit-if-no-ref/ uart0_0_cfg: uart0-0-cfg { uart0-0-pins { diff --git a/arch/riscv/boot/dts/spacemit/k3.dtsi b/arch/riscv/boot/dts/spa= cemit/k3.dtsi index a3a8ceddabec..5f4818cd5d6d 100644 --- a/arch/riscv/boot/dts/spacemit/k3.dtsi +++ b/arch/riscv/boot/dts/spacemit/k3.dtsi @@ -438,6 +438,123 @@ soc: soc { dma-noncoherent; ranges; + eth0: ethernet@cac80000 { + compatible =3D "spacemit,k3-dwmac", "snps,dwmac-5.40a"; + reg =3D <0x0 0xcac80000 0x0 0x2000>; + clocks =3D <&syscon_apmu CLK_APMU_EMAC0_BUS>, + <&syscon_apmu CLK_APMU_EMAC0_1588>, + <&syscon_apmu CLK_APMU_EMAC0_RGMII_TX>; + clock-names =3D "stmmaceth", "ptp_ref", "tx"; + interrupts =3D <131 IRQ_TYPE_LEVEL_HIGH>, + <276 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names =3D "macirq", "eth_wake_irq"; + resets =3D <&syscon_apmu RESET_APMU_EMAC0>; + reset-names =3D "stmmaceth"; + rx-fifo-depth =3D <8192>; + tx-fifo-depth =3D <8192>; + snps,multicast-filter-bins =3D <64>; + snps,perfect-filter-entries =3D <32>; + snps,aal; + snps,tso; + snps,txpbl =3D <8>; + snps,rxpbl =3D <8>; + snps,force_sf_dma_mode; + snps,axi-config =3D <&gmac0_axi_setup>; + spacemit,apmu =3D <&syscon_apmu 0x3e4 0x3e8>; + status =3D "disabled"; + + mdio { + compatible =3D "snps,dwmac-mdio"; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + gmac0_axi_setup: stmmac-axi-config { + snps,wr_osr_lmt =3D <0xf>; + snps,rd_osr_lmt =3D <0xf>; + /* max axi burst len is 256 */ + snps,blen =3D <256 128 64 32 16 0 0>; + }; + }; + + eth1: ethernet@cac82000 { + compatible =3D "spacemit,k3-dwmac", "snps,dwmac-5.40a"; + reg =3D <0x0 0xcac82000 0x0 0x2000>; + clocks =3D <&syscon_apmu CLK_APMU_EMAC1_BUS>, + <&syscon_apmu CLK_APMU_EMAC1_1588>, + <&syscon_apmu CLK_APMU_EMAC1_RGMII_TX>; + clock-names =3D "stmmaceth", "ptp_ref", "tx"; + interrupts =3D <133 IRQ_TYPE_LEVEL_HIGH>, + <277 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names =3D "macirq", "eth_wake_irq"; + resets =3D <&syscon_apmu RESET_APMU_EMAC1>; + reset-names =3D "stmmaceth"; + rx-fifo-depth =3D <8192>; + tx-fifo-depth =3D <8192>; + snps,multicast-filter-bins =3D <64>; + snps,perfect-filter-entries =3D <32>; + snps,aal; + snps,tso; + snps,txpbl =3D <8>; + snps,rxpbl =3D <8>; + snps,force_sf_dma_mode; + snps,axi-config =3D <&gmac1_axi_setup>; + spacemit,apmu =3D <&syscon_apmu 0x3ec 0x3f0>; + status =3D "disabled"; + + mdio { + compatible =3D "snps,dwmac-mdio"; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + gmac1_axi_setup: stmmac-axi-config { + snps,wr_osr_lmt =3D <0xf>; + snps,rd_osr_lmt =3D <0xf>; + /* max axi burst len is 256 */ + snps,blen =3D <256 128 64 32 16 0 0>; + }; + }; + + eth2: ethernet@cac8e000 { + compatible =3D "spacemit,k3-dwmac", "snps,dwmac-5.40a"; + reg =3D <0x0 0xcac8e000 0x0 0x2000>; + clocks =3D <&syscon_apmu CLK_APMU_EMAC2_BUS>, + <&syscon_apmu CLK_APMU_EMAC2_1588>, + <&syscon_apmu CLK_APMU_EMAC2_RGMII_TX>; + clock-names =3D "stmmaceth", "ptp_ref", "tx"; + interrupts =3D <130 IRQ_TYPE_LEVEL_HIGH>, + <278 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names =3D "macirq", "eth_wake_irq"; + resets =3D <&syscon_apmu RESET_APMU_EMAC2>; + reset-names =3D "stmmaceth"; + rx-fifo-depth =3D <4096>; + tx-fifo-depth =3D <4096>; + snps,multicast-filter-bins =3D <64>; + snps,perfect-filter-entries =3D <32>; + snps,aal; + snps,tso; + snps,txpbl =3D <8>; + snps,rxpbl =3D <8>; + snps,force_sf_dma_mode; + snps,axi-config =3D <&gmac2_axi_setup>; + spacemit,apmu =3D <&syscon_apmu 0x248 0x24c>; + status =3D "disabled"; + + mdio { + compatible =3D "snps,dwmac-mdio"; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + gmac2_axi_setup: stmmac-axi-config { + snps,wr_osr_lmt =3D <0xf>; + snps,rd_osr_lmt =3D <0xf>; + /* max axi burst len is 256 */ + snps,blen =3D <256 128 64 32 16 0 0>; + }; + }; + syscon_apbc: system-controller@d4015000 { compatible =3D "spacemit,k3-syscon-apbc"; reg =3D <0x0 0xd4015000 0x0 0x1000>; -- 2.53.0