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charset="utf-8" Replace per-chipset match arms with Architecture-based matching in the falcon and FB HAL selection functions. This reduces the number of match arms that need updating when new chipsets are added within an existing architecture. Signed-off-by: John Hubbard --- drivers/gpu/nova-core/falcon/hal.rs | 22 ++++++++++++++-------- drivers/gpu/nova-core/fb/hal.rs | 20 ++++++++++++-------- drivers/gpu/nova-core/firmware/gsp.rs | 22 +++++++++++----------- 3 files changed, 37 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/nova-core/falcon/hal.rs b/drivers/gpu/nova-core/fa= lcon/hal.rs index c7f12f2a7a35..15010f81946e 100644 --- a/drivers/gpu/nova-core/falcon/hal.rs +++ b/drivers/gpu/nova-core/falcon/hal.rs @@ -9,7 +9,10 @@ FalconBromParams, FalconEngine, // }, - gpu::Chipset, + gpu::{ + Architecture, + Chipset, // + }, }; =20 mod ga102; @@ -74,17 +77,20 @@ fn signature_reg_fuse_version( pub(super) fn falcon_hal( chipset: Chipset, ) -> Result>> { - use Chipset::*; - - let hal =3D match chipset { - TU102 | TU104 | TU106 | TU116 | TU117 =3D> { + let hal =3D match chipset.arch() { + Architecture::Turing =3D> { KBox::new(tu102::Tu102::::new(), GFP_KERNEL)? as KBox> } - GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD= 106 | AD107 | GH100 - | GB100 | GB102 | GB202 | GB203 | GB205 | GB206 | GB207 =3D> { + // TODO: support GA100. Its boot sequence is a lot like Turing, ex= cept that it handles the + // FRTS steps differently (specifically, it skips FWSEC-FRTS). + Architecture::Ampere if chipset =3D=3D Chipset::GA100 =3D> return = Err(ENOTSUPP), + Architecture::Ampere + | Architecture::Hopper + | Architecture::Ada + | Architecture::BlackwellGB10x + | Architecture::BlackwellGB20x =3D> { KBox::new(ga102::Ga102::::new(), GFP_KERNEL)? as KBox> } - _ =3D> return Err(ENOTSUPP), }; =20 Ok(hal) diff --git a/drivers/gpu/nova-core/fb/hal.rs b/drivers/gpu/nova-core/fb/hal= .rs index e709affaa7e8..3b3bad0feed0 100644 --- a/drivers/gpu/nova-core/fb/hal.rs +++ b/drivers/gpu/nova-core/fb/hal.rs @@ -4,7 +4,10 @@ =20 use crate::{ driver::Bar0, - gpu::Chipset, // + gpu::{ + Architecture, + Chipset, // + }, }; =20 mod ga100; @@ -29,12 +32,13 @@ pub(crate) trait FbHal { =20 /// Returns the HAL corresponding to `chipset`. pub(super) fn fb_hal(chipset: Chipset) -> &'static dyn FbHal { - use Chipset::*; - - match chipset { - TU102 | TU104 | TU106 | TU117 | TU116 =3D> tu102::TU102_HAL, - GA100 =3D> ga100::GA100_HAL, - GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD= 106 | AD107 | GH100 - | GB100 | GB102 | GB202 | GB203 | GB205 | GB206 | GB207 =3D> ga102= ::GA102_HAL, + match chipset.arch() { + Architecture::Turing =3D> tu102::TU102_HAL, + Architecture::Ampere if chipset =3D=3D Chipset::GA100 =3D> ga100::= GA100_HAL, + Architecture::Ampere =3D> ga102::GA102_HAL, + Architecture::Ada + | Architecture::Hopper + | Architecture::BlackwellGB10x + | Architecture::BlackwellGB20x =3D> ga102::GA102_HAL, } } diff --git a/drivers/gpu/nova-core/firmware/gsp.rs b/drivers/gpu/nova-core/= firmware/gsp.rs index 60ea730d1bd5..fc32b6143cfd 100644 --- a/drivers/gpu/nova-core/firmware/gsp.rs +++ b/drivers/gpu/nova-core/firmware/gsp.rs @@ -146,19 +146,19 @@ pub(crate) struct GspFirmware { } =20 impl GspFirmware { - fn find_gsp_sigs_section(chipset: Chipset) -> Option<&'static str> { + fn find_gsp_sigs_section(chipset: Chipset) -> &'static str { match chipset.arch() { Architecture::Turing if matches!(chipset, Chipset::TU116 | Chi= pset::TU117) =3D> { - Some(".fwsignature_tu11x") + ".fwsignature_tu11x" } - Architecture::Turing =3D> Some(".fwsignature_tu10x"), - // GA100 uses the same firmware as Turing - Architecture::Ampere if chipset =3D=3D Chipset::GA100 =3D> Som= e(".fwsignature_tu10x"), - Architecture::Ampere =3D> Some(".fwsignature_ga10x"), - Architecture::Ada =3D> Some(".fwsignature_ad10x"), - Architecture::Hopper =3D> Some(".fwsignature_gh10x"), - Architecture::BlackwellGB10x =3D> Some(".fwsignature_gb10x"), - Architecture::BlackwellGB20x =3D> Some(".fwsignature_gb20x"), + Architecture::Turing =3D> ".fwsignature_tu10x", + // GA100 uses the same firmware as Turing. + Architecture::Ampere if chipset =3D=3D Chipset::GA100 =3D> ".f= wsignature_tu10x", + Architecture::Ampere =3D> ".fwsignature_ga10x", + Architecture::Ada =3D> ".fwsignature_ad10x", + Architecture::Hopper =3D> ".fwsignature_gh10x", + Architecture::BlackwellGB10x =3D> ".fwsignature_gb10x", + Architecture::BlackwellGB20x =3D> ".fwsignature_gb20x", } } =20 @@ -227,7 +227,7 @@ pub(crate) fn new<'a>( }, size, signatures: { - let sigs_section =3D Self::find_gsp_sigs_section(chips= et).ok_or(ENOTSUPP)?; + let sigs_section =3D Self::find_gsp_sigs_section(chips= et); =20 elf::elf64_section(firmware.data(), sigs_section) .ok_or(EINVAL) --=20 2.53.0