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Thu, 26 Mar 2026 03:27:12 -0700 (PDT) From: Bryan O'Donoghue Date: Thu, 26 Mar 2026 10:27:39 +0000 Subject: [PATCH v3 02/11] arm64: dts: qcom: x1e80100: Add CCI definitions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260326-x1e-camss-csi2-phy-dtsi-v3-2-1d5a9306116a@linaro.org> References: <20260326-x1e-camss-csi2-phy-dtsi-v3-0-1d5a9306116a@linaro.org> In-Reply-To: <20260326-x1e-camss-csi2-phy-dtsi-v3-0-1d5a9306116a@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bryan O'Donoghue , Konrad Dybcio , Vladimir Zapolskiy X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=5073; i=bryan.odonoghue@linaro.org; h=from:subject:message-id; bh=89pCG9foB/aUmIOQftGcQVpa85kxE85oYki4tXopqsk=; b=owEBbQKS/ZANAwAKASJxO7Ohjcg6AcsmYgBpxQobYV9NK/v6H+KJyHfDspxQBnyumiDeKs2gX 3fgS6RSwjmJAjMEAAEKAB0WIQTmk/sqq6Nt4Rerb7QicTuzoY3IOgUCacUKGwAKCRAicTuzoY3I OvWVD/0c5U7qv6Th3DucPL9AP22qLyUSKR2ejuPwDB5awi6K3RL8b6Bl9TapTFpJNphc4c/uVgS hxaFIYIAkpY7Cm6OAqcAU0wlGqkRkusK5QN2Guv2DjOJpuzAo7Pqc2lQBIKdR5f3vLsHp4SzlXI zCDJvVhBEx/IgvF/03YBVXwRCObNYwjgt89yHGfhPkgPG6D8D8unP9/p+EEANav5SSbZE8Azp/R +KStdczQCq70rMc5dbFOdgOkNsT+xfJr8SblCgRo/x4Ahn8+DHsMVZUDGufGmA1pt2aCk9UB4LO 0+MehREKqZ2Qh82y2NZ71IQ3PGDwJUD3d8BmzA5EwHY9p0PHuY9ttR9sbravNcFE3Arn7/V+f5W 1V0mX/kXnsTGEayXuJG3NvdNH5tKdn5Nx5eU7Y7Gk1fmBwIEDqzGdCTFBH7hV+KFOmzsyaN6e9x wVP6/SLR9eQH5zfdKqMnSiDQNpmNBSH4YTBrYrY1X2IosVxTXZnZVW5d5TuAorzxdUWvvjbw+rn SDEvbUvHxBRydPcCOk7zfqTkOgp/qznJpEWG3fw4F4lD8SOoWNVKyf+iU52M9RSFabtKBlcJ9Rq 8LOf9AkbhmnSjAkqzBOn+OURww1KAidpCmty4XYWa9g1AwJUNqnXdeiyEm4zfGiPd1b0L6t0hqe RtCFZ28xRfjPe+A== X-Developer-Key: i=bryan.odonoghue@linaro.org; a=openpgp; fpr=E693FB2AABA36DE117AB6FB422713BB3A18DC83A Add in two CCI buses. One bus has two CCI bus master pinouts: cci_i2c_sda0 =3D gpio101 cci_i2c_scl0 =3D gpio102 cci_i2c_sda1 =3D gpio103 cci_i2c_scl1 =3D gpio104 The second bus has two CCI bus master pinouts: cci_i2c_sda2 =3D gpio105 cci_i2c_scl2 =3D gpio106 aon_cci_i2c_sda3 =3D gpio235 aon_cci_i2c_scl3 =3D gpio236 Reviewed-by: Konrad Dybcio Reviewed-by: Vladimir Zapolskiy Signed-off-by: Bryan O'Donoghue Reviewed-by: Abel Vesa --- arch/arm64/boot/dts/qcom/hamoa.dtsi | 150 ++++++++++++++++++++++++++++++++= ++++ 1 file changed, 150 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom= /hamoa.dtsi index 029ec012d0a94..38f9da6ad9ca5 100644 --- a/arch/arm64/boot/dts/qcom/hamoa.dtsi +++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi @@ -5465,6 +5465,84 @@ videocc: clock-controller@aaf0000 { #power-domain-cells =3D <1>; }; =20 + cci0: cci@ac15000 { + compatible =3D "qcom,x1e80100-cci", "qcom,msm8996-cci"; + reg =3D <0 0x0ac15000 0 0x1000>; + + interrupts =3D ; + + clocks =3D <&camcc CAM_CC_CAMNOC_AXI_RT_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CCI_0_CLK>; + clock-names =3D "camnoc_axi", + "cpas_ahb", + "cci"; + + power-domains =3D <&camcc CAM_CC_TITAN_TOP_GDSC>; + + pinctrl-0 =3D <&cci0_default>; + pinctrl-1 =3D <&cci0_sleep>; + pinctrl-names =3D "default", "sleep"; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + status =3D "disabled"; + + cci0_i2c0: i2c-bus@0 { + reg =3D <0>; + clock-frequency =3D <1000000>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + cci0_i2c1: i2c-bus@1 { + reg =3D <1>; + clock-frequency =3D <1000000>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + + cci1: cci@ac16000 { + compatible =3D "qcom,x1e80100-cci", "qcom,msm8996-cci"; + reg =3D <0 0x0ac16000 0 0x1000>; + + interrupts =3D ; + + clocks =3D <&camcc CAM_CC_CAMNOC_AXI_RT_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CCI_1_CLK>; + clock-names =3D "camnoc_axi", + "cpas_ahb", + "cci"; + + power-domains =3D <&camcc CAM_CC_TITAN_TOP_GDSC>; + + pinctrl-0 =3D <&cci1_default>; + pinctrl-1 =3D <&cci1_sleep>; + pinctrl-names =3D "default", "sleep"; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + status =3D "disabled"; + + cci1_i2c0: i2c-bus@0 { + reg =3D <0>; + clock-frequency =3D <1000000>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + cci1_i2c1: i2c-bus@1 { + reg =3D <1>; + clock-frequency =3D <1000000>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + camcc: clock-controller@ade0000 { compatible =3D "qcom,x1e80100-camcc"; reg =3D <0 0x0ade0000 0 0x20000>; @@ -6115,6 +6193,78 @@ tlmm: pinctrl@f100000 { gpio-ranges =3D <&tlmm 0 0 239>; wakeup-parent =3D <&pdc>; =20 + cci0_default: cci0-default-state { + cci0_i2c0_default: cci0-i2c0-default-pins { + /* cci_i2c_sda0, cci_i2c_scl0 */ + pins =3D "gpio101", "gpio102"; + function =3D "cci_i2c"; + drive-strength =3D <2>; + bias-pull-up; + }; + + cci0_i2c1_default: cci0-i2c1-default-pins { + /* cci_i2c_sda1, cci_i2c_scl1 */ + pins =3D "gpio103", "gpio104"; + function =3D "cci_i2c"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + cci0_sleep: cci0-sleep-state { + cci0_i2c0_sleep: cci0-i2c0-sleep-pins { + /* cci_i2c_sda0, cci_i2c_scl0 */ + pins =3D "gpio101", "gpio102"; + function =3D "cci_i2c"; + drive-strength =3D <2>; + bias-pull-down; + }; + + cci0_i2c1_sleep: cci0-i2c1-sleep-pins { + /* cci_i2c_sda1, cci_i2c_scl1 */ + pins =3D "gpio103", "gpio104"; + function =3D "cci_i2c"; + drive-strength =3D <2>; + bias-pull-down; + }; + }; + + cci1_default: cci1-default-state { + cci1_i2c0_default: cci1-i2c0-default-pins { + /* cci_i2c_sda2, cci_i2c_scl2 */ + pins =3D "gpio105", "gpio106"; + function =3D "cci_i2c"; + drive-strength =3D <2>; + bias-pull-up; + }; + + cci1_i2c1_default: cci1-i2c1-default-pins { + /* aon_cci_i2c_sda3, aon_cci_i2c_scl3 */ + pins =3D "gpio235", "gpio236"; + function =3D "aon_cci"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + cci1_sleep: cci1-sleep-state { + cci1_i2c0_sleep: cci1-i2c0-sleep-pins { + /* cci_i2c_sda2, cci_i2c_scl2 */ + pins =3D "gpio105", "gpio106"; + function =3D "cci_i2c"; + drive-strength =3D <2>; + bias-pull-down; + }; + + cci1_i2c1_sleep: cci1-i2c1-sleep-pins { + /* aon_cci_i2c_sda3, aon_cci_i2c_scl3 */ + pins =3D "gpio235", "gpio236"; + function =3D "aon_cci"; + drive-strength =3D <2>; + bias-pull-down; + }; + }; + edp0_hpd_default: edp0-hpd-default-state { pins =3D "gpio119"; function =3D "edp0_hot"; --=20 2.52.0