From nobody Thu Apr 2 22:00:10 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E2D823793A2 for ; Thu, 26 Mar 2026 13:12:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774530775; cv=none; b=QzybtNEbeWhtdfVRxScAZLx8U52yUW/fPTUlpTgmiquNEsoYyb4VnngcIgYhO/f4CDaKzlWGaGeqbwNHEvCvJU/qOmUqA9UHanhZSPt0O6H7d62LjSWWWOKLZDVd9xUeb+mppNI/oA+RAkZDRW4ae6ML30U0KPGlzRkolPEhe1w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774530775; c=relaxed/simple; bh=eaeDuhTwVtvOUYbWOU6Pi8XJP6K+PPcBl3PTwjkGBnM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Uyju9ZdOwAQ4h5IPnHnl2P4zAwxuRJjkOqwrjB+BzwuGzzRDxyHuoZhQ8DnedtW8Yet0IA3yJO8dGB6zp4n4ik6NOONkLIBP3b+47KqyvefBIgFj9dlXTil1aLJUf2J0jLm0ojryMaFuGlXFjkqQQuDRO8zoo07hFMWQb3buAWE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=bZeC6dvS; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="bZeC6dvS" Received: from [127.0.1.1] (91-158-153-178.elisa-laajakaista.fi [91.158.153.178]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id B84D2185B; Thu, 26 Mar 2026 14:11:20 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1774530681; bh=eaeDuhTwVtvOUYbWOU6Pi8XJP6K+PPcBl3PTwjkGBnM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=bZeC6dvSpBf7WYfA0U2JNVKccRUMwd7qlToQgCu6IM7FIELNCdPiKSW1bB+xqTBUh ErQCXIV9+dh2CjgLzSnawF+ZZfUptDCjwlrUQDLLV5uRgEAIwYHvdSUlknx4vrUr3E ORAM3MdPOOA1A3QzXa91pBNTUInjmgqJ5IG9Vmno= From: Tomi Valkeinen Date: Thu, 26 Mar 2026 15:12:17 +0200 Subject: [PATCH 7/8] drm/bridge: tc358762: Update comment about the number of lanes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260326-tc358762-fixes-v1-7-65f479227af5@ideasonboard.com> References: <20260326-tc358762-fixes-v1-0-65f479227af5@ideasonboard.com> In-Reply-To: <20260326-tc358762-fixes-v1-0-65f479227af5@ideasonboard.com> To: Marek Vasut , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Tomi Valkeinen X-Mailer: b4 0.15-dev-c25d1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1121; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=eaeDuhTwVtvOUYbWOU6Pi8XJP6K+PPcBl3PTwjkGBnM=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBpxTC/a5+FpltJDJIFQ/mz47j7GGXzPvheOeBjr BzZTwkNURWJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCacUwvwAKCRD6PaqMvJYe 9Xg2D/9INuMguMaxsYOmY8c4Q1FHDT8g/2FxDHQjQm5SjhfT0e89sbsOlr3TvyBLwB5wVo3jtGZ oQIGDqxTKCM1NRTscNKHgLlV3OW+EktwRgQAjZ/l7DTWThh8iJvxIP0HqkhMxhFPc7X/cmXZKEU HS+94+19Fnw9KQVX1aCqosAxd5+KLlrXQaKtqO3lvIK82hH0nwZ3hM/NbQBzeq4Mxv/CTKZa8Wa dxheopBr1/avKAlCfDf9WLMdsy9/rV5ItgcsyA4eHEGE2EEh1NMfr0hGWOrX9TvDYG4ADJMR4e1 GmsTRmySTb7aGUCBpMtnmD2915MfxjxFna5z176PpTzsGBijBhi2lR0JmMZW3FveVOaJu1ZPIfe EfjL5O5StwoW4s19U00RYKb6jrsZhsQxdWnqIHR0J2NoTHJuOIOZvKdfeKcoTEn8Qt2EJgHcqqv v5VFl+GLGCgGgtP+ngcWZyVWHUs9vNbO3jhho9uCgWGy+3UQkUr9Fx0jX/oUnQMYzgGlnZ9eNlG 5Y+DtTyKV5j9ettI7eB7///L7Zi85fHpU8T+gXnmg/48/MEbrvYsLqzjBZIiEq01ELkLsYt3pHt z/23VxOsULSPG0Lbc/jMLcCm68vuonx/JzqdFmK6w8Yf4HjFfIfVj7tiB5GUnTtzJepfxzned4f 3+X/5Hzll/P/MIg== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 Update comment about the number of lanes. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/bridge/tc358762.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/tc358762.c b/drivers/gpu/drm/bridge/tc3= 58762.c index cc1c5ff42cbd..9fb921b3fa0d 100644 --- a/drivers/gpu/drm/bridge/tc358762.c +++ b/drivers/gpu/drm/bridge/tc358762.c @@ -305,7 +305,14 @@ static int tc358762_probe(struct mipi_dsi_device *dsi) ctx->dev =3D dev; ctx->pre_enabled =3D false; =20 - /* TODO: Find out how to get dual-lane mode working */ + /* + * When using DSI clk for pixel clock (only mode supported in the driver), + * the pclk is derived directly from the DSI byteclk via simple divider, + * which is either 2 or 3. + * The required divider can be calculated with bitspp / 8 / nlanes. Thus, + * for RGB888, only nlanes =3D 1 works as nlanes =3D 2 would require divi= der + * of 1.5. + */ dsi->lanes =3D 1; dsi->format =3D MIPI_DSI_FMT_RGB888; dsi->mode_flags =3D MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | --=20 2.43.0