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Thu, 26 Mar 2026 18:31:38 +0100 (CET) Received: by jupiter.universe (Postfix, from userid 1000) id 46907480030; Thu, 26 Mar 2026 18:31:38 +0100 (CET) From: Sebastian Reichel Date: Thu, 26 Mar 2026 18:31:30 +0100 Subject: [PATCH 06/10] drm/rockchip: dw_dp: Implement out-of-band HPD handling Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260326-synopsys-dw-dp-improvements-v1-6-501849162290@collabora.com> References: <20260326-synopsys-dw-dp-improvements-v1-0-501849162290@collabora.com> In-Reply-To: <20260326-synopsys-dw-dp-improvements-v1-0-501849162290@collabora.com> To: Sandy Huang , =?utf-8?q?Heiko_St=C3=BCbner?= , Andy Yan , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Damon Ding , Dmitry Baryshkov , Alexey Charkov , dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@collabora.com, Sebastian Reichel X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; 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a=openpgp; fpr=EF660D07463F8B726A795413D8EED7F3C83BFA9A Implement out-of-band hotplug handling, which will be used to receive external hotplug information from the USB-C state machine. This is currently handled by the USBDP PHY, which brings quite some trouble as the register being accessed requires the power-domain from the DP controller and also requires custom TypeC HPD info parsing in the USBDP PHY driver. In contrast to the USBDP PHY this does not just enable the hotplug signal when a DP AltMode capable adapter is plugged in, but instead properly detects if a cable is plugged in for things like USB-C to HDMI adapters. Signed-off-by: Sebastian Reichel --- drivers/gpu/drm/rockchip/dw_dp-rockchip.c | 126 ++++++++++++++++++++++++++= ++-- 1 file changed, 120 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/rockchip/dw_dp-rockchip.c b/drivers/gpu/drm/ro= ckchip/dw_dp-rockchip.c index dd8db923d6d7..a9845161ced3 100644 --- a/drivers/gpu/drm/rockchip/dw_dp-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_dp-rockchip.c @@ -8,9 +8,12 @@ =20 #include #include +#include +#include #include #include #include +#include =20 #include #include @@ -24,12 +27,54 @@ =20 #include "rockchip_drm_drv.h" =20 +#define ROCKCHIP_MAX_CTRLS 2 + +#define ROCKCHIP_VO_GRF_DP_SINK_HPD_SEL BIT(10) +#define ROCKCHIP_VO_GRF_DP_SINK_HPD_CFG BIT(11) + +struct rockchip_dw_dp_plat_data { + u8 num_ctrls; + u32 ctrl_ids[ROCKCHIP_MAX_CTRLS]; + u32 max_link_rate; + u8 pixel_mode; + u32 hpd_reg[ROCKCHIP_MAX_CTRLS]; +}; + struct rockchip_dw_dp { struct dw_dp *base; struct device *dev; + const struct rockchip_dw_dp_plat_data *pdata; + struct regmap *vo_grf; struct rockchip_encoder encoder; + int id; + bool hpd_sel; + bool hpd_cfg; }; =20 +static void dw_dp_rockchip_hpd_sw_sel(void *data, bool force_hpd_from_sw) +{ + struct rockchip_dw_dp *dp =3D data; + u32 hpd_reg =3D dp->pdata->hpd_reg[dp->id]; + + dp->hpd_sel =3D force_hpd_from_sw; + + regmap_write(dp->vo_grf, hpd_reg, + FIELD_PREP_WM16_CONST(ROCKCHIP_VO_GRF_DP_SINK_HPD_SEL, dp->hpd_sel)= ); +} + +static void dw_dp_rockchip_hpd_sw_cfg(void *data, bool hpd) +{ + struct rockchip_dw_dp *dp =3D data; + u32 hpd_reg =3D dp->pdata->hpd_reg[dp->id]; + + dev_dbg(dp->dev, "Force HPD connected=3D%s\n", str_yes_no(hpd)); + + dp->hpd_cfg =3D hpd; + + regmap_write(dp->vo_grf, hpd_reg, + FIELD_PREP_WM16_CONST(ROCKCHIP_VO_GRF_DP_SINK_HPD_CFG, dp->hpd_cfg)= ); +} + static int dw_dp_encoder_atomic_check(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state) @@ -72,14 +117,49 @@ static const struct drm_encoder_helper_funcs dw_dp_enc= oder_helper_funcs =3D { .atomic_check =3D dw_dp_encoder_atomic_check, }; =20 +static struct regmap *dp_dp_rockchip_get_vo_grf(struct rockchip_dw_dp *dp) +{ + struct device_node *np =3D dev_of_node(dp->dev); + struct of_phandle_args args; + struct regmap *regmap; + int ret; + + ret =3D of_parse_phandle_with_args(np, "phys", "#phy-cells", 0, &args); + if (ret) + return ERR_PTR(-ENODEV); + + /* + * Limit this workaround to RK3576 and RK3588, new platforms should + * add a VO GRF phandle in the DisplayPort DT node. + */ + if (!of_device_is_compatible(args.np, "rockchip,rk3576-usbdp-phy") && + !of_device_is_compatible(args.np, "rockchip,rk3588-usbdp-phy")) { + regmap =3D ERR_PTR(-ENODEV); + goto out_put_node; + } + + regmap =3D syscon_regmap_lookup_by_phandle(args.np, "rockchip,vo-grf"); + +out_put_node: + of_node_put(args.np); + return regmap; +} + static int dw_dp_rockchip_bind(struct device *dev, struct device *master, = void *data) { - const struct dw_dp_plat_data *plat_data; + const struct rockchip_dw_dp_plat_data *plat_data_const; + struct platform_device *pdev =3D to_platform_device(dev); + struct dw_dp_plat_data *plat_data; struct drm_device *drm_dev =3D data; struct rockchip_dw_dp *dp; struct drm_encoder *encoder; struct drm_connector *connector; - int ret; + struct resource *res; + int ret, id; + + plat_data =3D drmm_kzalloc(drm_dev, sizeof(*plat_data), GFP_KERNEL); + if (!plat_data) + return -ENOMEM; =20 dp =3D drmm_kzalloc(drm_dev, sizeof(*dp), GFP_KERNEL); if (!dp) @@ -88,10 +168,38 @@ static int dw_dp_rockchip_bind(struct device *dev, str= uct device *master, void * dp->dev =3D dev; dev_set_drvdata(dev, dp); =20 - plat_data =3D of_device_get_match_data(dev); - if (!plat_data) + plat_data_const =3D device_get_match_data(dev); + if (!plat_data_const) return -ENODEV; =20 + dp->pdata =3D plat_data_const; + + res =3D platform_get_mem_or_io(pdev, 0); + if (IS_ERR(res)) + return PTR_ERR(res); + + /* find the DisplayPort ID from the io address */ + dp->id =3D -ENODEV; + for (id =3D 0; id < plat_data_const->num_ctrls; id++) { + if (res->start =3D=3D plat_data_const->ctrl_ids[id]) { + dp->id =3D id; + break; + } + } + + if (dp->id < 0) + return dp->id; + + dp->vo_grf =3D dp_dp_rockchip_get_vo_grf(dp); + if (IS_ERR(dp->vo_grf)) + return PTR_ERR(dp->vo_grf); + + plat_data->max_link_rate =3D plat_data_const->max_link_rate; + plat_data->pixel_mode =3D plat_data_const->pixel_mode; + plat_data->hpd_sw_sel =3D dw_dp_rockchip_hpd_sw_sel; + plat_data->hpd_sw_cfg =3D dw_dp_rockchip_hpd_sw_cfg; + plat_data->data =3D dp; + encoder =3D &dp->encoder.encoder; encoder->possible_crtcs =3D drm_of_find_possible_crtcs(drm_dev, dev->of_n= ode); rockchip_drm_encoder_set_crtc_endpoint_id(&dp->encoder, dev->of_node, 0, = 0); @@ -127,14 +235,20 @@ static void dw_dp_remove(struct platform_device *pdev) component_del(&pdev->dev, &dw_dp_rockchip_component_ops); } =20 -static const struct dw_dp_plat_data rk3588_dp_plat_data =3D { +static const struct rockchip_dw_dp_plat_data rk3588_dp_plat_data =3D { + .num_ctrls =3D 2, + .ctrl_ids =3D {0xfde50000, 0xfde60000}, .max_link_rate =3D 810000, .pixel_mode =3D DW_DP_MP_QUAD_PIXEL, + .hpd_reg =3D {0x0000, 0x0008}, }; =20 -static const struct dw_dp_plat_data rk3576_dp_plat_data =3D { +static const struct rockchip_dw_dp_plat_data rk3576_dp_plat_data =3D { + .num_ctrls =3D 1, + .ctrl_ids =3D {0x27e40000}, .max_link_rate =3D 810000, .pixel_mode =3D DW_DP_MP_DUAL_PIXEL, + .hpd_reg =3D {0x0000}, }; =20 static const struct of_device_id dw_dp_of_match[] =3D { --=20 2.53.0