From nobody Thu Apr 2 22:13:14 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 79CB233C18E; Thu, 26 Mar 2026 06:35:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774506947; cv=none; b=MwEa208fj62aCCEVjtJYieF3pBrrlZ22pwx73cCoAcfL221x88FUdAQnH8lG8y5rrvQ8CvML6lE5WGzNOGap10Xe3OCyypRD6XQo9yApOplCgqSj4OzMHNFSlWuo30kGgpGPoV+rEPQJHnEhMQLr0EW89AYsm6PXZ/z9DHTegxU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774506947; c=relaxed/simple; bh=XgK+c61EJ3POwwUA4dYICWS5n7txtDGgDK9lPOzEOoY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=DKld1Re+1DB7n98jxS3HR6krDH92cpwsOQUadIGmlJSWVNWKUWVSDY5jHehSxn0Lyxuqf3Hv659k/gmNqzoM3LgTlc1ZAWA+/FEyI0IbbW7t3mgMFGh+wgQKHLoaOn3sctIbAUvVlDvGQhLKnJYyMjJWnmuFyUk5H6inYv5hXS0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=kgx5PVz7; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="kgx5PVz7" Received: by smtp.kernel.org (Postfix) with ESMTPS id 310E4C2BC87; Thu, 26 Mar 2026 06:35:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1774506947; bh=XgK+c61EJ3POwwUA4dYICWS5n7txtDGgDK9lPOzEOoY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=kgx5PVz7pfvEDHR6tWXx8Q8qJSFZ091irntbeytd6xr4kTLw1BztVuKrCcy9GbJ1D ySO9EIdAklDv/hh1VBjjtXXRnn0fjuQ7Mq6xFUPXUq7IMLqkFTOrNmdIg8iigJ+NA5 ZGsQ/cpPCd0bfmW8oyPDA7P4IRwsDFxrBGdXhaSwUZ4162Ib00tNP3Htx7svdWUoTc I6AkbXTsHiSitiYO8YfvPXIm3phld3SSnJbL7t3XGRz8uT/8h5yZMAe2x+irLN7nPj UMrofdLRaQiAnkytd/P0thnbYlbFA8VQsZuHUzBvd1s45HeiaR8LwxurmD3z9q40/w S0aWCsM9MVoCQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D385109E558; Thu, 26 Mar 2026 06:35:47 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Thu, 26 Mar 2026 06:35:38 +0000 Subject: [PATCH 1/2] dt-bindings: pwm: amlogic: Add new bindings for S6 S7 S7D Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260326-s6-s7-pwm-v1-1-67e2f72b98bc@amlogic.com> References: <20260326-s6-s7-pwm-v1-0-67e2f72b98bc@amlogic.com> In-Reply-To: <20260326-s6-s7-pwm-v1-0-67e2f72b98bc@amlogic.com> To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiner Kallweit , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, Xianwei Zhao , Junyi Zhao X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1774506945; l=1979; i=xianwei.zhao@amlogic.com; s=20251216; h=from:subject:message-id; bh=7pPP6FCX/JHlWDMsAPkXc7yrHLEf0gHhe1iZNl6X4a4=; b=0ilGapcjKBpO/yK6NfK5WTocVVTM8wUZtDKxrEbLtgMa9SrXPk5KYA3+Iw0XSPAux28L6n1uy B5TH4iJqCF4AqIjE3i1yrWcPRAknu8w7aMs+3i+x1uC9MaCgI3MTaOy X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=dWwxtWCxC6FHRurOmxEtr34SuBYU+WJowV/ZmRJ7H+k= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20251216 with auth_id=578 X-Original-From: Xianwei Zhao Reply-To: xianwei.zhao@amlogic.com From: Junyi Zhao Amlogic S7/S7D/S6 different from the previous SoCs, a controller includes one pwm, at the same time, the controller has only one input clock source. Signed-off-by: Junyi Zhao Signed-off-by: Xianwei Zhao Reviewed-by: Krzysztof Kozlowski Reviewed-by: Martin Blumenstingl tested-by tags. --- .../devicetree/bindings/pwm/pwm-amlogic.yaml | 27 ++++++++++++++++++= ++++ 1 file changed, 27 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml b/Docum= entation/devicetree/bindings/pwm/pwm-amlogic.yaml index c337d85da40f..f0c40dc359ad 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml +++ b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml @@ -37,6 +37,7 @@ properties: - enum: - amlogic,meson8-pwm-v2 - amlogic,meson-s4-pwm + - amlogic,s7-pwm - items: - enum: - amlogic,a4-pwm @@ -45,6 +46,11 @@ properties: - amlogic,t7-pwm - amlogic,meson-a1-pwm - const: amlogic,meson-s4-pwm + - items: + - enum: + - amlogic,s6-pwm + - amlogic,s7d-pwm + - const: amlogic,s7-pwm - items: - enum: - amlogic,meson8b-pwm-v2 @@ -146,6 +152,20 @@ allOf: clock-names: false required: - clocks + - if: + properties: + compatible: + contains: + enum: + - amlogic,s7-pwm + then: + properties: + clocks: + items: + - description: input clock of PWM + clock-names: false + required: + - clocks =20 - if: properties: @@ -182,3 +202,10 @@ examples: clocks =3D <&pwm_src_a>, <&pwm_src_b>; #pwm-cells =3D <3>; }; + - | + pwm@1000 { + compatible =3D "amlogic,s7-pwm"; + reg =3D <0x1000 0x10>; + clocks =3D <&pwm_src>; + #pwm-cells =3D <3>; + }; --=20 2.52.0 From nobody Thu Apr 2 22:13:14 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 88BA833F5B2; Thu, 26 Mar 2026 06:35:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774506947; cv=none; b=uSM3ytNasuOnlMghH1sL8MppGpO1AArac6Z2ulVieX0o+D90OkoabsuJd5J7J8AMADLimcXQEahztit/rtw0VXQBde2lT+vaQXp/n4+S6NS4vADZt1c+aWA4KGQpoG9mPI1POOaEgBgOoSEaSP5hNPX/HNDyVupPieT9A9xnXg8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774506947; c=relaxed/simple; bh=8CZX++UUTXa58HsRlEqWqi7GMzVxrwXHQ2fHN+iqTfw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ohszL6JdYIsikUKo864DXpnHyWx0ZdU/ciSI8oFC0+8sLcdcn0m61TVsNNhIXPOZmlCRh7Pfb/7aqxX8dKgREP0gcJW7jFKg8tska288AwzLDFMb4RuwH+Ln2japO62taD7NkdOUvKHNorbfLY3WjGsHzD3YB9XgdrvcpUAMNlk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=mhDypZ5A; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="mhDypZ5A" Received: by smtp.kernel.org (Postfix) with ESMTPS id 3D9AEC2BCB2; Thu, 26 Mar 2026 06:35:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1774506947; bh=8CZX++UUTXa58HsRlEqWqi7GMzVxrwXHQ2fHN+iqTfw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=mhDypZ5AES0Rvc312KkiBO3mUBEuroyw6jhnlm0ICSg0AGaCm65g4FGDSdxVfUq7a sV7VmN4ScATfCy+CEaYpctYESMzJJ8gr9q8fmuUveCkPIVIvCJaorOGFeTSGvoXxDu dYpPX3TSUHnuga4TMg+OpIBMBHtLv8oktpMq7FsEbm1tsY42cVwYBlPFMyWY33HlPI s2s9xoIVU8HiHaBSKMF9oWa999rn/y2qWrZPfxDzsxb9uJJIh9Ba01RfuzyubWgXV+ oi+q7DFiFMofhmkHWhNg3TZ4TxtmuXFhw00MAyoev4kDZ5kMUDA2ST3K8uT1zdYW9g D/0HlUj+5fHrw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 31AA7109E556; Thu, 26 Mar 2026 06:35:47 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Thu, 26 Mar 2026 06:35:39 +0000 Subject: [PATCH 2/2] pwm: meson: Add support for Amlogic S7 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260326-s6-s7-pwm-v1-2-67e2f72b98bc@amlogic.com> References: <20260326-s6-s7-pwm-v1-0-67e2f72b98bc@amlogic.com> In-Reply-To: <20260326-s6-s7-pwm-v1-0-67e2f72b98bc@amlogic.com> To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiner Kallweit , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, Xianwei Zhao X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1774506945; l=2820; i=xianwei.zhao@amlogic.com; s=20251216; h=from:subject:message-id; bh=sjF9pLMeA6zX83u1Sj97nxYlkERmG+eMOAkz7HWjlx4=; b=9MtBShGvvikwdhcA8XgDQsj3gtE8V3HDwdmZS7YqfG2UubeK+WFWdHjoZS12VhGczRcW2mTgY TH797RUyvAPBKlHcxIVAFct8fC6mM2rA+0dnXsEIdY/8waPvmNWja3O X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=dWwxtWCxC6FHRurOmxEtr34SuBYU+WJowV/ZmRJ7H+k= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20251216 with auth_id=578 X-Original-From: Xianwei Zhao Reply-To: xianwei.zhao@amlogic.com From: Xianwei Zhao Add support for Amlogic S7 PWM. Amlogic S7 different from the previous SoCs, a controller includes one pwm, at the same time, the controller has only one input clock source. Signed-off-by: Xianwei Zhao tested-by tags. --- drivers/pwm/pwm-meson.c | 32 ++++++++++++++++++++++++++++++-- 1 file changed, 30 insertions(+), 2 deletions(-) diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index 8c6bf3d49753..3d16694e254e 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -113,6 +113,7 @@ struct meson_pwm_data { int (*channels_init)(struct pwm_chip *chip); bool has_constant; bool has_polarity; + bool single_pwm; }; =20 struct meson_pwm { @@ -503,6 +504,18 @@ static void meson_pwm_s4_put_clk(void *data) clk_put(clk); } =20 +static int meson_pwm_init_channels_s7(struct pwm_chip *chip) +{ + struct device *dev =3D pwmchip_parent(chip); + struct meson_pwm *meson =3D to_meson_pwm(chip); + + meson->channels[0].clk =3D devm_clk_get(dev, NULL); + if (IS_ERR(meson->channels[0].clk)) + return dev_err_probe(dev, PTR_ERR(meson->channels[0].clk), + "Failed to get clk\n"); + return 0; +} + static int meson_pwm_init_channels_s4(struct pwm_chip *chip) { struct device *dev =3D pwmchip_parent(chip); @@ -592,6 +605,13 @@ static const struct meson_pwm_data pwm_s4_data =3D { .has_polarity =3D true, }; =20 +static const struct meson_pwm_data pwm_s7_data =3D { + .channels_init =3D meson_pwm_init_channels_s7, + .has_constant =3D true, + .has_polarity =3D true, + .single_pwm =3D true, +}; + static const struct of_device_id meson_pwm_matches[] =3D { { .compatible =3D "amlogic,meson8-pwm-v2", @@ -642,6 +662,10 @@ static const struct of_device_id meson_pwm_matches[] = =3D { .compatible =3D "amlogic,meson-s4-pwm", .data =3D &pwm_s4_data }, + { + .compatible =3D "amlogic,s7-pwm", + .data =3D &pwm_s7_data + }, {}, }; MODULE_DEVICE_TABLE(of, meson_pwm_matches); @@ -650,9 +674,13 @@ static int meson_pwm_probe(struct platform_device *pde= v) { struct pwm_chip *chip; struct meson_pwm *meson; + const struct meson_pwm_data *pdata =3D of_device_get_match_data(&pdev->de= v); int err; =20 - chip =3D devm_pwmchip_alloc(&pdev->dev, MESON_NUM_PWMS, sizeof(*meson)); + if (pdata->single_pwm) + chip =3D devm_pwmchip_alloc(&pdev->dev, 1, sizeof(*meson)); + else + chip =3D devm_pwmchip_alloc(&pdev->dev, MESON_NUM_PWMS, sizeof(*meson)); if (IS_ERR(chip)) return PTR_ERR(chip); meson =3D to_meson_pwm(chip); @@ -664,7 +692,7 @@ static int meson_pwm_probe(struct platform_device *pdev) spin_lock_init(&meson->lock); chip->ops =3D &meson_pwm_ops; =20 - meson->data =3D of_device_get_match_data(&pdev->dev); + meson->data =3D pdata; =20 err =3D meson->data->channels_init(chip); if (err < 0) --=20 2.52.0