From nobody Thu Apr 2 20:26:46 2026 Received: from mail-pg1-f170.google.com (mail-pg1-f170.google.com [209.85.215.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 28FC91DE8BF for ; Thu, 26 Mar 2026 13:48:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.170 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774532914; cv=none; b=H2Rzgzs6bssonZ74Fmq/Vd+vfYPcJgMId+m08JhlrmcKkcFyvuL0k1tVWCGXF/2K91pn6EnIqglV3zJ/y5oM8+0ADz5KqJ+io7KCgzCzkttysKH2Oa2nc4owRRRNIJl7xf4WQJcinci1oKTRBOjXxjVUOgRCEP9rb9bw3EeGCDE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774532914; c=relaxed/simple; bh=OGjx/rpqLanYJw8wyMx1GZX57lDgWW7QcL/E9ij2zVU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=jvbutQvNKfUmm8A18FgxPyl18/q0EAzMyJCAx/GMs5/PpHPdkBQ7fResQvn6ENVZJONe+zwGPmKF4Z2ZwvmVSeroztf4DoFkfzT9GvZL+bK07ht2X4+pIXnxwqXZzCiHS2mVkamyPn87I5mbeEJayizSCBA3idMA/EzMKENdQAg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=inventec.com; spf=pass smtp.mailfrom=inventec.com; dkim=pass (2048-bit key) header.d=inventec.com header.i=@inventec.com header.b=WC5VkEcb; arc=none smtp.client-ip=209.85.215.170 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=inventec.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=inventec.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=inventec.com header.i=@inventec.com header.b="WC5VkEcb" Received: by mail-pg1-f170.google.com with SMTP id 41be03b00d2f7-c763c294cccso714073a12.1 for ; Thu, 26 Mar 2026 06:48:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=inventec.com; s=google; t=1774532912; x=1775137712; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Z3ThBxdaxluBFioSVhIDwm332ADtoHWnIdue1Mw0j4g=; b=WC5VkEcb3HIhTvxn/MGV5pyeJeaGr03Vabi9AEBf/90bwlU2pGyvvFofsWb0Y/w3zC wG1f9RgF0JRVYvvqr7UdKig7cH8Cy3QO+BtrsdoOS9/iJOAnxSQc/OycMPDBRgeSrDv4 sq3eHhlHkDZ39+omqWy2TSgYBLqTspjMiiOhCc7gsTgdtUgWAoZ8wgc2ZIL+MyvnUINS ZcRmpBVcIpGUAILIaaTnqBt7XJB0SnOZepvDet8v0sJj+jQgwhmszRemQpCsoTGZ+Wm4 SetyflaVZCPYybVpSr9FFhTl2zch8iwovNRvvQE1yP3df1eIrTDw8eyOCS5FRMsXmepg 4CYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1774532912; x=1775137712; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=Z3ThBxdaxluBFioSVhIDwm332ADtoHWnIdue1Mw0j4g=; b=mFWCP+FSHvkTxKYrVhAnlFz9Pd4yj/lJG0eS4MDHz+loLo3gkvL1dQJEkNm4/JYXUp DE5L7TIdBD6E/LOgIXc2Qc5W6Pj1r5ZLiShEDA1WNwOyQ7Adjn3sa5VxHDj9X7rVhl/I f2rcTmmHB97NsLJJXST4lnx5KtIXw2uTTW/aoGf1zyvC9NWgzNnyV+vc6xT8geW2M4/0 2nNQ1HRxFM3Cym337+qmadDaznfIfZ78wpCQNmExUjK92d9RqDAyPETl9Ld4QlPGo2D/ eZmKffaZCCB95MTA3YYV3tzrPnNlcBUbWVgs9yxv4LyYVNzD1edXGCJzZkKxZIB5ABXd YAeA== X-Forwarded-Encrypted: i=1; AJvYcCW5JryniKTei4C3jW8YFDQ423j4NjX5Z/EopCKh6zZt2bsHs0g3mj20Q7ZparLX1IEVidf6zBkZ9L2a4+c=@vger.kernel.org X-Gm-Message-State: AOJu0Yzi2rY0/+AsWSki1o35XJ0xTd/dAx3rkb+T40vL/cR/aZRcnV4+ t/qrYOF31KPRcvBexlodqQ+6BJcv8z+EOud+an7hYQv3DstUSfji9MsIDDD3B8HlJj0= X-Gm-Gg: ATEYQzxwYm/odfz0SI7/wKYz/hLD9KaP16ymPjd3lkiIq+Bb+DLYsEe3MmamqDzplwA m9O+JMNRKx8d7ifAEK85L6XrdgIj6gYZsUQBlVHCfBaNX13k9imB8xf1Vu54odDnx1uG/TItqqL Iy89pnRn5xmuhAQ6l5oxnnuL/WKl6sa9mYMyQjiFsUIjd0EL77kXbZeex+Q3SskKsUmFVoOOBX6 ar/zAUaq+KB7EZHh1I0SKzIE0SMm6rI1+qT3Q2BA1oKNHaHLaSWQKlLjbQROI4OkDuoXiscQHKb u7TL/vYyypViNtWAORht0ZNmk9kKGV+wfoj2fiJxgi8Mc14CavGCRb056SRwWH8ApA3i1Qo3ndO Z95pmZqt/s4sET/iOl//iQiqS4TyazDTdQI41HyZbZdaZ16iOTd5DCyfSg4vJlL/oWeKiuIfsU8 nU4Xcm919j+gRpWNoJ0LDW3I1wuNboAdhPXcp71Yj0BGV7wiCv3/42bxahcbzGbmU= X-Received: by 2002:a05:6a20:431d:b0:398:89b6:1b3d with SMTP id adf61e73a8af0-39c4aab87e8mr8369489637.17.1774532912549; Thu, 26 Mar 2026 06:48:32 -0700 (PDT) Received: from [127.0.1.1] (60-248-18-139.hinet-ip.hinet.net. [60.248.18.139]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c76737f28d6sm2706683a12.6.2026.03.26.06.48.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Mar 2026 06:48:32 -0700 (PDT) From: Brian Chiang Date: Thu, 26 Mar 2026 13:48:05 +0000 Subject: [PATCH v2 1/2] dt-bindings: trivial: Add q50sn12072 and q54sn120a1 support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260326-add-support-for-q50sn12072-and-q54sn120a1-v2-1-77bc77eedc76@inventec.com> References: <20260326-add-support-for-q50sn12072-and-q54sn120a1-v2-0-77bc77eedc76@inventec.com> In-Reply-To: <20260326-add-support-for-q50sn12072-and-q54sn120a1-v2-0-77bc77eedc76@inventec.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, Jack Cheng , Brian Chiang , Jack Cheng X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1774532898; l=1150; i=chiang.brian@inventec.com; s=20260316; h=from:subject:message-id; bh=371ndBFO++Ux/UDUOyIuv35ZzqLJAZsYGZPm32hIp6Q=; b=kzY0BZ4Awp0H0lRYVHYxJA89fVy3ZtAa/yor3kfP09ZJYPDG49MISRxvOsOsKQTaOmTMAVR0E w8LNo1JNziiDOoGJWLt+6k3sBfd5s/yIY5VQ/kI1gPA4WjTEkXCSIz3 X-Developer-Key: i=chiang.brian@inventec.com; a=ed25519; pk=q+NqJYuJbGpA9KS9941D7f+8PVVW+k7DvaGgFykBiUc= From: Jack Cheng Add support for the Delta Electronics q50sn12072 and q54sn120a1 1/4 Brick DC/DC Regulated Power Modules. Signed-off-by: Jack Cheng Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/trivial-devices.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Docum= entation/devicetree/bindings/trivial-devices.yaml index a482aeadcd44..d4b78154df82 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -96,7 +96,11 @@ properties: # Delta Electronics DPS920AB 920W 54V Power Supply - delta,dps920ab # 1/4 Brick DC/DC Regulated Power Module + - delta,q50sn12072 + # 1/4 Brick DC/DC Regulated Power Module - delta,q54sj108a2 + # 1/4 Brick DC/DC Regulated Power Module + - delta,q54sn120a1 # Devantech SRF02 ultrasonic ranger in I2C mode - devantech,srf02 # Devantech SRF08 ultrasonic ranger --=20 2.43.0 From nobody Thu Apr 2 20:26:46 2026 Received: from mail-pg1-f182.google.com (mail-pg1-f182.google.com [209.85.215.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9965F13A3ED for ; Thu, 26 Mar 2026 13:48:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.182 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774532917; cv=none; b=aRf6piOYV+fUk0dnm8V6Nn8PuIhh2cWSmX6wfr2Nb/1HUKeKvdwdKgisMiYcM10KX/n4uOWL4BRS1X7+txqdR+/bibz2hnd8BRmD7HxSEbFo0gQfWJVdZPFZdyLyKioxqeanUcf6Go0waYPeQMUPazw3Lz7b+OvIVEgeh5pXMgU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774532917; c=relaxed/simple; bh=cR8AuliDwGMd7SkLiVsgXWd5m8KP6QBBfEHWMLQ5h5I=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=eGFp53OMZUljnjUBCYjCUr0WrlzngoeVDIGSIY18/T7S4XFqBgnrR4qlzQ8W8kn+MlVekmviiP5fqqCwQPj1eWDkNrqx3yqDo093wOeKASJwQl8AUwhTMEZAdpX4nC7WUb2lqdM6R8Lbldh98h1xh9YpsL3ob+CY6gIXnkKvdZI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=inventec.com; spf=fail smtp.mailfrom=inventec.com; dkim=pass (2048-bit key) header.d=inventec.com header.i=@inventec.com header.b=B+BoPyLz; arc=none smtp.client-ip=209.85.215.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=inventec.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=inventec.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=inventec.com header.i=@inventec.com header.b="B+BoPyLz" Received: by mail-pg1-f182.google.com with SMTP id 41be03b00d2f7-c7393536e53so418257a12.2 for ; Thu, 26 Mar 2026 06:48:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=inventec.com; s=google; t=1774532915; x=1775137715; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=DZ2qtiQKchOdrxNxTqVNhWG/CGjQa4vu3Qzgtzd8CDA=; b=B+BoPyLztH5YNa4VPNkLHeXtiG2Q8g/iBAtoR1euTDJczc6ND0JvUy5jY/ZNqfcGE6 HVBBwYrnU9rzSAVy+zbiPlDFQhu2lZgR7TtteGQrLB93NTBX1oF7HoZEVhZZUcycXieH VEZo09KMi/8i2udBZDqleW9DIksVN9WZTxluOwMTsqYBR99SCHNMRNNnF4KNkJUEjd3P LMED58+OrVn+f9mUYmDwI/QMq0RoAygauRW2ESc3jvdjy3xQYtAvuPFcUoXMMKebXY+5 6202NpP5CqhzBP3C8Qfgky5SSel1YlnwN5ggyTM/P9mHl/dDu4wc5A+ZuyELZ1DFdOfY VmzQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1774532915; x=1775137715; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=DZ2qtiQKchOdrxNxTqVNhWG/CGjQa4vu3Qzgtzd8CDA=; b=AIq0nK73kFzivZDUlEM2EaJ3u7swYz9sNDb/VEOA8KfNzNpKFZxlVbpWqIWGQfr53C DCtD0ByLabOJM79njiTO4sWrrP2bQtkO5wp0yqcGzSVy4Da6gwz7FUqlg5eR8YWVA8JS 9kr4QrAXMQAZEPtIR2XwjpzRpyfyCKpBKblxnkJlkxijg7ecawwXoH5ysxhJhrksXhu/ lVmEZ75H196Yds6dSi6SxlO+2ON8WQ2wGzKwz6cUd4/3qJR6kU32VDP5/LP8LXIdRPxJ dLqBawNbUScBKGfZiXE3KuxWFTEguYa5jW8EnRXxiBuVPC1kN1rZVlipsoc5eIDVcCJH Wn6A== X-Forwarded-Encrypted: i=1; AJvYcCUG1amkrd1ct9HY+LHB0TFVVs5Lll8FLkIVrdiFtyiWL49Xvg+AgAMw7iUrol9v3Y10iFq7ecXY4cBq5EE=@vger.kernel.org X-Gm-Message-State: AOJu0YwlGElR28jU7d3l9CW5GL8L7yokxK4KyYVGN20ylc10NdE+1+86 dAj6gX3Q8iltRnVHYJkqjp5T2PDf8z6BVkf+icVk9yf7s+7BtkoKOu6XAYcPupaK71o= X-Gm-Gg: ATEYQzzIuLlwLv/o1L372B/zB7r3IbKzy7ck0e8mZ3jw3LRTrN5gdokvfq2SoO/9NUK aTwnwYbJc74u9Zx/EVUnZOjb2BPCSo8pP3DwlAO7mJ3UdCv8/tVwEI72t2NWyPfzAYeruqf71no VqkWrMuYAHrBM5XEt9cEASnchTN1G/ngQVNndeK95K3Ds4WSscJJIsiY9n+VZn73plRIB9IiMvR o25hlVKC3hLzFsFTfDDhaKQiM3ByuIpE0E9lsVbAIT5pncJgXoRsVSsXEDq5Mjp1J+JsT0QjEL1 PefQyBRm/42HdOBo7uaObE9bX8FNaux8AZfFu8ni3c2cqRQUtVpZ0slP797d+hKL0VYMTs6f9nM c2QDR8pKwoBZTI60evy8c/nNfIopIBUvue2ZsAsiQKQ71Lbd6KyQL2v3z+soU7lUqbxxv/nAN0c s5ohLrzVuyzDkDWvnvyZyAQRIlliGsqY6eQrJ2iPUQ7xF4aOWrgmjGL+HoWn/NOOA= X-Received: by 2002:a05:6a21:6d88:b0:398:7137:272a with SMTP id adf61e73a8af0-39c4ad62945mr7685205637.32.1774532914929; Thu, 26 Mar 2026 06:48:34 -0700 (PDT) Received: from [127.0.1.1] (60-248-18-139.hinet-ip.hinet.net. [60.248.18.139]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c76737f28d6sm2706683a12.6.2026.03.26.06.48.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Mar 2026 06:48:34 -0700 (PDT) From: Brian Chiang Date: Thu, 26 Mar 2026 13:48:06 +0000 Subject: [PATCH v2 2/2] hwmon: (pmbus/q54sj108a2) Add support for q50sn12072 and q54sn120a1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260326-add-support-for-q50sn12072-and-q54sn120a1-v2-2-77bc77eedc76@inventec.com> References: <20260326-add-support-for-q50sn12072-and-q54sn120a1-v2-0-77bc77eedc76@inventec.com> In-Reply-To: <20260326-add-support-for-q50sn12072-and-q54sn120a1-v2-0-77bc77eedc76@inventec.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, Jack Cheng , Brian Chiang , Jack Cheng X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1774532898; l=8151; i=chiang.brian@inventec.com; s=20260316; h=from:subject:message-id; bh=91SYENlkxjgb2yRLOz3F7wtT3gaDUEKatWNsA79N0sQ=; b=wUioQLtnRcHNuvbU6fad4V+4R+2IcmvnoUQrqux5maoE53EnMvhVCSIdRkpQJP96izPfr9zMS sLBRcuucUWDA7ACTdSxOixR8LQEs5bkOzj7n1147yeBgtDbv+tRdVRg X-Developer-Key: i=chiang.brian@inventec.com; a=ed25519; pk=q+NqJYuJbGpA9KS9941D7f+8PVVW+k7DvaGgFykBiUc= From: Jack Cheng The Q50SN12072 and Q54SN120A1 are high-efficiency, high-density DC-DC power module from Delta Power Modules. The Q50SN12072, quarter brick, single output 12V. This product provides up to 1200 watts of output power at 38~60V. The Q50SN12072 offers peak efficiency up to 98.3%@54Vin. The Q54SN120A1, quarter brick, single output 12V. This product provides up to 1300 watts of output power at 40~60V. The Q54SN120A1 offers peak efficiency up to 98.1%@54Vin. Add support for them to q54sj108a2 driver. Signed-off-by: Jack Cheng Co-developed-by: Brian Chiang Signed-off-by: Brian Chiang --- drivers/hwmon/pmbus/q54sj108a2.c | 97 ++++++++++++++++++++++++++++--------= ---- 1 file changed, 68 insertions(+), 29 deletions(-) diff --git a/drivers/hwmon/pmbus/q54sj108a2.c b/drivers/hwmon/pmbus/q54sj10= 8a2.c index d5d60a9af8c5..cc2b32ad935c 100644 --- a/drivers/hwmon/pmbus/q54sj108a2.c +++ b/drivers/hwmon/pmbus/q54sj108a2.c @@ -22,7 +22,9 @@ #define PMBUS_FLASH_KEY_WRITE 0xEC =20 enum chips { - q54sj108a2 + q50sn12072, + q54sj108a2, + q54sn120a1 }; =20 enum { @@ -55,10 +57,24 @@ struct q54sj108a2_data { #define to_psu(x, y) container_of((x), struct q54sj108a2_data, debugfs_ent= ries[(y)]) =20 static struct pmbus_driver_info q54sj108a2_info[] =3D { - [q54sj108a2] =3D { + [q50sn12072] =3D { .pages =3D 1, + /* Source : Delta Q50SN12072 */ + .format[PSC_VOLTAGE_OUT] =3D linear, + .format[PSC_TEMPERATURE] =3D linear, + .format[PSC_VOLTAGE_IN] =3D linear, + .format[PSC_CURRENT_OUT] =3D linear, =20 + .func[0] =3D PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN | + PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | + PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | + PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | + PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_POUT, + }, + [q54sj108a2] =3D { + .pages =3D 1, /* Source : Delta Q54SJ108A2 */ + .format[PSC_VOLTAGE_OUT] =3D linear, .format[PSC_TEMPERATURE] =3D linear, .format[PSC_VOLTAGE_IN] =3D linear, .format[PSC_CURRENT_OUT] =3D linear, @@ -69,6 +85,20 @@ static struct pmbus_driver_info q54sj108a2_info[] =3D { PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_STATUS_INPUT, }, + [q54sn120a1] =3D { + .pages =3D 1, + /* Source : Delta Q54SN120A1 */ + .format[PSC_VOLTAGE_OUT] =3D linear, + .format[PSC_TEMPERATURE] =3D linear, + .format[PSC_VOLTAGE_IN] =3D linear, + .format[PSC_CURRENT_OUT] =3D linear, + + .func[0] =3D PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN | + PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | + PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | + PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | + PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_POUT, + }, }; =20 static ssize_t q54sj108a2_debugfs_read(struct file *file, char __user *buf, @@ -270,7 +300,9 @@ static const struct file_operations q54sj108a2_fops =3D= { }; =20 static const struct i2c_device_id q54sj108a2_id[] =3D { + { "q50sn12072", q50sn12072 }, { "q54sj108a2", q54sj108a2 }, + { "q54sn120a1", q54sn120a1 }, { }, }; =20 @@ -280,6 +312,7 @@ static int q54sj108a2_probe(struct i2c_client *client) { struct device *dev =3D &client->dev; u8 buf[I2C_SMBUS_BLOCK_MAX + 1]; + const struct i2c_device_id *mid; enum chips chip_id; int ret, i; struct dentry *debugfs; @@ -292,14 +325,9 @@ static int q54sj108a2_probe(struct i2c_client *client) I2C_FUNC_SMBUS_BLOCK_DATA)) return -ENODEV; =20 - if (client->dev.of_node) - chip_id =3D (enum chips)(unsigned long)of_device_get_match_data(dev); - else - chip_id =3D i2c_match_id(q54sj108a2_id, client)->driver_data; - ret =3D i2c_smbus_read_block_data(client, PMBUS_MFR_ID, buf); if (ret < 0) { - dev_err(&client->dev, "Failed to read Manufacturer ID\n"); + dev_err(dev, "Failed to read Manufacturer ID\n"); return ret; } if (ret !=3D 6 || strncmp(buf, "DELTA", 5)) { @@ -308,19 +336,25 @@ static int q54sj108a2_probe(struct i2c_client *client) return -ENODEV; } =20 - /* - * The chips support reading PMBUS_MFR_MODEL. - */ ret =3D i2c_smbus_read_block_data(client, PMBUS_MFR_MODEL, buf); if (ret < 0) { dev_err(dev, "Failed to read Manufacturer Model\n"); return ret; } - if (ret !=3D 14 || strncmp(buf, "Q54SJ108A2", 10)) { + for (mid =3D q54sj108a2_id; mid->name[0]; mid++) { + if (ret =3D=3D strlen(mid->name) && !strncasecmp(mid->name, buf, ret)) + break; + } + if (!mid->name[0]) { buf[ret] =3D '\0'; dev_err(dev, "Unsupported Manufacturer Model '%s'\n", buf); return -ENODEV; } + chip_id =3D mid->driver_data; + + if (strcmp(client->name, mid->name) !=3D 0) + dev_notice(dev, "Device mismatch: Configured %s, detected %s\n", + client->name, mid->name); =20 ret =3D i2c_smbus_read_block_data(client, PMBUS_MFR_REVISION, buf); if (ret < 0) { @@ -341,6 +375,7 @@ static int q54sj108a2_probe(struct i2c_client *client) if (!psu) return 0; =20 + psu->chip =3D chip_id; psu->client =3D client; =20 debugfs =3D pmbus_get_debugfs_dir(client); @@ -359,9 +394,6 @@ static int q54sj108a2_probe(struct i2c_client *client) debugfs_create_file("write_protect", 0444, q54sj108a2_dir, &psu->debugfs_entries[Q54SJ108A2_DEBUGFS_WRITEPROTECT], &q54sj108a2_fops); - debugfs_create_file("store_default", 0200, q54sj108a2_dir, - &psu->debugfs_entries[Q54SJ108A2_DEBUGFS_STOREDEFAULT], - &q54sj108a2_fops); debugfs_create_file("vo_ov_response", 0644, q54sj108a2_dir, &psu->debugfs_entries[Q54SJ108A2_DEBUGFS_VOOV_RESPONSE], &q54sj108a2_fops); @@ -383,27 +415,34 @@ static int q54sj108a2_probe(struct i2c_client *client) debugfs_create_file("mfr_location", 0444, q54sj108a2_dir, &psu->debugfs_entries[Q54SJ108A2_DEBUGFS_MFR_LOCATION], &q54sj108a2_fops); - debugfs_create_file("blackbox_erase", 0200, q54sj108a2_dir, - &psu->debugfs_entries[Q54SJ108A2_DEBUGFS_BLACKBOX_ERASE], - &q54sj108a2_fops); debugfs_create_file("blackbox_read_offset", 0444, q54sj108a2_dir, &psu->debugfs_entries[Q54SJ108A2_DEBUGFS_BLACKBOX_READ_OFFSET], &q54sj108a2_fops); - debugfs_create_file("blackbox_set_offset", 0200, q54sj108a2_dir, - &psu->debugfs_entries[Q54SJ108A2_DEBUGFS_BLACKBOX_SET_OFFSET], - &q54sj108a2_fops); - debugfs_create_file("blackbox_read", 0444, q54sj108a2_dir, - &psu->debugfs_entries[Q54SJ108A2_DEBUGFS_BLACKBOX_READ], - &q54sj108a2_fops); - debugfs_create_file("flash_key", 0444, q54sj108a2_dir, - &psu->debugfs_entries[Q54SJ108A2_DEBUGFS_FLASH_KEY], - &q54sj108a2_fops); + if (psu->chip =3D=3D q54sj108a2) { + debugfs_create_file("store_default", 0200, q54sj108a2_dir, + &psu->debugfs_entries[Q54SJ108A2_DEBUGFS_STOREDEFAULT], + &q54sj108a2_fops); + debugfs_create_file("blackbox_erase", 0200, q54sj108a2_dir, + &psu->debugfs_entries[Q54SJ108A2_DEBUGFS_BLACKBOX_ERASE], + &q54sj108a2_fops); + debugfs_create_file("blackbox_set_offset", 0200, q54sj108a2_dir, + &psu->debugfs_entries[Q54SJ108A2_DEBUGFS_BLACKBOX_SET_OFFSET], + &q54sj108a2_fops); + debugfs_create_file("blackbox_read", 0444, q54sj108a2_dir, + &psu->debugfs_entries[Q54SJ108A2_DEBUGFS_BLACKBOX_READ], + &q54sj108a2_fops); + debugfs_create_file("flash_key", 0444, q54sj108a2_dir, + &psu->debugfs_entries[Q54SJ108A2_DEBUGFS_FLASH_KEY], + &q54sj108a2_fops); + } =20 return 0; } =20 static const struct of_device_id q54sj108a2_of_match[] =3D { - { .compatible =3D "delta,q54sj108a2", .data =3D (void *)q54sj108a2 }, + { .compatible =3D "delta,q50sn12072" }, + { .compatible =3D "delta,q54sj108a2" }, + { .compatible =3D "delta,q54sn120a1" }, { }, }; =20 @@ -421,6 +460,6 @@ static struct i2c_driver q54sj108a2_driver =3D { module_i2c_driver(q54sj108a2_driver); =20 MODULE_AUTHOR("Xiao.Ma "); -MODULE_DESCRIPTION("PMBus driver for Delta Q54SJ108A2 series modules"); +MODULE_DESCRIPTION("PMBus driver for Delta Q54SJ108A2 and compatibles"); MODULE_LICENSE("GPL"); MODULE_IMPORT_NS("PMBUS"); --=20 2.43.0